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1. 发明授权

US5631182A Method of making a semiconductor memory circuit device 失效
标题翻译：制造半导体存储器电路器件的方法
公开(公告)号：US5631182A
公开(公告)日：1997-05-20
申请号：US327861
申请日：1994-10-18
申请人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
发明人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10844 , H01L27/10805 , H01L27/10808
摘要： In a semiconductor memory circuit device wherein each memory cell is constituted by a series circuit of a memory cell selecting MISFET and an information storing capacitor of a stacked structure, there are present in a first region as a memory cell array region a first MISFET having a gate electrode and source and drain regions; first and second capacity electrodes and a dielectric film extending onto a first insulating film on the gate electrode; a second insulating film positioned on the second capacity electrode; and a first wiring positioned on the second insulating film, while in a second region as a peripheral circuit region there are present a second MISFET having a gate electrode and source and drain regions; a first insulating film on the gate electrode; a third insulating film on the first insulating film; a second insulating film on the third insulating film; and a second wiring on the second insulating film.
摘要翻译：在其中每个存储单元由存储单元选择MISFET的串联电路和层叠结构的信息存储电容器构成的半导体存储器电路器件中，在第一区域中存在作为存储单元阵列区域的第一MISFET，其具有栅极电极和源极和漏极区域; 第一和第二电容电极和延伸到栅电极上的第一绝缘膜上的电介质膜; 位于所述第二容量电极上的第二绝缘膜; 以及位于所述第二绝缘膜上的第一布线，而在作为外围电路区域的第二区域中存在具有栅极电极和源极和漏极区域的第二MISFET; 栅电极上的第一绝缘膜; 第一绝缘膜上的第三绝缘膜; 第三绝缘膜上的第二绝缘膜; 以及在第二绝缘膜上的第二布线。

2. 发明授权

US5237187A Semiconductor memory circuit device and method for fabricating same 失效
标题翻译：半导体存储器电路器件及其制造方法
公开(公告)号：US5237187A
公开(公告)日：1993-08-17
申请号：US799541
申请日：1991-11-27
申请人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
发明人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10844 , H01L27/10805 , H01L27/10808
摘要： In a semiconductor memory circuit device wherein each memory cell is constituted by a series circuit of a memory cell selecting MISFET and an information storing capacitor of a stacked structure, there are present in a first region, which is a memory cell array region, a first MISFET having a gate electrode and source and drain regions; first and second capacitor electrodes and a dielectric film extended over a first insulating film and over the gate electrode; a second insulating film disposed on the second capacitor electrode; a third insulating film interposed between the first insulating film and first capacitor electrode; and a first wiring positioned on the second insulating film. In a second region of the device, which is a peripheral circuit region, there are present a second MISFET having a gate electrode and source and drain regions; a first insulating film on the gate electrode; a second insulating film on a third insulating film, the third insulating film being interposed between the first and second insulating films; and a second wiring on the second insulating film. The second wiring is formed by the same level conductor layer as that forming the first wiring. Similarly, the first through third insulating films of the first region are correspondingly associated with the first through third insulating films of the second region, respectively.
摘要翻译：在其中每个存储单元由存储单元选择MISFET的串联电路和层叠结构的信息存储电容器构成的半导体存储器电路器件中，存在作为存储单元阵列区域的第一区域，第一 MISFET具有栅极电极和源极和漏极区域; 第一和第二电容器电极以及在第一绝缘膜上并在栅电极上方延伸的电介质膜; 设置在所述第二电容器电极上的第二绝缘膜; 介于所述第一绝缘膜和所述第一电容器电极之间的第三绝缘膜; 以及位于第二绝缘膜上的第一布线。在作为外围电路区域的器件的第二区域中，存在具有栅极电极和源极和漏极区域的第二MISFET，栅电极上的第一绝缘膜; 在第三绝缘膜上的第二绝缘膜，所述第三绝缘膜介于所述第一和第二绝缘膜之间; 以及在第二绝缘膜上的第二布线。第二布线由与形成第一布线的层相同的导体层形成。类似地，第一区域的第一至第三绝缘膜分别与第二区域的第一至第三绝缘膜相关联。

3. 发明授权

US6043118A Semiconductor memory circuit device and method for fabricating a semiconductor memory device circuit 失效
标题翻译：半导体存储器电路器件及半导体存储器件电路的制造方法
公开(公告)号：US6043118A
公开(公告)日：2000-03-28
申请号：US800018
申请日：1997-02-13
申请人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
发明人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10844 , H01L27/10805 , H01L27/10808
摘要： In a semiconductor memory circuit device wherein each memory cell is constituted by a series circuit of a memory cell selecting MISFET and an information storing capacitor of a stacked structure, there are present in a first region as a memory cell array region a first MISFET having a gate electrode and source and drain regions; first and second capacity electrodes and a dielectric film extending onto a first insulating film on the gate electrode; a second insulating film positioned on the second capacity electrode; and a first wiring positioned on the second insulating film, while in a second region as a peripheral circuit region there are present a second MISFET having a gate electrode and source and drain regions; a first insulating film on the gate electrode; a third insulating film on the first insulating film; a second insulating film on the third insulating film; and a second wiring on the second insulating film.
摘要翻译：在其中每个存储单元由存储单元选择MISFET的串联电路和层叠结构的信息存储电容器构成的半导体存储器电路器件中，在第一区域中存在作为存储单元阵列区域的第一MISFET，其具有栅极电极和源极和漏极区域; 第一和第二电容电极和延伸到栅电极上的第一绝缘膜上的电介质膜; 位于所述第二容量电极上的第二绝缘膜; 以及位于所述第二绝缘膜上的第一布线，而在作为外围电路区域的第二区域中存在具有栅极电极和源极和漏极区域的第二MISFET; 栅电极上的第一绝缘膜; 第一绝缘膜上的第三绝缘膜; 第三绝缘膜上的第二绝缘膜; 以及在第二绝缘膜上的第二布线。

4. 发明授权

US5389558A Method of making a semiconductor memory circuit device 失效
标题翻译：制造半导体存储器电路器件的方法
公开(公告)号：US5389558A
公开(公告)日：1995-02-14
申请号：US104014
申请日：1993-08-10
申请人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
发明人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
IPC分类号： H01L21/8242 , H01L27/108 , H01L21/70
CPC分类号： H01L27/10844 , H01L27/10805 , H01L27/10808
摘要： In a semiconductor memory circuit device wherein each memory cell is constituted by a series circuit of a memory cell selecting MISFET and an information storing capacitor of a stacked structure, there are present in a first region as a memory cell array region a first MISFET having a gate electrode and source and drain regions; first and second capacity electrodes and a dielectric film extending onto a first insulating film on the gate electrode; a second insulating film positioned on the second capacity electrode; and a first wiring positioned on the second insulating film, while in a second region as a peripheral circuit region there are present a second MISFET having a gate electrode and source and drain regions; a first insulating film on the gate electrode; a third insulating film on the first insulating film; a second insulating film on the third insulating film; and a second wiring on the second insulating film.
摘要翻译：在其中每个存储单元由存储单元选择MISFET的串联电路和层叠结构的信息存储电容器构成的半导体存储器电路器件中，在第一区域中存在作为存储单元阵列区域的第一MISFET，其具有栅极电极和源极和漏极区域; 第一和第二电容电极和延伸到栅电极上的第一绝缘膜上的电介质膜; 位于所述第二容量电极上的第二绝缘膜; 以及位于所述第二绝缘膜上的第一布线，而在作为外围电路区域的第二区域中存在具有栅极电极和源极和漏极区域的第二MISFET; 栅电极上的第一绝缘膜; 第一绝缘膜上的第三绝缘膜; 第三绝缘膜上的第二绝缘膜; 以及在第二绝缘膜上的第二布线。

5. 发明授权

US5684315A Semiconductor memory device including memory cells each having an information storage capacitor component formed over control electrode of cell selecting transistor 失效
标题翻译：半导体存储器件包括存储单元，每个存储单元都具有形成在单元选择晶体管的控制电极上的信息存储电容器组件
公开(公告)号：US5684315A
公开(公告)日：1997-11-04
申请号：US362879
申请日：1994-12-23
申请人： Hiroyuki Uchiyama , Yoshiyuki Kaneko , Hiroki Soeda , Yasuhide Fujioka , Nozomu Matsuda , Motoko Sawamura
发明人： Hiroyuki Uchiyama , Yoshiyuki Kaneko , Hiroki Soeda , Yasuhide Fujioka , Nozomu Matsuda , Motoko Sawamura
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8242 , H01L27/10 , H01L27/108 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： H01L27/10852 , H01L27/10808
摘要： A semiconductor memory device has memory cells provided at intersections between word line conductors and data line conductors. Each of the memory cells includes a cell selecting transistor and an information storage capacitor. The capacitor in each of the memory cells includes a first capacitor component formed over the control electrode of the transistor and a second capacitor component formed over a word line conductor which is adjacent to a word line conductor integral with the control electrode of the transistor. Each of the first and second capacitor components has a common electrode, a storage electrode and a dielectric film sandwiched therebetween, and the storage electrode is at a level higher than the common electrode in each of said first and second capacitor components. The storage electrodes of the first and second capacitor components are electrically connected with each other and with one of the semiconductor regions of the transistor. The other semiconductor region of the transistor is electrically connected with one of the data line conductors. Patterning of the storage electrodes of the first and second capacitor components is preferalbly effected by use of masks of a stripe pattern.
摘要翻译：半导体存储器件具有在字线导体和数据线导体之间的交叉点处设置的存储单元。每个存储单元包括单元选择晶体管和信息存储电容器。每个存储单元中的电容器包括形成在晶体管的控制电极上的第一电容器部件和形成在字线导体上的第二电容器部件，该字线导体与与晶体管的控制电极成一体的字线导体相邻。第一电容器部件和第二电容器部件中的每一个均具有公共电极，存储电极和夹在其间的电介质膜，并且在所述第一和第二电容器部件的每个中，所述存储电极处于比所述公共电极高的电平。第一和第二电容器部件的存储电极彼此电连接并且与晶体管的半导体区域中的一个电连接。晶体管的另一个半导体区域与数据线导体之一电连接。第一和第二电容器部件的存储电极的图案化优选地通过使用条纹图案的掩模来实现。

6. 发明授权

US07430466B2 Steering force detection device for steering handle of vehicle 失效
标题翻译：车辆转向手柄转向力检测装置
公开(公告)号：US07430466B2
公开(公告)日：2008-09-30
申请号：US11146728
申请日：2005-06-07
申请人： Yoshiyuki Kaneko , Tomoyoshi Koyanagi , Yoshinori Harada , Yutaka Mizuno
发明人： Yoshiyuki Kaneko , Tomoyoshi Koyanagi , Yoshinori Harada , Yutaka Mizuno
IPC分类号： B63H5/125
CPC分类号： B63H25/02
摘要： A watercraft has steering force detection sections. Each steering force detection section includes a pressure receiving section. The pressure receiving sections are spaced from each other and are in the vicinity of a steering shaft. A pressing member is coupled to the steering shaft. The pressing member can press on at least one of the pressure receiving sections when the steering handlebars are rotated to a maximum steering angle. A received pressure detection section detects the pressure applied to the pressure receiving section. The pressure receiving section and the received pressure detection section are coaxially mounted in a pressure receiving section casing and a detection section casing. A guide tube can engage the pressure receiving section and the received pressure detection section. The guide tube is formed with ribs and grooves. The pressure receiving section has a pressure receiving member, a bolt, a plain washer, and a spring member.
摘要翻译：船舶具有转向力检测部分。每个转向力检测部分包括压力接收部分。压力接收部彼此间隔开并且在转向轴附近。按压构件联接到转向轴。当转向手把旋转到最大转向角时，按压构件可以压靠至少一个压力接收部分。接收压力检测部分检测施加到压力接收部分的压力。受压部和接收压力检测部同轴地安装在受压部壳体和检测部壳体中。引导管可以接合压力接收部分和接收的压力检测部分。引导管形成有肋和槽。受压部具有受压部件，螺栓，平垫圈和弹簧部件。

7. 发明授权

US07408298B2 Image display device 有权
标题翻译：图像显示装置
公开(公告)号：US07408298B2
公开(公告)日：2008-08-05
申请号：US11319167
申请日：2005-12-28
申请人： Kenji Kato , Yuuichi Kijima , Yoshiyuki Kaneko , Shigemi Hirasawa
发明人： Kenji Kato , Yuuichi Kijima , Yoshiyuki Kaneko , Shigemi Hirasawa
IPC分类号： H01J17/24 , H01J19/70 , H01J61/26
CPC分类号： H01J9/39 , H01J9/261 , H01J29/94 , H01J31/127
摘要： On a back surface of a back substrate on which electron emission sources are formed, a getter room is formed by the back substrate and a cup-shaped room member. In the inside of the getter room, a getter assembly which includes a getter housing which holds a getter and a getter support which supports the getter housing is arranged. End portions of the getter support are fixed to and arranged between the back substrate and the room member by a sealing material. The present invention provides an image display device which prevents the occurrence of cracks in the getter room thus suppressing the degradation of a display characteristic of the image display device.
摘要翻译：在形成有电子发射源的背面基板的背面上，由背面基板和杯状的室内部件形成吸气室。在吸气室的内部设置有吸气剂组件，该吸气器组件包括吸气剂和吸气剂支撑件，其支撑吸气剂容器。吸气剂支撑件的端部通过密封材料固定并布置在后基板和室构件之间。本发明提供了一种图像显示装置，其防止吸气室发生裂纹，从而抑制图像显示装置的显示特性的劣化。

8. 发明授权

US07339316B2 Organic light-emitting devices and displays including a polarization separator, a phase plate, and a polarizer 有权
标题翻译：有机发光装置和包括偏振分离器，相位板和偏振器的显示器
公开(公告)号：US07339316B2
公开(公告)日：2008-03-04
申请号：US11311626
申请日：2005-12-20
申请人： Masaya Adachi , Yoshiyuki Kaneko , Sukekazu Aratani , Shingo Ishihara
发明人： Masaya Adachi , Yoshiyuki Kaneko , Sukekazu Aratani , Shingo Ishihara
IPC分类号： H05B33/00
CPC分类号： H01L51/5293 , H01L27/3211 , H01L27/322 , H01L27/3244 , H01L27/3295 , H01L51/5281 , H01L51/5284 , Y10S428/917
摘要： Light-emitting devices and light-emitting displays for realizing bright display by allowing light emitted from an emissive layer to efficiently contribute to a display. Polarization separators are arranged between the emissive layer and a phase plate. In the light of a wavelength range which includes a part or all of a light-emission wavelength range of the emissive layer and is narrower than a visible wavelength range and is directed from the emissive layer side to the polarization separators side, the polarization separators reflect circularly polarized light components which are converted into linearly polarized light that is absorbed by the polarizer due to the operation of the phase plate and transmit the other light.
摘要翻译：发光装置和发光显示器，用于通过允许从发射层发射的光来有效地促成显示而实现明亮的显示。极化分离器布置在发射层和相位板之间。根据包括发光层的发光波长范围的一部分或全部的波长范围，并且比可见光波长范围窄，并且从发光层侧向偏振分光器侧，偏振分离器反射圆偏振光分量被转换成线偏振光，由于相位板的操作而被偏振器吸收并透射另一种光。

9. 发明授权

US07285901B2 Display device having a connecting portion between cathode line and electron source 失效
标题翻译：显示装置具有阴极线和电子源之间的连接部分
公开(公告)号：US07285901B2
公开(公告)日：2007-10-23
申请号：US10781695
申请日：2004-02-20
申请人： Susumu Sasaki , Yoshiyuki Kaneko , Shigemi Hirasawa , Makoto Okai , Hiroshi Kawasaki
发明人： Susumu Sasaki , Yoshiyuki Kaneko , Shigemi Hirasawa , Makoto Okai , Hiroshi Kawasaki
IPC分类号： H01J1/62
CPC分类号： H01J29/04 , H01J31/127
摘要： A display device includes a face substrate which has anodes and phosphors on an inner surface thereof, a back substrate which has cathode lines and electron sources formed on the cathode lines, a support body which is interposed between both substrates such that the support body surrounds a display region and forms a given inner space, and a sealing material which hermetically seals the support body and both substrates. To enable the display device to produce a high quality display and have a long lifetime while ensuring the conduction in a wide range between the cathode lines and the electron sources, the cathode lines are made of a material having a conductor and an insulator, and the composition of a connecting portion between the cathode line and the electron source is formed such that the conductor occupancy rate becomes equal to or more than the insulator occupancy rate.
摘要翻译：显示装置包括在其内表面上具有阳极和荧光体的面基板，在阴极线上形成有阴极线和电子源的背基板，插入在两个基板之间的支撑体，使得支撑体围绕显示区域并形成给定的内部空间，以及密封材料，其密封支撑体和两个基板。为了使显示装置能够产生高质量的显示并且具有长寿命，同时确保阴极线和电子源之间的宽范围内的导通，阴极线由具有导体和绝缘体的材料制成，并且形成阴极线和电子源之间的连接部分的组成，使得导体占有率变得等于或大于绝缘体占有率。

10. 发明申请

US20070103087A1 Display device 审中-公开
公开(公告)号：US20070103087A1
公开(公告)日：2007-05-10
申请号：US11646316
申请日：2006-12-28
申请人： Tomoki Nakamura , Yoshiyuki Kaneko , Toshifumi Ozaki
发明人： Tomoki Nakamura , Yoshiyuki Kaneko , Toshifumi Ozaki
IPC分类号： G09G3/10
CPC分类号： H01J29/085 , G09G3/22 , G09G2320/04 , G09G2320/043 , H01J31/127
摘要： To detect a dark current when an abnormal discharge occurs between an anode and respective electrodes, on an inner surface of a front substrate, a dark current detection electrode is formed in a state that the dark current detection electrode is positioned adjacent to the outside of a screen display region on which an anode is formed and on a plane substantially equal to a plane on which the anode is formed. Then, between an electrode terminal of the dark current detection electrode and a ground, an ammeter which detects the flow of a dark current and a DC power source having a preset voltage value which is more or less lower than a high voltage supplied to the anode are connected in series.

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