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1. 发明授权

US06940670B2 Method of reading magnetic information which is immunized against thermal asperities 失效
标题翻译：读取针对热凹凸免疫的磁信息的方法
公开(公告)号：US06940670B2
公开(公告)日：2005-09-06
申请号：US09914244
申请日：2000-12-27
申请人： Gerben Willem De Jong , Johannes Otto Voorman , Joao Nuno Vila Lobos Ramalho , Giuseppe Grillo , Hugo Veenstra
发明人： Gerben Willem De Jong , Johannes Otto Voorman , Joao Nuno Vila Lobos Ramalho , Giuseppe Grillo , Hugo Veenstra
IPC分类号： G11B5/09 , G11B5/00 , G11B5/012 , G11B5/02 , G11B19/04 , G11B20/10 , G11B20/24
CPC分类号： G11B20/24 , G11B5/012 , G11B5/02 , G11B19/04 , G11B20/10 , G11B2005/0016
摘要： The invention relates to a method of reading of magnetic information. In an example embodiment, a read head includes a magneto-resistive rod polarized with an electrical signal. The magneto-resistive rod supplies a data signal whose variations are representative of magnetic-field variations to which the read head is exposed. Included in the embodiment, there is a compression of the data signal triggered when a thermal asperity is detected.
摘要翻译：本发明涉及磁信息读取方法。在示例性实施例中，读头包括用电信号偏振的磁阻杆。磁阻杆提供数据信号，其变化代表读取头暴露于其中的磁场变化。包括在实施例中，当检测到热不平坦时，存在触发的数据信号的压缩。

2. 发明授权

US07313060B2 Optical disk system with non-linearly controlled amplifier 失效
标题翻译：具有非线性控制放大器的光盘系统
公开(公告)号：US07313060B2
公开(公告)日：2007-12-25
申请号：US10523386
申请日：2003-07-21
申请人： Johannes Otto Voorman , Gerben Willem De Jong , Johannes Hubertus Antonius Brekelmans
发明人： Johannes Otto Voorman , Gerben Willem De Jong , Johannes Hubertus Antonius Brekelmans
IPC分类号： G11B7/00
CPC分类号： G11B20/10027 , G11B7/005 , G11B20/10009 , G11B2020/1288 , G11B2220/2541
摘要： An optical disk system includes at least one photo detector connected with a variable gain amplifier, a slicer, and a generator which is in the feedback path between the slicer and amplifier. A differential time delay detector provides the output of the optical disk system. The generator is configured for controlling the amplifier non-linearly so that time constants of the control loop of the amplifier which depend upon the level of the input signals are compensated and the timing behavior of the control loop of the amplifier has a more continuous character. A capacitor forms part of an integrator for making the mean value of the output voltage signal of the slicer equal to zero.
摘要翻译：光盘系统包括与可变增益放大器，限幅器和发生器连接的至少一个光电检测器，该可变增益放大器，限幅器和发生器处于限幅器和放大器之间的反馈路径中。差分延时检测器提供光盘系统的输出。发生器被配置为非线性地控制放大器，使得取决于输入信号的电平的放大器的控制环路的时间常数被补偿，并且放大器的控制环路的定时特性具有更连续的特性。电容器形成积分器的一部分，用于使限幅器的输出电压信号的平均值等于零。

3. 发明授权

US06747330B2 Current mirror circuit with interconnected control electrodies coupled to a bias voltage source 有权
标题翻译：具有互连控制电极的电流镜电路耦合到偏置电压源
公开(公告)号：US06747330B2
公开(公告)日：2004-06-08
申请号：US10111547
申请日：2002-04-24
申请人： Johannes Otto Voorman , Gerben Willem De Jong , Rachid El Waffaoui
发明人： Johannes Otto Voorman , Gerben Willem De Jong , Rachid El Waffaoui
IPC分类号： H01L2714
CPC分类号： G05F3/265 , G05F3/267
摘要： A current mirror circuit is described which includes a current input terminal (14A), a current output terminal (14B) and a common terminal (14C). A first controllable semiconductor element (T1) is arranged between the current input terminal (14A) and the common terminal (14C). A second controllable semiconductor element (T2) is arranged between the current output terminal (14B) and the common terminal (14C). The controllable semiconductor elements (T1, T2) have interconnected control electrodes (T1A, T2A) which are also coupled to a bias voltage source (VBIAS), for biasing said control electrodes at a reference voltage. The circuit further includes a transconductance stage (12) with an input (12A) coupled to the current input terminal (14A) and an output (12B) coupled to the common terminal (14C). The control electrodes (T1A, T2A) are coupled to the common terminal (14C) via a third controllable semiconductor element (T3). The bias voltage source (VBIAS) is coupled to the control electrodes of the first and the second controllable semiconductor element (T1, T2) via a control electrode (T3A) of the third controllable semiconductor element (T3). The current mirror circuit has high bandwidth also at low input currents and is very suitable for application in an arrangement for reproducing an optical record carrier.
摘要翻译：描述了电流镜电路，其包括电流输入端子（14A），电流输出端子（14B）和公共端子（14C）。第一可控半导体元件（T1）布置在电流输入端子（14A）和公共端子（14C）之间。第二可控半导体元件（T2）布置在电流输出端子（14B）和公共端子（14C）之间。可控半导体元件（T1，T2）具有互连的控制电极（T1A，T2A），其也耦合到偏置电压源（VBIAS），用于以参考电压偏置所述控制电极。电路还包括具有耦合到电流输入端子（14A）的输入端（12A）和耦合到公共端子（14C）的输出端（12B）的跨导级（12）。控制电极（T1A，T2A）经由第三可控半导体元件（T3）耦合到公共端子（14C）。偏置电压源（VBIAS）经由第三可控半导体元件（T3）的控制电极（T3A）耦合到第一和第二可控半导体元件（T1，T2）的控制电极。电流镜电路在低输入电流下也具有高带宽，并且非常适合于用于再现光学记录载体的布置。

4. 发明授权

US4015207A Anti-reciprocal network 失效
标题翻译：反互联网
公开(公告)号：US4015207A
公开(公告)日：1977-03-29
申请号：US628591
申请日：1975-11-04
申请人： Johannes Otto Voorman
发明人： Johannes Otto Voorman
IPC分类号： H03H11/08 , H03H11/16 , H03H11/40 , H03H11/42 , H03H11/50 , H03H7/44 , H03H11/00
CPC分类号： H03H11/42
摘要： An anti-reciprocal network including at least a first and a second port each with two terminals, the ports being included in a closed loop which has at least three impedance elements. The network also includes two amplifiers which are coupled to the two ports, wherein each of the amplifiers includes a transistor.
摘要翻译：包括至少第一和第二端口的反互联网络，每个端口都具有两个端子，所述端口包括在具有至少三个阻抗元件的闭环中。网络还包括耦合到两个端口的两个放大器，其中每个放大器包括晶体管。

5. 发明授权

US06788749B2 Erasure based instantaneous loop control in a data receiver 失效
标题翻译：数据接收机中基于擦除的瞬时环路控制
公开(公告)号：US06788749B2
公开(公告)日：2004-09-07
申请号：US09747112
申请日：2000-12-21
申请人： Johannes Otto Voorman , Johannes Wilhelmus Maria Bergmans , Ho Wai Wong-Lam
发明人： Johannes Otto Voorman , Johannes Wilhelmus Maria Bergmans , Ho Wai Wong-Lam
IPC分类号： H03D100
CPC分类号： H04L25/03057 , H04L7/0062
摘要： A receiver for restoring a data signal from a data input signal, comprises a data detector and a control signal generator coupled to the data detector for controlling one or more loops in the data detector, such as an automatic gain control, an equalizer adaptation and/or a timing recovery loop. The receiver also comprises erasure means for generating an instantaneous erasure information signal in case the data input signal to be restored falls within an erasure zone, which erasure means are coupled to the control signal generator for essentially instantaneous use of the instantaneous erasure information for accurate loop control. Preferably the respective control signals are kept constant in time during periods of erasure.
摘要翻译：用于从数据输入信号恢复数据信号的接收机包括数据检测器和耦合到数据检测器的控制信号发生器，用于控制数据检测器中的一个或多个环路，诸如自动增益控制，均衡器适配和/ 或定时恢复循环。接收机还包括擦除装置，用于在要恢复的数据输入信号落在擦除区内的情况下产生瞬时擦除信息信号，该擦除装置耦合到控制信号发生器，用于基本上即时使用瞬时擦除信息以进行精确的环路控制。优选地，各个控制信号在擦除期间在时间上保持恒定。

6. 发明授权

US06515812B1 Servo format for hard disks, preferably hard disks 失效
标题翻译：伺服格式的硬盘，最好是硬盘
公开(公告)号：US06515812B1
公开(公告)日：2003-02-04
申请号：US09553902
申请日：2000-04-20
申请人： Johannes Wilhelmus Maria Bergmans , Kofi Afolabi Anthony Makinwa , Johannes Otto Voorman
发明人： Johannes Wilhelmus Maria Bergmans , Kofi Afolabi Anthony Makinwa , Johannes Otto Voorman
IPC分类号： G11B502
CPC分类号： G11B20/10009 , G11B20/1258 , G11B2020/1232 , G11B2020/1282 , G11B2020/1287 , G11B2020/1298 , G11B2220/2516
摘要： A new embedded-servo format is proposed for use in disk drives, preferably hard disk drives. It is based on biphase modulation (more generally, p-phase modulation, where p>1) and offers significant advantages, in terms of SNR and timing content, over existing formats. It is shown that for biphase, at the low linear densities typically employed for servo information, near maximum-likelihood performance may be attained by a simple bit-detector consisting of a full-response linear equalizer and a binary slicer. When compared with an optimal detector for the commonly used technique of dibit signalling, a SNR gain of some 4 dB is achieved. The same equalizer may be used as the basis for near-maximum-likelihood Position Error Signal (PES) amplitude estimation and timing recovery. Investigations carried out on a practical servo demodulator based on a 5th order analog filter show that, at typical linear densities, this ideal performance is closely approached. The equalizer has a band-pass character and yields excellent suppression of the effects of thermal asperities and magneto resistive (MR) head asymmetry.
摘要翻译：提出了一种新的嵌入式伺服格式，用于磁盘驱动器，最好是硬盘驱动器。它基于双相调制（更一般地，p相调制，其中p> 1），并且在SNR和定时内容方面比现有格式提供显着的优点。示出了对于双相，在通常用于伺服信息的低线性密度下，可以通过由全响应线性均衡器和二进制切片器组成的简单位检测器来实现接近最大似然性能。当与常用的双向信号技术的最佳检测器相比时，实现了约4dB的SNR增益。可以使用相同的均衡器作为近似最大似然位置误差信号（PES）振幅估计和定时恢复的基础。在基于5阶模拟滤波器的实际伺服解调器上进行的研究表明，在典型的线性密度下，这种理想的性能得到了很大的提高。均衡器具有带通特性，并且能够很好地抑制热凹凸和磁阻（MR）头不对称的影响。

7. 发明授权

US4017750A Circuit arrangement for effectively making integrated impedances accurate 失效
标题翻译：有效制造集成阻抗的电路布置准确
公开(公告)号：US4017750A
公开(公告)日：1977-04-12
申请号：US675176
申请日：1976-04-08
申请人： Johannes Otto Voorman
发明人： Johannes Otto Voorman
IPC分类号： H03F3/343 , G01R27/16 , G01R31/316 , G06G7/16 , H01L21/822 , H01L27/04 , H03F3/34 , H03H11/00 , H03H11/04 , H03H11/42 , H03H11/46 , H03H11/50 , H03H11/54 , H03K3/26 , H03K1/00 , H03K23/08
CPC分类号： H03H11/46 , G01R27/16 , G01R31/316 , G06G7/16 , H03H11/42
摘要： A circuit arrangement for effectively correcting the absolute values of a plurality of impedances when they already have impedance values in the correct ratio to each other. Current going through each impedance is multiplied by a ratio derived from a precision impedance. The circuit is particularly useful in integrated circuit technology where impedance ratios can be accurately controlled but not so readily the absolute values of the impedances.
摘要翻译：一种电路装置，用于当它们已经具有彼此具有正确比例的阻抗值时，有效地校正多个阻抗的绝对值。通过每个阻抗的电流乘以由精度阻抗导出的比率。该电路在集成电路技术中特别有用，其阻抗比可被精确控制，但阻抗的绝对值不容易。

8. 发明授权

US4016435A Current stabilizing arrangement 失效
标题翻译：目前的稳定安排
公开(公告)号：US4016435A
公开(公告)日：1977-04-05
申请号：US553279
申请日：1975-02-26
申请人： Johannes Otto Voorman
发明人： Johannes Otto Voorman
IPC分类号： G05F3/26 , H03K17/00
CPC分类号： G05F3/265
摘要： A current stabilizing arrangement which includes a three-terminal circuit with an input terminal and an output terminal, at which output terminal a current with a negative temperature coefficient appears, while a constant current is applied to the input terminal. The arrangement further comprises a current source circuit, which supplies a current with a positive temperature coefficient and a squaring circuit to which a current is applied which is proportional to the current of the current source circuit, and whose output current, added to the output currents of the current-source circuit and of the three-terminal circuit, results in a temperature independent current. The temperature independent current thus obtained is applied to the input of a current mirror circuit, whose output current is fed to the input terminal of the three-terminal circuit.
摘要翻译：一种电流稳定装置，其包括具有输入端子和输出端子的三端电路，输出端子出现具有负温度系数的电流，同时将恒定电流施加到输入端子。该装置还包括电流源电路，该电流源电路具有正电温度系数的电流和与电流源电路的电流成正比的电流的平方电路，并且其输出电流加到输出电流的电流源电路和三端电路，导致与温度无关的电流。这样获得的与温度无关的电流被施加到电流镜电路的输入端，其输出电流被馈送到三端电路的输入端。

9. 发明授权

US07433292B2 Optical disk system with delay-difference detector without delay lines 失效
标题翻译：具有延迟差检测器的光盘系统，无延迟线
公开(公告)号：US07433292B2
公开(公告)日：2008-10-07
申请号：US10523385
申请日：2003-07-21
申请人： Johannes Otto Voorman , Gerben Willem De Jong , Johannes Hubertus Antonius Brekelmans
发明人： Johannes Otto Voorman , Gerben Willem De Jong , Johannes Hubertus Antonius Brekelmans
IPC分类号： G11B7/00
CPC分类号： G11B7/131 , G11B7/0901
摘要： Optical disk systems comprising photo detectors (1) for detecting optical disks comprising amplifiers and slicers (2-5) and delay-difference detectors (6) for detecting delay differences in sliced amplified detection signals are improved by installing delaylineless delay-difference detectors (6) comprising combinatorial-logic circuits (7,8) like inverters, ORs, NORs, ANDs, NANDs and sequential-logic circuits (11-18) like SetResetFlipFlops. Without the prior art delay lines, said delay-difference detectors (6) are of a lower complexity and low costly and can be well integrated. By introducing a first pair of sequential-logic circuits (11,12,15,16) for detecting delay differences between rising edges and a second pair of sequential-logic circuits (13,14,17,18) for detecting delay differences between falling edges, both kinds of edges are being used and the influence of time-jitter is less compared to the situation where just one kind of edge is used. Said delay-difference detector (6) further comprises an analog adder/subtracter (9) for adding/subtracting-logic circuit output signals and low pass filter(s) (10) located before or after said adder/subtracter (9).
摘要翻译：包括用于检测光盘的光检测器（1），包括用于检测分片放大检测信号中的延迟差的放大器和限幅器（2-5）和延迟差检测器（6），通过安装延迟无延迟差分检测器）包括类似反相器的组合逻辑电路（7,8），OR，NOR，AND，NAND和诸如SetResetFlipFlops的顺序逻辑电路（11-18）。在没有现有技术的延迟线的情况下，所述延迟差检测器（6）具有较低的复杂性并且成本低且可以很好地集成。通过引入用于检测上升沿之间的延迟差的第一对顺序逻辑电路（11,12,15,16）和用于检测下降沿之间的延迟差的第二对顺序逻辑电路（13,14,17,18）边缘，正在使用两种边缘，并且与仅使用一种边缘的情况相比，时间抖动的影响较小。所述延迟差检测器（6）还包括用于加/减逻辑电路输出信号的模拟加法器/减法器（9）和位于所述加法器/减法器（9）之前或之后的低通滤波器（10）。

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