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    • 4. 发明申请
    • Method of forming integrated circuit devices having n-MOSFET and p-MOSFET transistors with elevated and silicided source/drain structures
    • 形成具有n-MOSFET和p-MOSFET晶体管的集成电路器件的方法,其具有升高和硅化源极/漏极结构
    • US20080096336A1
    • 2008-04-24
    • US11583500
    • 2006-10-18
    • Peng-Soon LimYong-Tian HouJin YingHun-Jan Tao
    • Peng-Soon LimYong-Tian HouJin YingHun-Jan Tao
    • H01L21/337
    • H01L21/823814H01L21/28097H01L21/823807H01L29/66636H01L29/7848
    • An n-FET and a p-FET each have elevated source/drain structures. Optionally, the p-FET elevated-SOURCE/DRAIN structure is epitaxially grown from a p-FET recess formed in the substrate. Optionally, the n-FET elevated-SOURCE/DRAIN structure is epitaxially grown from an n-FET recess formed in the substrate. The n-FET and p-FET elevated-source/drain structures are both silicided, even though the structures may have different materials and/or different structure heights. At least a thermal treatment portion of the source/drain structure siliciding is performed simultaneously for the n-FET and p-FET elevated source/drain structures. Also, the p-FET gate electrode, the n-FET gate electrode, or both, may optionally be silicided simultaneously (same metal and/or same thermal treatment step) with the n-FET and p-FET elevated-source/drain structures, respectively; even though the gate electrodes may have different materials, different silicide metal, and/or different electrode heights. The silicides formed on n-FET and p-FET elevated-source/drain structures preferably do not extend below a top surface of the substrate more than about 250 angstroms; and the structure heights may be selected to provide this.
    • n-FET和p-FET各自具有升高的源极/漏极结构。 可选地,p-FET升高的SOURCE / DRAIN结构从形成在衬底中的p-FET凹槽外延生长。 可选地,n-FET升高的SOURCE / DRAIN结构从形成在衬底中的n-FET凹槽外延生长。 即使结构可能具有不同的材料和/或不同的结构高度,n-FET和p-FET升高源极/漏极结构都是硅化的。 对于n-FET和p-FET升高的源极/漏极结构,至少对源极/漏极结构硅化物的热处理部分同时进行。 此外,p-FET栅电极,n-FET栅电极或两者可以可选地与n-FET和p-FET升高源极/漏极结构同时(相同的金属和/或相同的热处理步骤)硅化 , 分别; 即使栅电极可以具有不同的材料,不同的硅化物金属和/或不同的电极高度。 在n-FET和p-FET升高源极/漏极结构上形成的硅化物优选不超过约250埃延伸到衬底的顶表面下方; 并且可以选择结构高度来提供这一点。