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1. 发明授权

US08012778B2 LED package and fabricating method thereof 有权
标题翻译： LED封装及其制造方法
公开(公告)号：US08012778B2
公开(公告)日：2011-09-06
申请号：US12259576
申请日：2008-10-28
申请人： Yong Suk Kim , Young Soo Oh , Hyoung Ho Kim , Taek Jung Lee , Seog Moon Choi
发明人： Yong Suk Kim , Young Soo Oh , Hyoung Ho Kim , Taek Jung Lee , Seog Moon Choi
IPC分类号： H01L21/00
CPC分类号： H01L33/642 , H01L33/486 , H01L33/641 , H01L2224/16225
摘要： The invention provides an LED package capable of effectively releasing heat emitted from an LED chip out of the package and a fabrication method thereof. For this purpose, at least one groove is formed on an underside surface of the substrate to package the LED chip and the groove is filled with carbon nanotube material. In the LED package, a substrate having at least one groove on the underside surface is prepared. A plurality of electrodes are formed on a top surface of the substrate. Also, at least the one LED chip is mounted over the substrate to have both terminals electrically connected to the upper electrodes. In addition, carbon nanotube filler is filled in the groove of the substrate.
摘要翻译：本发明提供一种LED封装，其能够有效地从LED封装中散发从LED芯片发出的热量及其制造方法。为此，在基板的下侧表面上形成至少一个凹槽以封装LED芯片，并且凹槽填充有碳纳米管材料。在LED封装中，准备在底面上具有至少一个沟槽的衬底。多个电极形成在基板的顶表面上。此外，至少将一个LED芯片安装在基板上，以使两个端子电连接到上电极。此外，碳纳米管填料填充在基板的槽中。

2. 发明授权

US07453093B2 LED package and fabricating method thereof 有权
标题翻译： LED封装及其制造方法
公开(公告)号：US07453093B2
公开(公告)日：2008-11-18
申请号：US11489578
申请日：2006-07-20
申请人： Yong Suk Kim , Young Soo Oh , Hyoung Ho Kim , Taek Jung Lee , Seog Moon Choi
发明人： Yong Suk Kim , Young Soo Oh , Hyoung Ho Kim , Taek Jung Lee , Seog Moon Choi
IPC分类号： H01L27/15 , H01L23/34
CPC分类号： H01L33/642 , H01L33/486 , H01L33/641 , H01L2224/16225
摘要： The invention provides an LED package capable of effectively releasing heat emitted from an LED chip out of the package and a fabrication method thereof. For this purpose, at least one groove is formed on an underside surface of the substrate to package the LED chip and the groove is filled with carbon nanotube material. In the LED package, a substrate having at least one groove on the underside surface is prepared. A plurality of electrodes are formed on a top surface of the substrate. Also, at least the one LED chip is mounted over the substrate to have both terminals electrically connected to the upper electrodes. In addition, carbon nanotube filler is filled in the groove of the substrate.
摘要翻译：本发明提供一种LED封装，其能够有效地从LED封装中散发从LED芯片发出的热量及其制造方法。为此，在基板的下侧表面上形成至少一个凹槽以封装LED芯片，并且凹槽填充有碳纳米管材料。在LED封装中，准备在底面上具有至少一个沟槽的衬底。多个电极形成在基板的顶表面上。此外，至少将一个LED芯片安装在基板上，以使两个端子电连接到上电极。此外，碳纳米管填料填充在基板的槽中。

3. 发明授权

US07442968B2 Chip on film (COF) package having test pad for testing electrical function of chip and method for manufacturing same 失效
标题翻译：片上贴片（COF）封装具有用于测试芯片电功能的测试焊盘及其制造方法
公开(公告)号：US07442968B2
公开(公告)日：2008-10-28
申请号：US10061099
申请日：2002-02-01
申请人： Hyoung-ho Kim , Ye-jung Jung
发明人： Hyoung-ho Kim , Ye-jung Jung
IPC分类号： H01L21/00
CPC分类号： H05K1/0268 , G01R31/2818 , G09G3/006 , H01L22/20 , H01L22/32 , H01L23/5387 , H01L2924/0002 , H01L2924/014 , H05K1/0293 , H05K1/11 , H05K1/189 , H05K2201/0305 , H05K2201/09381 , H05K2203/173 , H01L2924/00
摘要： A chip on film (COF) package comprising a test pad for testing the electrical function of a semiconductor chip and a method for manufacturing same are provided. The COF package comprises a semiconductor chip mounted on a base film, a signal-input portion for receiving data and control signals and transmitting the data and control signals to the semiconductor chip, a plurality of passive elements connected to terminals of the semiconductor chip, and a plurality of test pads for testing one or more terminals of the semiconductor chip that are not connected to the signal-input portion. The test pads of the COF package are capable of testing a plurality of internal terminals which are integrated into one terminal and do not connected to the signal-input portion, thereby easily testing the electrical function of the chip.
摘要翻译：提供了包括用于测试半导体芯片的电功能的测试焊盘的芯片片（COF）封装及其制造方法。 COF封装包括安装在基膜上的半导体芯片，用于接收数据和控制信号的信号输入部分，并将数据和控制信号发送到半导体芯片，连接到半导体芯片的端子的多个无源元件，以及用于测试半导体芯片的一个或多个未连接到信号输入部分的端子的多个测试焊盘。 COF封装的测试焊盘能够测试集成在一个端子中并且不连接到信号输入部分的多个内部端子，从而容易地测试芯片的电功能。

4. 发明授权

US07371603B2 Method of fabricating light emitting diode package 有权
标题翻译：制造发光二极管封装的方法
公开(公告)号：US07371603B2
公开(公告)日：2008-05-13
申请号：US11439189
申请日：2006-05-24
申请人： Yong Suk Kim , Seog Moon Choi , Hyoung Ho Kim , Yong Sik Kim
发明人： Yong Suk Kim , Seog Moon Choi , Hyoung Ho Kim , Yong Sik Kim
IPC分类号： H01L21/00 , H01L21/50 , H01L21/48 , H01L21/44
CPC分类号： H01L33/52 , H01L2224/48091 , H01L2224/48227 , Y10S438/974 , H01L2924/00014
摘要： The invention relates to an LED package and proposes a method of fabricating an LED package including steps of providing a package substrate having a mounting area of an LED and a metal pattern to be connected with the LED, and plasma-treating the package substrate to reform at least a predetermined surface area of the package substrate where a resin-molded part will be formed. The method also includes mounting the LED on the mounting area on the substrate package and electrically connecting the LED with the metal pattern, and forming the resin-molded part in the mounting area of the LED to seal the LED package.
摘要翻译：本发明涉及一种LED封装，并提出一种制造LED封装的方法，包括以下步骤：提供具有与LED连接的LED的安装区域和与LED连接的金属图案的封装基板，以及等离子体处理封装基板以改造至少形成将形成树脂成型部件的封装基板的预定表面积。该方法还包括将LED安装在基板封装上的安装区域上，并将LED与金属图案电连接，并在LED的安装区域中形成树脂模制部件以密封LED封装。

5. 发明授权

US07338854B2 Method for manufacturing multilayer ceramic capacitor 失效
标题翻译：多层陶瓷电容器制造方法
公开(公告)号：US07338854B2
公开(公告)日：2008-03-04
申请号：US11002183
申请日：2004-12-03
申请人： Ho Sung Choo , Seung Hyun Ra , Yong Suk Kim , Jung Woo Lee , Hyo Soon Shin , Hyoung Ho Kim
发明人： Ho Sung Choo , Seung Hyun Ra , Yong Suk Kim , Jung Woo Lee , Hyo Soon Shin , Hyoung Ho Kim
IPC分类号： H01L21/8242
CPC分类号： H01G4/005 , H01G4/12 , H01G4/30 , Y10T29/417
摘要： A method for manufacturing a multilayer ceramic capacitor, in which internal electrodes printed on each of a plurality of dielectric sheets have reduced thicknesses using an absorption member, thereby allowing the multilayer ceramic capacitor to have a high capacity and be minimized. The method includes printing the internal electrodes on each of the dielectric sheets, and stacking the dielectric sheets, wherein the internal electrodes formed on each of the dielectric sheets have a reduced thickness by causing an absorptive member to contact the surface of each of the dielectric sheets provided with the internal electrodes and then separating the absorptive member from the surface so that portions of the internal electrodes having a designated thickness are eliminated, and the dielectric sheets provided with the internal electrodes having the reduced thickness are stacked to form a chip element.
摘要翻译：一种制造多层陶瓷电容器的方法，其中印刷在多个电介质片材的每一个上的内部电极使用吸收构件具有减小的厚度，从而允许多层陶瓷电容器具有高容量并且被最小化。该方法包括在每个电介质片上印刷内部电极，并叠放电介质片，其中形成在每个电介质片上的内部电极通过使吸收构件接触每个电介质片的表面而具有减小的厚度设置有内部电极，然后将吸收构件从表面分离，使得部分具有指定厚度的内部电极被去除，并且设置有具有减小的厚度的内部电极的电介质层被堆叠以形成芯片元件。

6. 发明授权

US08753462B2 Method of manufacturing non-shrinking multilayer ceramic substrate 失效
标题翻译：制造非收缩多层陶瓷基板的方法
公开(公告)号：US08753462B2
公开(公告)日：2014-06-17
申请号：US12476216
申请日：2009-06-01
申请人： Beom Joon Cho , Eun Tae Park , Hyoung Ho Kim
发明人： Beom Joon Cho , Eun Tae Park , Hyoung Ho Kim
IPC分类号： C03B29/00
CPC分类号： H05K3/4611 , H01L21/4857 , H01L21/4867 , H01L23/15 , H01L23/49822 , H01L2924/0002 , H01L2924/09701 , H05K1/0306 , H05K3/1291 , H05K3/4629 , H05K2201/0209 , H05K2203/025 , H05K2203/1126 , H05K2203/1366 , H05K2203/308 , H01L2924/00
摘要： Disclosed is a method of manufacturing a nonshrinking multilayer ceramic substrate. The method includes forming at least one conductive via and an electrode pattern in at least one of a plurality of ceramic green sheets, laminating the ceramic green sheets to form a ceramic laminate, selectively forming a shrinkage inhibiting thin film of sinter-resistant powder on a region including the conductive via and a periphery thereof in at least one of two surfaces of the ceramic laminate using aerosol deposition, disposing a shrinkage inhibiting green sheet for suppressing the shrinkage of the ceramic laminate on at least one of the two surfaces of the ceramic laminate including the shrinkage inhibiting thin film to form a non-sintered multilayer ceramic substrate, and sintering the non-sintered multilayer ceramic substrate.
摘要翻译：公开了一种制造非闪烁多层陶瓷基板的方法。该方法包括在多个陶瓷生片中的至少一个中形成至少一个导电通孔和电极图案，层压陶瓷生片以形成陶瓷层压体，选择性地形成耐烧结粉末的收缩抑制薄膜在陶瓷层叠体的两个表面的至少一个表面中包括导电通孔及其周边的区域，使用气溶胶沉积，设置用于抑制陶瓷层压体在陶瓷层压体的两个表面中的至少一个上的收缩的收缩抑制生片包括用于形成非烧结多层陶瓷衬底的收缩抑制薄膜，以及烧结非烧结多层陶瓷衬底。

7. 发明授权

US08709832B2 Chip on film (COF) package having test line for testing electrical function of chip and method for manufacturing same 有权
标题翻译：具有用于测试芯片电功能的测试线的片上薄膜（COF）封装及其制造方法
公开(公告)号：US08709832B2
公开(公告)日：2014-04-29
申请号：US13212527
申请日：2011-08-18
申请人： Hyoung-ho Kim , Ye-jung Jung
发明人： Hyoung-ho Kim , Ye-jung Jung
IPC分类号： H01L21/00
CPC分类号： H05K1/0268 , G01R31/2818 , G09G3/006 , H01L22/20 , H01L22/32 , H01L23/5387 , H01L2924/0002 , H01L2924/014 , H05K1/0293 , H05K1/189 , H05K2201/0305 , H05K2201/09381 , H05K2203/173 , H01L2924/00
摘要： A chip on film (COF) package and a method for manufacturing same are provided. The COF package comprises a base film, a semiconductor chip mounted on the base film, a signal-inputting portion mounted on the base film, a first passive element mounted on the base film and comprising first and second terminals and a first signal line formed on the base film and connecting the first passive element to the semiconductor chip, wherein the first signal line comprises a connection pad connected to the first terminal of the first passive element and a first test line connected to the signal-inputting portion.
摘要翻译：提供了一种薄膜（COF）封装及其制造方法。 COF封装包括基膜，安装在基膜上的半导体芯片，安装在基膜上的信号输入部分，安装在基膜上的第一无源元件，包括第一和第二端子以及形成在第一和第二端子上的第一信号线所述基膜并将所述第一无源元件连接到所述半导体芯片，其中所述第一信号线包括连接到所述第一无源元件的第一端子的连接焊盘和连接到所述信号输入部分的第一测试线。

8. 发明申请

US20120061669A1 CHIP ON FILM (COF) PACKAGE HAVING TEST LINE FOR TESTING ELECTRICAL FUNCTION OF CHIP AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：具有用于测试芯片电气功能的测试线的薄膜（COF）包装芯片及其制造方法
公开(公告)号：US20120061669A1
公开(公告)日：2012-03-15
申请号：US13212527
申请日：2011-08-18
申请人： Hyoung-ho Kim , Ye-jung Jung
发明人： Hyoung-ho Kim , Ye-jung Jung
IPC分类号： H01L23/58 , H01L21/66
CPC分类号： H05K1/0268 , G01R31/2818 , G09G3/006 , H01L22/20 , H01L22/32 , H01L23/5387 , H01L2924/0002 , H01L2924/014 , H05K1/0293 , H05K1/189 , H05K2201/0305 , H05K2201/09381 , H05K2203/173 , H01L2924/00
摘要： A chip on film (COF) package and a method for manufacturing same are provided. The COF package comprises a base film, a semiconductor chip mounted on the base film, a signal-inputting portion mounted on the base film, a first passive element mounted on the base film and comprising first and second terminals and a first signal line formed on the base film and connecting the first passive element to the semiconductor chip, wherein the first signal line comprises a connection pad connected to the first terminal of the first passive element and a first test line connected to the signal-inputting portion.
摘要翻译：提供了一种薄膜（COF）封装及其制造方法。 COF封装包括基膜，安装在基膜上的半导体芯片，安装在基膜上的信号输入部分，安装在基膜上的第一无源元件，包括第一和第二端子以及形成在第一和第二端子上的第一信号线所述基膜并将所述第一无源元件连接到所述半导体芯片，其中所述第一信号线包括连接到所述第一无源元件的第一端子的连接焊盘和连接到所述信号输入部分的第一测试线。

9. 发明申请

US20110188694A1 VARIABLE DIRECTIONAL MICROPHONE ASSEMBLY AND METHOD OF MAKING THE MICROPHONE ASSEMBLY 审中-公开
标题翻译：可变方向麦克风组件及制作麦克风组件的方法
公开(公告)号：US20110188694A1
公开(公告)日：2011-08-04
申请号：US12663182
申请日：2008-08-29
申请人： Sang-Ho Lee , Hyoung-Ho Kim
发明人： Sang-Ho Lee , Hyoung-Ho Kim
IPC分类号： H04R1/02 , H04R31/00
CPC分类号： H04R1/406 , H04R31/00 , Y10T29/49005
摘要： A variable directional microphone assembly and method of manufacturing the same, which includes a printed circuit board including a connection terminal provided to a surface thereof, and a semiconductor integrated circuit device mounted to another surface thereof, a microphone body including a first mounting space for mounting the semiconductor integrated circuit device, two second mounting spaces, and a coil spring insertion hole, the first mounting space being provided to a surface of the microphone body, the second mounting spaces being provided to another surface of the microphone body, two microphone devices mounted to the second mounting spaces, the insertion hole allowing the microphone device to be in contact with the printed circuit board, a coil spring inserted into the coil spring insertion hole to electrically connect the microphone device to the printed circuit board, and a case including a sound hole in a bottom thereof.
摘要翻译：一种可变方向性麦克风组件及其制造方法，包括：印刷电路板，包括设置在其表面上的连接端子;以及半导体集成电路装置，安装在其另一表面;麦克风主体，包括用于安装的第一安装空间所述半导体集成电路装置，两个第二安装空间和螺旋弹簧插入孔，所述第一安装空间设置在所述麦克风主体的表面上，所述第二安装空间设置在所述麦克风主体的另一个表面上，安装有两个麦克风装置到第二安装空间，允许麦克风装置与印刷电路板接触的插入孔，插入到螺旋弹簧插入孔中以将麦克风装置电连接到印刷电路板的螺旋弹簧和包括在其底部的声孔。

10. 发明申请

US20100101701A1 METHOD OF MANUFACTURING NON-SHRINKING MULTILAYER CERAMIC SUBSTRATE 失效
标题翻译：制造非收缩多层陶瓷基板的方法
公开(公告)号：US20100101701A1
公开(公告)日：2010-04-29
申请号：US12476216
申请日：2009-06-01
申请人： Beom Joon CHO , Eun Tae PARK , Hyoung Ho KIM
发明人： Beom Joon CHO , Eun Tae PARK , Hyoung Ho KIM
IPC分类号： H01B13/00
CPC分类号： H05K3/4611 , H01L21/4857 , H01L21/4867 , H01L23/15 , H01L23/49822 , H01L2924/0002 , H01L2924/09701 , H05K1/0306 , H05K3/1291 , H05K3/4629 , H05K2201/0209 , H05K2203/025 , H05K2203/1126 , H05K2203/1366 , H05K2203/308 , H01L2924/00
摘要： Disclosed is a method of manufacturing a nonshrinking multilayer ceramic substrate. The method includes forming at least one conductive via and an electrode pattern in at least one of a plurality of ceramic green sheets, laminating the ceramic green sheets to form a ceramic laminate, selectively forming a shrinkage inhibiting thin film of sinter-resistant powder on a region including the conductive via and a periphery thereof in at least one of two surfaces of the ceramic laminate using aerosol deposition, disposing a shrinkage inhibiting green sheet for suppressing the shrinkage of the ceramic laminate on at least one of the two surfaces of the ceramic laminate including the shrinkage inhibiting thin film to form a non-sintered multilayer ceramic substrate, and sintering the non-sintered multilayer ceramic substrate.
摘要翻译：公开了一种制造非闪烁多层陶瓷基板的方法。该方法包括在多个陶瓷生片中的至少一个中形成至少一个导电通孔和电极图案，层压陶瓷生片以形成陶瓷层压体，选择性地形成耐烧结粉末的收缩抑制薄膜在陶瓷层叠体的两个表面的至少一个表面中包括导电通孔及其周边的区域，使用气溶胶沉积，设置用于抑制陶瓷层压体在陶瓷层压体的两个表面中的至少一个上的收缩的收缩抑制生片包括用于形成非烧结多层陶瓷衬底的收缩抑制薄膜，以及烧结非烧结多层陶瓷衬底。

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