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1. 发明授权

US06912235B2 Apparatus and method for phase control of tunable external cavity lasers 有权
标题翻译：可调外腔激光器的相位控制装置和方法
公开(公告)号：US06912235B2
公开(公告)日：2005-06-28
申请号：US10210039
申请日：2002-07-31
申请人： Douglas W. Anthon , Jill D. Berger , Alexander A. Tselikov , Stephen J. Hrinya , Howard S. Lee , Alan A. Fennema , Man F. Cheung
发明人： Douglas W. Anthon , Jill D. Berger , Alexander A. Tselikov , Stephen J. Hrinya , Howard S. Lee , Alan A. Fennema , Man F. Cheung
IPC分类号： H01S5/042 , H01S5/0687 , H01S5/14 , H01S3/098 , H01S3/13
CPC分类号： H01S5/141 , H01S5/042 , H01S5/0687 , H01S5/143
摘要： An apparatus and method for controlling the phase of a tunable laser is provided. Stabilization of the mode of a laser beam is provided as the laser is tuned to a target frequency. For one embodiment, a laser generates a reference beam and an output beam. The power of each of beam is measured by optical detectors, and a ratio thereof is utilized to detect when a mode hop occurs as the laser is coarsely tuned. The average of the pre and post mode hop ratios is utilized as a control setpoint while finely tuning the laser to the target frequency. Wavelength lockers, optical power dividers and optical detectors are utilized to determine power levels of the reference and output beams while also monitoring frequency characteristics thereof. A control unit utilizes the outputs from the wavelength locker to control the operation of the extended cavity laser during and after tuning.
摘要翻译：提供了一种用于控制可调激光器的相位的装置和方法。当激光被调谐到目标频率时，提供激光束的模式的稳定性。对于一个实施例，激光器产生参考光束和输出光束。每个光束的功率由光学检测器测量，并且其比例用于检测当激光器被粗调谐时何时出现模式跳跃。将前和后模式跳比的平均值用作控制设定值，同时将激光器精细地调谐到目标频率。利用波长锁定器，光功率分配器和光学检测器来确定参考和输出光束的功率电平，同时还监视其频率特性。控制单元利用来自波长锁定器的输出来调节调谐期间和之后的扩展腔激光器的操作。

2. 发明授权

US06253010B1 System and method for efficient coupling between optical elements 有权
标题翻译：用于光学元件之间有效耦合的系统和方法
公开(公告)号：US06253010B1
公开(公告)日：2001-06-26
申请号：US09190429
申请日：1998-11-12
申请人： Karl A. Belser , Gabor G. Szita , Howard S. Lee
发明人： Karl A. Belser , Gabor G. Szita , Howard S. Lee
IPC分类号： G02B626
CPC分类号： G02B6/4227 , G02B6/3588 , G11B7/1384 , G11B11/10543
摘要： A system and method for efficient coupling between optical elements comprises a memory containing an alignment module configured to align a light beam with an optical element to maximize coupling efficiency, and a processor coupled to the memory to control the alignment module. A position sensitive device indirectly senses a position of the light beam on the optical element and sends the position to the processor. The alignment module directly measures coupling efficiency where the light beam contacts the optical element. The alignment module identifies a direction of increasing coupling efficiency and aligns the light beam with the optical element along that direction until maximum coupling efficiency is achieved.
摘要翻译：一种用于光学元件之间有效耦合的系统和方法包括：存储器，其包含配置成将光束与光学元件对准以最大化耦合效率的对准模块;以及耦合到存储器以控制对准模块的处理器。位置敏感设备间接地感测光束在光学元件上的位置并将位置发送到处理器。对准模块直接测量光束与光学元件接触的耦合效率。对准模块识别提高耦合效率的方向，并沿着该方向将光束与光学元件对准，直到实现最大耦合效率。

3. 发明授权

US5346856A Method of making a selective compositional disordering of a GaAs based heterostructure by the in-diffusion of Au through a single crystal, epitaxially grown Ge film 失效
标题翻译：通过单晶，外延生长的Ge膜通过Au的扩散形成GaAs基异质结构的选择性组成失调的方法
公开(公告)号：US5346856A
公开(公告)日：1994-09-13
申请号：US60073
申请日：1993-05-10
申请人： Kenneth A. Jones , Howard S. Lee
发明人： Kenneth A. Jones , Howard S. Lee
IPC分类号： H01L21/18 , H01S5/042 , H01S5/20 , H01L21/20
CPC分类号： H01L21/182 , H01S5/20 , H01S5/0421 , H01S5/0425 , H01S5/2059
摘要： A method for producing a buried heterostructure active devices and a passive waveguide by providing a heterostructure substrate such as a superlattice having at least one planar GaAs layer and at least one AlGaAs layer adjacent to it. A single crystal germanium layer is epitaxially deposited on the superlattice substrate. A layer of gold is deposited on the germanium layer. The gold and germanium layers are imagewise patterned and selected portions etched away. The patterned substrate is encapsulated in a compatible, heat resistant encapsulating material. The encapsulated substrate is then annealed at a temperature of up to about 350.degree. C.
摘要翻译：通过提供具有至少一个平面GaAs层和与其邻近的至少一个AlGaAs层的超晶格等异质结构衬底来制造掩埋异质结构有源器件和无源波导的方法。单晶锗层外延沉积在超晶格基底上。一层金沉积在锗层上。金和锗层是成像图案的，并且选择的部分被蚀刻掉。图案化衬底被封装在相容的耐热封装材料中。然后将封装的衬底在高达约350℃的温度下退火

4. 发明授权

US07141455B2 Method to manufacture LDMOS transistors with improved threshold voltage control 有权
标题翻译：用改进的阈值电压控制制造LDMOS晶体管的方法
公开(公告)号：US07141455B2
公开(公告)日：2006-11-28
申请号：US10712455
申请日：2003-11-12
申请人： Binghua Hu , Howard S. Lee , Henry L. Edwards , John Lin , Vladimir N. Bolkhovsky
发明人： Binghua Hu , Howard S. Lee , Henry L. Edwards , John Lin , Vladimir N. Bolkhovsky
IPC分类号： H01L21/332
CPC分类号： H01L21/266 , H01L21/2652 , H01L29/1095 , H01L29/42368 , H01L29/66681 , H01L29/7816
摘要： A double diffused region (65), (75), (85) is formed in an epitaxial layer (20). The double diffused region is formed by first implanting light implant specie such as boron through an opening in a photoresist layer prior to a hard bake process. Subsequent to a hard bake process heavy implant specie such as arsenic can be implanted into the epitaxial layer. During subsequent processing such as LOCOS formation the double diffused region is formed. A dielectric layer (120) is formed on the epitaxial layer (20) and gate structures (130), (135) are formed over the dielectric layer (120).
摘要翻译：在外延层（20）中形成双扩散区域（65），（75），（85）。通过在硬烘烤过程之前首先将诸如硼的光注入物质在光致抗蚀剂层中的开口注入，形成双扩散区域。在硬烘烤过程之后，可以将诸如砷的重植入物种植入外延层中。在后续处理（如LOCOS形成）中形成双扩散区。在外延层（20）上形成介电层（120），并且在电介质层（120）之上形成栅极结构（130），（135）。

5. 发明授权

US07696049B2 Method to manufacture LDMOS transistors with improved threshold voltage control 有权
标题翻译：用改进的阈值电压控制制造LDMOS晶体管的方法
公开(公告)号：US07696049B2
公开(公告)日：2010-04-13
申请号：US11552198
申请日：2006-10-24
申请人： Binghua Hu , Howard S. Lee , Henry L. Edwards , John Lin , Vladimir N. Bolkhovsky
发明人： Binghua Hu , Howard S. Lee , Henry L. Edwards , John Lin , Vladimir N. Bolkhovsky
IPC分类号： H01L21/00
CPC分类号： H01L21/266 , H01L21/2652 , H01L29/1095 , H01L29/42368 , H01L29/66681 , H01L29/7816
摘要： A double diffused region (65), (75), (85) is formed in a semiconductor substrate or in an epitaxial layer (20) formed on the semiconductor substrate. The double diffused region is formed by first implanting light implant specie such as boron through an opening in a photoresist layer prior to a hard bake process. Subsequent to the hard bake process, a heavy implant species such as arsenic is implanted into the epitaxial layer. During subsequent processing, such as during LOCOS formation, a double diffused region is formed by a thermal anneal. A dielectric layer (120) is formed on the epitaxial layer (20) and gate structures (130), (135) are formed over the dielectric layer (120).
摘要翻译：在半导体衬底或形成在半导体衬底上的外延层（20）中形成双扩散区域（65），（75），（85）。通过在硬烘烤过程之前首先将诸如硼的光注入物质在光致抗蚀剂层中的开口注入，形成双扩散区域。在硬烘烤过程之后，将诸如砷的重注入物质注入到外延层中。在后续处理中，例如在LOCOS形成期间，通过热退火形成双扩散区域。在外延层（20）上形成介电层（120），并且在电介质层（120）之上形成栅极结构（130），（135）。

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