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1. 发明授权

US5388055A Semiconductor integrated circuit having polycell structure and method of designing the same 失效
标题翻译：具有多单元结构的半导体集成电路及其设计方法
公开(公告)号：US5388055A
公开(公告)日：1995-02-07
申请号：US756017
申请日：1991-09-06
申请人： Tetsu Tanizawa , Hideo Tokuda , Shigenori Ichinose , Katuzi Hirochi , Takehito Doi
发明人： Tetsu Tanizawa , Hideo Tokuda , Shigenori Ichinose , Katuzi Hirochi , Takehito Doi
IPC分类号： H01L21/82 , G06F17/50 , H01L23/528 , H01L27/02 , H01L23/48
CPC分类号： H01L23/5286 , G06F17/5068 , H01L27/0207 , H01L2924/0002
摘要： A semiconductor integrated circuit includes a substrate which has a predetermined width in a first direction and a predetermined length in a second direction which is approximately perpendicular to the first direction, a plurality of cells which are provided on the substrate and are grouped into a plurality of generally rectangular unit blocks, where each of the unit blocks are made up of cells having mutually different widths in the first direction but a common length in the second direction, first interconnections for supplying at least one power source voltage to the cells, where the first interconnections are provided independently for each unit block so as to supply the power source voltage in common to each of the cells making up the unit block, a row of first terminals of the cells, within each unit block, arranged in the first direction, a row of second terminals of the cells, within each unit block, arranged in the first direction an interconnection region at least including a region which is defined by the rows of the first and second terminals, and second interconnections which are provided within the interconnection region with respect to each unit block and connects the cells within the unit block.
摘要翻译：一种半导体集成电路包括：基板，其在大致垂直于第一方向的第二方向上具有在第一方向上的预定宽度和预定长度;多个单元，设置在基板上，并被分组为多个通常是矩形单位块，其中每个单位块由在第一方向上具有相互不同宽度但在第二方向上具有公共长度的单元组成，用于向单元提供至少一个电源电压的第一互连，其中第一为每个单元块独立地提供互连，以便将构成单元块的每个单元的公共电源电压提供给每个单元块中的在第一方向上布置的单元的一行第一端子，在每个单元块内的单元的第二端子排沿第一方向布置成至少包括a的互连区域区域，其由第一和第二端子的行限定，以及第二互连，其相对于每个单位块设置在互连区域内并连接单元块内的单元。

2. 发明授权

US5384533A Testing method, testing circuit and semiconductor integrated circuit having testing circuit 失效
标题翻译：测试方法，测试电路和具有测试电路的半导体集成电路
公开(公告)号：US5384533A
公开(公告)日：1995-01-24
申请号：US59415
申请日：1993-05-11
申请人： Hideo Tokuda , Tetsu Tanizawa
发明人： Hideo Tokuda , Tetsu Tanizawa
IPC分类号： G01R31/28 , G01R31/3185 , G06F11/22
CPC分类号： G01R31/318569 , G06F11/2273
摘要： A testing method tests functions of a semiconductor integrated circuit which has a plurality of blocks each having a main block circuit part and an output part. The testing method comprises the steps of supplying a control signal to the output part of each of the blocks in a normal mode so that each output part outputs an output data of the main block circuit part of a corresponding one of the blocks, supplying the control signal and a test data to the output part of each of the blocks in a test mode so that each output part outputs the test data which is supplied to the main block circuit part of another block, and comparing the output data and the test data in the output part of each of the blocks in the test mode and outputting a failure detection signal which is indicative of a failure in a corresponding one of the blocks when the compared output data and test data do not match in the one block.
摘要翻译：测试方法测试具有多个块的半导体集成电路的功能，每个块具有主块电路部分和输出部分。测试方法包括以正常模式向每个块的输出部分提供控制信号的步骤，使得每个输出部分输出对应的一个块的主块电路部分的输出数据，提供控制在测试模式中将每个块的输出部分的信号和测试数据发送到测试模块，使得每个输出部分输出提供给另一块的主块电路部分的测试数据，并将输出数据和测试数据进行比较在测试模式中的每个块的输出部分，并且当比较的输出数据和测试数据在一个块中不匹配时，输出指示相应的一个块中的故障的故障检测信号。

3. 发明授权

US5124776A Bipolar integrated circuit having a unit block structure 失效
标题翻译：具有单元块结构的双极集成电路
公开(公告)号：US5124776A
公开(公告)日：1992-06-23
申请号：US492898
申请日：1990-03-13
申请人： Tetsu Tanizawa , Takehito Doi , Hideo Tokuda , Shigenori Ichinose
发明人： Tetsu Tanizawa , Takehito Doi , Hideo Tokuda , Shigenori Ichinose
IPC分类号： H01L21/82 , H01L27/118
CPC分类号： H01L27/11801
摘要： A semiconductor integrated circuit comprises a plurality of first hierarchical units of logic devices each including a plurality of bipolar logic devices having a polycell structure. The bipolar logic devices have a first standardized size in a first direction and are arranged in a second direction for a second standardized size in each first hierarchical unit. Each of the first hierarchical units is defined by first and second main edges extending in the second direction for the second standardized size, and first and second side edges extending in the first direction for the first standardized size. Each of the first hierarchical units consumes a generally identical electric power and has a first power feed system extending in the second direction for the second standardized size for feeding the electric power to the bipolar logic devices therein. At least a part of the first hierarchical units are arranged in the first direction to form a plurality of second hierarchical units having respective lengths in the first direction wherein the first and second side edges are aligned in the first direction in each of the second hierarchical units. Further, the second hierarchical units are disposed such that there are at least two second hierarchical units having respective positions which are different in the second direction. Furthermore, there is provided a second power feed system extending in the first direction so as to cross the first power feed system for feeding the electric power thereto.

4. 发明授权

US4975544A Connecting structure for connecting conductors in an electronic apparatus 失效
标题翻译：电子设备连接导体的连接结构
公开(公告)号：US4975544A
公开(公告)日：1990-12-04
申请号：US323757
申请日：1989-03-15
申请人： Nobuyuki Tanaka , Taichi Saitoh , Akio Kiso , Hideo Tokuda , Tetsuya Nakajima , Minoru Takagi
发明人： Nobuyuki Tanaka , Taichi Saitoh , Akio Kiso , Hideo Tokuda , Tetsuya Nakajima , Minoru Takagi
IPC分类号： H01L23/482
CPC分类号： H01L23/4824 , H01L2924/0002
摘要： A connecting structure for connecting conductors used for wiring in a semiconductor device comprises a first conductor provided on a part of the semiconductor device for passing the flow of electrons, an insulator provided on the first conductor and formed with a contact hole, and a second conductor provided on the insulator for passing the flow of electrons, in which the second conductor is provided so as to sandwich the insulator together with a part of the first conductor. The first and second conductors are contacted to each other across the insulator at the contact hole so that the electrons flow through the contact hole. The contact hole extends in a general direction of a flow of electrons passing therethrough and has a stepped shape in which a width measured perpendicularly to the general direction of the flow of electrons increases stepwise towards the general direction of the flow of electrons.

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