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1. 发明申请

US20120149165A1 METHOD OF MANUFACTURING VARIABLE RESISTANCE MEMORY DEVICE 有权
标题翻译：制造可变电阻存储器件的方法
公开(公告)号：US20120149165A1
公开(公告)日：2012-06-14
申请号：US13242237
申请日：2011-09-23
申请人： Jeong-Hee Park , Man-Sug Kang , Hideki Horii , Hyo-Jung Kim , Jung-Hwan Park
发明人： Jeong-Hee Park , Man-Sug Kang , Hideki Horii , Hyo-Jung Kim , Jung-Hwan Park
IPC分类号： H01L21/20
CPC分类号： H01L45/06 , H01L27/1021 , H01L27/2409 , H01L27/2472 , H01L45/04 , H01L45/14 , H01L45/141 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/148 , H01L45/1616 , H01L45/1625 , H01L45/1641 , H01L45/1658 , H01L45/1683
摘要： An example embodiment relates to a method including forming a bottom electrode and an insulating layer on a substrate, the insulating layer defining a first opening that exposes a portion of the bottom electrode. The method includes forming a variable resistance material pattern, including a plurality of elements, to fill the first opening. The variable resistance material pattern may be doped with a dopant that includes at least one of the plurality of elements in the variable resistance material pattern. The method includes forming a top electrode on the variable resistance material pattern.
摘要翻译：示例性实施例涉及包括在基底上形成底部电极和绝缘层的方法，所述绝缘层限定暴露所述底部电极的一部分的第一开口。该方法包括形成包括多个元件的可变电阻材料图案以填充第一开口。可变电阻材料图案可以掺杂有包括可变电阻材料图案中的多个元件中的至少一个的掺杂剂。该方法包括在可变电阻材料图案上形成顶部电极。

2. 发明申请

US20120142141A1 METHOD OF FORMING RESISTANCE VARIABLE MEMORY DEVICE 有权
标题翻译：形成电阻可变存储器件的方法
公开(公告)号：US20120142141A1
公开(公告)日：2012-06-07
申请号：US13241315
申请日：2011-09-23
申请人： Jeong-Hee PARK , Jung-Hwan Park , Hideki Horii , Sung-Lae Cho
发明人： Jeong-Hee PARK , Jung-Hwan Park , Hideki Horii , Sung-Lae Cho
IPC分类号： H01L21/06 , H01L21/8246
CPC分类号： H01L45/1625 , H01L27/2409 , H01L27/2472 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/1683
摘要： A method of forming a resistance variable memory device, the method including forming a diode on a semiconductor substrate; forming a lower electrode on the diode; forming a first insulating film on the lower electrode, the first insulating film having an opening; forming a resistance variable film filling the opening such that the resistance variable film includes an amorphous region adjacent to a sidewall of the opening and a crystalline region adjacent to the lower electrode; and forming an upper electrode on the resistance variable film.
摘要翻译：一种形成电阻可变存储器件的方法，所述方法包括在半导体衬底上形成二极管; 在二极管上形成下电极; 在所述下电极上形成第一绝缘膜，所述第一绝缘膜具有开口; 形成填充所述开口的电阻变化膜，使得所述电阻变化膜包括与所述开口的侧壁相邻的非晶区域和与所述下部电极相邻的结晶区域; 并在电阻变化膜上形成上电极。

3. 发明申请

US20110147692A1 VARIABLE RESISTANCE MEMORY DEVICE AND METHOD OF FORMING THE SAME 有权
标题翻译：可变电阻记忆体装置及其形成方法
公开(公告)号：US20110147692A1
公开(公告)日：2011-06-23
申请号：US12973124
申请日：2010-12-20
申请人： JEONGHEE PARK , Hideki Horii , Hyeyoung Park , Jin Ho Oh , Hyun-Suk Kwon
发明人： JEONGHEE PARK , Hideki Horii , Hyeyoung Park , Jin Ho Oh , Hyun-Suk Kwon
IPC分类号： H01L45/00
CPC分类号： H01L45/16 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/124 , H01L45/1293 , H01L45/141 , H01L45/1683
摘要： Provided are a variable resistance memory device and a method of forming the same. The variable resistance memory device may include a substrate, a plurality of bottom electrodes on the substrate, and a first interlayer insulating layer including a trench formed therein. The trench exposes the bottom electrodes and extends in a first direction. The variable resistance memory device further includes a top electrode provided on the first interlayer insulating layer and extending in a second direction crossing the first direction and a plurality of variable resistance patterns provided in the trench and having sidewalls aligned with a sidewall of the top electrode.
摘要翻译：提供了一种可变电阻存储器件及其形成方法。可变电阻存储器件可以包括衬底，在衬底上的多个底部电极，以及包括形成在其中的沟槽的第一层间绝缘层。沟槽露出底部电极并沿第一方向延伸。可变电阻存储器件还包括设置在第一层间绝缘层上并沿与第一方向交叉的第二方向延伸的顶电极和设置在沟槽中并具有与顶电极的侧壁对准的侧壁的多个可变电阻图案。

4. 发明申请

US20110121852A1 PROBE CARD AND TEST APPARATUS INCLUDING THE SAME 有权
标题翻译：探针卡和测试装置，包括它们
公开(公告)号：US20110121852A1
公开(公告)日：2011-05-26
申请号：US12817826
申请日：2010-06-17
申请人： Hideki Horii , Young-kuk Kim , Mi-lim Park
发明人： Hideki Horii , Young-kuk Kim , Mi-lim Park
IPC分类号： G01R31/02 , G01R13/34 , G01R31/00
CPC分类号： G01R31/2889
摘要： A probe card and a test apparatus including the probe card for improving test reliability. The probe card may include a first input terminal Microelectromechanical Systems (MEMS) switch that connects a first input terminal and a first input probe pin, wherein the first input terminal MEMS switch comprises a control portion that receives an operation signal and a connection portion that connects the first input terminal and the first input probe pin. The probe card may further include a first output terminal MEMS switch that connects a first output terminal and a first output probe pin, wherein the first output terminal MEMS switch comprises a control portion that receives the operation signal and a connection portion that connects the first output terminal and the first output probe pin.
摘要翻译：探针卡和测试装置，包括用于提高测试可靠性的探针卡。探针卡可以包括连接第一输入端和第一输入探针的第一输入端微机电系统（MEMS）开关，其中第一输入端MEMS开关包括接收操作信号的控制部分和连接第一输入端和第一输入探针。探针卡还可以包括连接第一输出端和第一输出探针的第一输出端MEMS开关，其中第一输出端MEMS开关包括接收操作信号的控制部分和连接第一输出端端子和第一个输出探针。

5. 发明授权

US07800095B2 Phase-change memory device having phase change material pattern shared between adjacent cells and electronic product including the phase-change memory 有权
标题翻译：具有在相邻单元之间共享的相变材料图案和包括相变存储器的电子产品的相变存储器件
公开(公告)号：US07800095B2
公开(公告)日：2010-09-21
申请号：US11941173
申请日：2007-11-16
申请人： Hyeong-geun An , Hideki Horii , Jong-chan Shin , Dong-ho Ahn , Jun-soo Bae
发明人： Hyeong-geun An , Hideki Horii , Jong-chan Shin , Dong-ho Ahn , Jun-soo Bae
IPC分类号： H01L47/00
CPC分类号： H01L45/144 , G11C11/5678 , G11C13/0004 , H01L27/2409 , H01L27/2436 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/1675
摘要： Provided is a phase-change memory device including a phase-change material pattern of which strips are shared by neighboring cells. The phase-change memory device includes a plurality of bottom electrodes arranged in a matrix array. The phase-change material pattern is formed on the bottom electrodes, and the strips of the phase-change material pattern are electrically connected to the bottom electrodes. Each strip of the phase-change material pattern is connected to at least two diagonally neighboring bottom electrodes of the bottom electrodes.
摘要翻译：提供了一种相变存储器件，其包括相邻单元共享条带的相变材料图案。相变存储器件包括以矩阵阵列排列的多个底部电极。相变材料图案形成在底部电极上，相变材料图案的条带电连接到底部电极。相变材料图案的每个条带连接到底部电极的至少两个对角相邻的底部电极。

6. 发明授权

US07777212B2 Phase change memory devices including carbon-containing adhesive pattern 有权
标题翻译：相变存储器件包括含碳粘合剂图案
公开(公告)号：US07777212B2
公开(公告)日：2010-08-17
申请号：US11972198
申请日：2008-01-10
申请人： Hyeong-Geun An , Hideki Horii , Min-Young Park , Shin-Hye Kim
发明人： Hyeong-Geun An , Hideki Horii , Min-Young Park , Shin-Hye Kim
IPC分类号： H01L29/02
CPC分类号： H01L45/1658 , G11C13/0004 , G11C13/0069 , G11C2013/008 , G11C2213/35 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/1675 , H01L45/1683
摘要： Phase change memory devices include a heating electrode on a substrate and a phase change material pattern on the heating electrode. An adhesive pattern is disposed between the heating electrode and the phase change material pattern. The adhesive pattern contains carbon. Methods of fabricating phase change memory devices are also provided.
摘要翻译：相变存储器件包括衬底上的加热电极和加热电极上的相变材料图案。粘合剂图案设置在加热电极和相变材料图案之间。粘合剂图案含有碳。还提供了制造相变存储器件的方法。

7. 发明授权

US07767491B2 Methods of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07767491B2
公开(公告)日：2010-08-03
申请号：US12584321
申请日：2009-09-03
申请人： Hideki Horii , Jeonghee Park , Youngkuk Kim
发明人： Hideki Horii , Jeonghee Park , Youngkuk Kim
IPC分类号： H01L21/06
CPC分类号： H01L45/1233 , H01L45/06 , H01L45/141 , H01L45/1641 , H01L45/1683
摘要： A method of manufacturing a semiconductor device includes forming a phase change material pattern on a top surface of an insulating layer including an opening and in the opening, and forming a compressive layer compressing the phase change material pattern on the phase change material pattern.
摘要翻译：一种制造半导体器件的方法包括在包括开口和开口的绝缘层的顶表面上形成相变材料图案，并且在相变材料图案上形成压缩相变材料图案的压缩层。

8. 发明授权

US07638787B2 Phase changeable memory cell array region and method of forming the same 有权
标题翻译：相变存储单元阵列区域及其形成方法
公开(公告)号：US07638787B2
公开(公告)日：2009-12-29
申请号：US11581012
申请日：2006-10-16
申请人： Hyeong-Geun An , Hideki Horii , Sang-Yeol Kang
发明人： Hyeong-Geun An , Hideki Horii , Sang-Yeol Kang
IPC分类号： H01L29/02 , G11C11/00
CPC分类号： H01L45/144 , H01L27/2436 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/1293 , H01L45/165 , H01L45/1666
摘要： A phase changeable memory cell array region includes a lower interlayer insulating layer disposed on a semiconductor substrate. The region also includes a plurality of conductive plugs disposed through the lower interlayer insulating layer. The region also includes a phase changeable material pattern operably disposed on the lower interlayer insulating layer, the phase changeable pattern covering at least two of the plurality of conductive plugs, wherein the phase changeable material pattern includes a plurality of first regions in contact with one or more of the plurality of conductive plugs and at least one second region interposed between the plurality of the first regions, wherein the at least one second region has a lower thermal conductivity than the plurality of first regions. The phase changeable memory cell array region also includes an upper interlayer insulating layer covering at least one of the phase changeable material pattern and the lower interlayer insulating layer. The region also includes conductive patterns disposed through the upper interlayer insulating layer and electrically connected to a plurality of predetermined regions of the plurality of first regions.
摘要翻译：相变存储单元阵列区域包括设置在半导体衬底上的下层间绝缘层。该区域还包括穿过下层间绝缘层设置的多个导电插塞。所述区域还包括可操作地设置在所述下层间绝缘层上的可相变材料图案，所述相变图案覆盖所述多个导电插塞中的至少两个，其中所述相变材料图案包括多个与第多个导电插塞中的多个和插入在多个第一区域之间的至少一个第二区域，其中至少一个第二区域具有比多个第一区域更低的热导率。相变存储单元阵列区域还包括覆盖相变材料图案和下层间绝缘层中的至少一个的上层间绝缘层。该区域还包括通过上层间绝缘层设置并电连接到多个第一区域中的多个预定区域的导电图案。

9. 发明授权

US07575776B2 Reflowing of a phase changeable memory element to close voids therein 有权
标题翻译：相变存储元件的回流以使其中的空隙闭合
公开(公告)号：US07575776B2
公开(公告)日：2009-08-18
申请号：US11843847
申请日：2007-08-23
申请人： Hideki Horii
发明人： Hideki Horii
IPC分类号： B05D3/02 , B05D5/12 , H01L29/04
CPC分类号： H01L21/76816 , H01L45/06 , H01L45/122 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/1625 , H01L45/1666
摘要： A phase changeable memory element is formed by conformally forming a phase changeable material film in a contact hole on a substrate so as to create a void in the phase changeable material film in the contact hole. A capping film is formed on the phase changeable material film, and the void is at least partially closed by a thermal treatment that is sufficient to reflow the phase changeable material film in the void.
摘要翻译：相变存储元件通过在基板上的接触孔中共形形成相变材料膜而形成，从而在接触孔中的相变材料膜中产生空隙。在相变材料膜上形成覆盖膜，并且通过足以使空隙中的相变材料膜回流的热处理至少部分地封闭空隙。

10. 发明授权

US07558100B2 Phase change memory devices including memory cells having different phase change materials and related methods and systems 有权
标题翻译：相变存储器件包括具有不同相变材料的存储单元以及相关的方法和系统
公开(公告)号：US07558100B2
公开(公告)日：2009-07-07
申请号：US11881062
申请日：2007-07-25
申请人： Dong-Ho Ahn , Hideki Horii , Jun-Soo Bae
发明人： Dong-Ho Ahn , Hideki Horii , Jun-Soo Bae
IPC分类号： G11C11/00
CPC分类号： G11C11/5678 , G11C7/04 , G11C13/0004 , G11C2213/79 , H01L27/2409 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148
摘要： A phase change memory device may include an integrated circuit substrate and first and second phase change memory elements on the integrated circuit substrate. The first phase change memory element may include a first phase change material having a first crystallization temperature. The second phase change memory element may include a second phase change material having a second crystallization temperature. Moreover, the first and second crystallization temperatures may be different so that the first and second phase change memory elements are programmable at different temperatures. Related methods and systems are also discussed.
摘要翻译：相变存储器件可以包括集成电路衬底以及集成电路衬底上的第一和第二相变存储元件。第一相变存储元件可以包括具有第一结晶温度的第一相变材料。第二相变存储元件可以包括具有第二结晶温度的第二相变材料。此外，第一和第二结晶温度可以不同，使得第一和第二相变存储元件可在不同温度下编程。还讨论了相关方法和系统。

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