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1. 发明申请

US20100081263A1 Methods of manufacturing semiconductor device 有权
公开(公告)号：US20100081263A1
公开(公告)日：2010-04-01
申请号：US12584321
申请日：2009-09-03
申请人： Hideki Horii , Jeonghee Park , Youngkuk Kim
发明人： Hideki Horii , Jeonghee Park , Youngkuk Kim
IPC分类号： H01L47/00
CPC分类号： H01L45/1233 , H01L45/06 , H01L45/141 , H01L45/1641 , H01L45/1683
摘要： A method of manufacturing a semiconductor device includes forming a phase change material pattern on a top surface of an insulating layer including an opening and in the opening, and forming a compressive layer compressing the phase change material pattern on the phase change material pattern.

2. 发明申请

US20120171837A1 Semiconductor Memory Devices And Methods Of Fabricating The Same 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20120171837A1
公开(公告)日：2012-07-05
申请号：US13337999
申请日：2011-12-27
申请人： Youngkuk Kim , Insang Jeon , Youngseok Kim , Young-Lim Park , Ho-Kyun An
发明人： Youngkuk Kim , Insang Jeon , Youngseok Kim , Young-Lim Park , Ho-Kyun An
IPC分类号： H01L47/00
CPC分类号： H01L45/12 , H01L27/101 , H01L27/1021 , H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1683
摘要： Provided are semiconductor memory devices and the methods of fabricating the same. The method may include forming a plurality of diode patterns in each of a plurality of first trenches, each of the plurality of first trenches including at least two active regions, the plurality of diode patterns occupying a plurality of spaces, treating the plurality of diode patterns to form a plurality of semiconductor patterns in each of the plurality of spaces, removing portions of the plurality of semiconductor patterns to form a recess in each of the plurality of spaces, treating the of the plurality of semiconductor patterns to form a plurality of diodes in each of the plurality of spaces, forming a bottom electrode on each of the plurality of diodes, forming a plurality of memory elements on each of the bottom electrodes, and forming a plurality of upper interconnection lines on the plurality of memory elements.
摘要翻译：提供半导体存储器件及其制造方法。该方法可以包括在多个第一沟槽的每一个中形成多个二极管图案，多个第一沟槽中的每一个包括至少两个有效区域，多个二极管图案占据多个空间，处理多个二极管图案在所述多个空间中的每一个中形成多个半导体图案，去除所述多个半导体图案的部分以在所述多个空间中的每一个中形成凹部，处理所述多个半导体图案以形成多个二极管多个空间中的每一个，在所述多个二极管中的每一个上形成底部电极，在每个所述底部电极上形成多个存储元件，并且在所述多个存储元件上形成多个上部互连线。

3. 发明申请

US20120264273A1 SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120264273A1
公开(公告)日：2012-10-18
申请号：US13421280
申请日：2012-03-15
申请人： YounSeon KANG , Youngkuk Kim , Kiseok Suh
发明人： YounSeon KANG , Youngkuk Kim , Kiseok Suh
IPC分类号： H01L21/02
CPC分类号： H01L45/06 , H01L27/2472 , H01L45/141 , H01L45/1683
摘要： Semiconductor devices and methods of fabricating a semiconductor device are provided. The method includes forming a conductive region in a substrate and forming a dielectric layer on the substrate including the conductive region. The dielectric layer has an opening that exposes the conductive region. A buffer semiconductor pattern having a single crystalline state is formed on the exposed conductive region. A filling semiconductor pattern is formed in the opening using an epitaxial process that employs the single crystalline buffer semiconductor pattern as a seed layer. Related devices are also provided.
摘要翻译：提供了制造半导体器件的半导体器件和方法。该方法包括在衬底中形成导电区域，并在包括导电区域的衬底上形成电介质层。电介质层具有露出导电区域的开口。在暴露的导电区域上形成具有单晶状态的缓冲半导体图案。使用采用单晶缓冲半导体图案作为种子层的外延工艺在开口中形成填充半导体图案。还提供了相关设备。

4. 发明授权

US08652897B2 Semiconductor memory devices and methods of fabricating the same 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US08652897B2
公开(公告)日：2014-02-18
申请号：US13337999
申请日：2011-12-27
申请人： Youngkuk Kim , Insang Jeon , Youngseok Kim , Young-Lim Park , Ho-Kyun An
发明人： Youngkuk Kim , Insang Jeon , Youngseok Kim , Young-Lim Park , Ho-Kyun An
IPC分类号： H01L21/8238
CPC分类号： H01L45/12 , H01L27/101 , H01L27/1021 , H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1683
摘要： Provided are semiconductor memory devices and the methods of fabricating the same. The method may include forming a plurality of diode patterns in each of a plurality of first trenches, each of the plurality of first trenches including at least two active regions, the plurality of diode patterns occupying a plurality of spaces, treating the plurality of diode patterns to form a plurality of semiconductor patterns in each of the plurality of spaces, removing portions of the plurality of semiconductor patterns to form a recess in each of the plurality of spaces, treating the of the plurality of semiconductor patterns to form a plurality of diodes in each of the plurality of spaces, forming a bottom electrode on each of the plurality of diodes, forming a plurality of memory elements on each of the bottom electrodes, and forming a plurality of upper interconnection lines on the plurality of memory elements.
摘要翻译：提供半导体存储器件及其制造方法。该方法可以包括在多个第一沟槽的每一个中形成多个二极管图案，多个第一沟槽中的每一个包括至少两个有效区域，多个二极管图案占据多个空间，处理多个二极管图案在所述多个空间中的每一个中形成多个半导体图案，去除所述多个半导体图案的部分以在所述多个空间中的每一个中形成凹部，处理所述多个半导体图案以形成多个二极管多个空间中的每一个，在所述多个二极管中的每一个上形成底部电极，在每个所述底部电极上形成多个存储元件，并且在所述多个存储元件上形成多个上部互连线。

5. 发明授权

US07767491B2 Methods of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07767491B2
公开(公告)日：2010-08-03
申请号：US12584321
申请日：2009-09-03
申请人： Hideki Horii , Jeonghee Park , Youngkuk Kim
发明人： Hideki Horii , Jeonghee Park , Youngkuk Kim
IPC分类号： H01L21/06
CPC分类号： H01L45/1233 , H01L45/06 , H01L45/141 , H01L45/1641 , H01L45/1683
摘要： A method of manufacturing a semiconductor device includes forming a phase change material pattern on a top surface of an insulating layer including an opening and in the opening, and forming a compressive layer compressing the phase change material pattern on the phase change material pattern.
摘要翻译：一种制造半导体器件的方法包括在包括开口和开口的绝缘层的顶表面上形成相变材料图案，并且在相变材料图案上形成压缩相变材料图案的压缩层。

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