会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明申请
    • SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    • 半导体器件及其制造方法
    • US20150279857A1
    • 2015-10-01
    • US14539140
    • 2014-11-12
    • Jung-Hwan KIMHanvit YANGJintae NOHDongchul YOO
    • Jung-Hwan KIMHanvit YANGJintae NOHDongchul YOO
    • H01L27/115H01L23/00
    • H01L27/11582
    • Inventive concepts provide semiconductor memory devices and methods of fabricating the same. A stack structure and vertical channel structures are provided on a substrate. The stack structure includes insulating layers and gate electrodes alternately and repeatedly stacked on the substrate. A first vertical channel pattern is disposed in a lower portion of each vertical channel structure. A gate oxide layer is formed on a sidewall of the first vertical channel pattern. A recess region is formed in the substrate between the vertical channel structures. A buffer oxide layer is formed in the recess region. An oxidation inhibiting layer is provided in the substrate to surround the recess region. The oxidation inhibiting layer is in contact with the buffer oxide layer and inhibits growth of the buffer oxide layer.
    • 本发明的概念提供半导体存储器件及其制造方法。 堆叠结构和垂直通道结构设置在基板上。 堆叠结构包括在基板上交替重复堆叠的绝缘层和栅电极。 第一垂直通道图案设置在每个垂直通道结构的下部。 栅极氧化层形成在第一垂直沟道图案的侧壁上。 在垂直通道结构之间的衬底中形成凹陷区域。 在凹陷区域中形成缓冲氧化物层。 在基板中设置氧化抑制层以包围凹部。 氧化抑制层与缓冲氧化物层接触并抑制缓冲氧化物层的生长。
    • 4. 发明授权
    • Semiconductor device and method of fabricating the same
    • 半导体装置及其制造方法
    • US09508737B2
    • 2016-11-29
    • US14539140
    • 2014-11-12
    • Jung-Hwan KimHanvit YangJintae NohDongchul Yoo
    • Jung-Hwan KimHanvit YangJintae NohDongchul Yoo
    • H01L21/04H01L21/20H01L21/336H01L27/115H01L29/788H01L29/792
    • H01L27/11582
    • Inventive concepts provide semiconductor memory devices and methods of fabricating the same. A stack structure and vertical channel structures are provided on a substrate. The stack structure includes insulating layers and gate electrodes alternately and repeatedly stacked on the substrate. A first vertical channel pattern is disposed in a lower portion of each vertical channel structure. A gate oxide layer is formed on a sidewall of the first vertical channel pattern. A recess region is formed in the substrate between the vertical channel structures. A buffer oxide layer is formed in the recess region. An oxidation inhibiting layer is provided in the substrate to surround the recess region. The oxidation inhibiting layer is in contact with the buffer oxide layer and inhibits growth of the buffer oxide layer.
    • 本发明的概念提供半导体存储器件及其制造方法。 堆叠结构和垂直通道结构设置在基板上。 堆叠结构包括在基板上交替重复堆叠的绝缘层和栅电极。 第一垂直通道图案设置在每个垂直通道结构的下部。 栅极氧化物层形成在第一垂直沟道图案的侧壁上。 在垂直通道结构之间的衬底中形成凹陷区域。 在凹陷区域中形成缓冲氧化物层。 在基板中设置氧化抑制层以包围凹部。 氧化抑制层与缓冲氧化物层接触并抑制缓冲氧化物层的生长。