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1. 发明申请

US20150279857A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20150279857A1
公开(公告)日：2015-10-01
申请号：US14539140
申请日：2014-11-12
申请人： Jung-Hwan KIM , Hanvit YANG , Jintae NOH , Dongchul YOO
发明人： Jung-Hwan KIM , Hanvit YANG , Jintae NOH , Dongchul YOO
IPC分类号： H01L27/115 , H01L23/00
CPC分类号： H01L27/11582
摘要： Inventive concepts provide semiconductor memory devices and methods of fabricating the same. A stack structure and vertical channel structures are provided on a substrate. The stack structure includes insulating layers and gate electrodes alternately and repeatedly stacked on the substrate. A first vertical channel pattern is disposed in a lower portion of each vertical channel structure. A gate oxide layer is formed on a sidewall of the first vertical channel pattern. A recess region is formed in the substrate between the vertical channel structures. A buffer oxide layer is formed in the recess region. An oxidation inhibiting layer is provided in the substrate to surround the recess region. The oxidation inhibiting layer is in contact with the buffer oxide layer and inhibits growth of the buffer oxide layer.
摘要翻译：本发明的概念提供半导体存储器件及其制造方法。堆叠结构和垂直通道结构设置在基板上。堆叠结构包括在基板上交替重复堆叠的绝缘层和栅电极。第一垂直通道图案设置在每个垂直通道结构的下部。栅极氧化层形成在第一垂直沟道图案的侧壁上。在垂直通道结构之间的衬底中形成凹陷区域。在凹陷区域中形成缓冲氧化物层。在基板中设置氧化抑制层以包围凹部。氧化抑制层与缓冲氧化物层接触并抑制缓冲氧化物层的生长。

2. 发明授权

US09799657B2 Method of manufacturing a three-dimensional semiconductor memory device 有权
公开(公告)号：US09799657B2
公开(公告)日：2017-10-24
申请号：US15302032
申请日：2014-06-23
申请人： Jintae Noh , Bio Kim , Su-Jin Shin , Hanvit Yang , Kihyun Hwang
发明人： Jintae Noh , Bio Kim , Su-Jin Shin , Hanvit Yang , Kihyun Hwang
IPC分类号： H01L21/033 , H01L27/105 , H01L21/02 , H01L21/311 , H01L29/40
CPC分类号： H01L27/1052 , H01L21/02323 , H01L21/02532 , H01L21/02595 , H01L21/0332 , H01L21/31144 , H01L21/32105 , H01L27/11582 , H01L29/401 , H01L29/7926
摘要： The inventive concepts provide methods of manufacturing a semiconductor device. The method includes forming a thin layer structure including insulating layers and sacrificial layers alternately and repeatedly stacked on a substrate, forming a through-hole penetrating the thin layer structure and exposing the substrate, forming a semiconductor layer covering an inner sidewall of the through-hole and partially filling the through-hole, oxidizing a first portion of the semiconductor layer to form a first insulating layer, and injecting oxygen atoms into a second portion of the semiconductor layer. An oxygen atomic concentration of the second portion is lower than that of the first insulating layer. Oxidizing the first portion and injecting the oxygen atoms into the second portion are performed using an oxidation process at the same time.

3. 发明申请

US20170162578A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE 有权
公开(公告)号：US20170162578A1
公开(公告)日：2017-06-08
申请号：US15302032
申请日：2014-06-23
申请人： Jintae NOH , Bio KIM , Su-Jin SHIN , Hanvit YANG , Kihyun HWANG
发明人： Jintae NOH , Bio KIM , Su-Jin SHIN , Hanvit YANG , Kihyun HWANG
IPC分类号： H01L27/105 , H01L29/40 , H01L21/311 , H01L21/02 , H01L21/033
CPC分类号： H01L27/1052 , H01L21/02323 , H01L21/02532 , H01L21/02595 , H01L21/0332 , H01L21/31144 , H01L21/32105 , H01L27/11582 , H01L29/401 , H01L29/7926
摘要： The inventive concepts provide methods of manufacturing a semiconductor device. The method includes forming a thin layer structure including insulating layers and sacrificial layers alternately and repeatedly stacked on a substrate, forming a through-hole penetrating the thin layer structure and exposing the substrate, forming a semiconductor layer covering an inner sidewall of the through-hole and partially filling the through-hole, oxidizing a first portion of the semiconductor layer to form a first insulating layer, and injecting oxygen atoms into a second portion of the semiconductor layer. An oxygen atomic concentration of the second portion is lower than that of the first insulating layer. Oxidizing the first portion and injecting the oxygen atoms into the second portion are performed using an oxidation process at the same time.

4. 发明授权

US09508737B2 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09508737B2
公开(公告)日：2016-11-29
申请号：US14539140
申请日：2014-11-12
申请人： Jung-Hwan Kim , Hanvit Yang , Jintae Noh , Dongchul Yoo
发明人： Jung-Hwan Kim , Hanvit Yang , Jintae Noh , Dongchul Yoo
IPC分类号： H01L21/04 , H01L21/20 , H01L21/336 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11582
摘要： Inventive concepts provide semiconductor memory devices and methods of fabricating the same. A stack structure and vertical channel structures are provided on a substrate. The stack structure includes insulating layers and gate electrodes alternately and repeatedly stacked on the substrate. A first vertical channel pattern is disposed in a lower portion of each vertical channel structure. A gate oxide layer is formed on a sidewall of the first vertical channel pattern. A recess region is formed in the substrate between the vertical channel structures. A buffer oxide layer is formed in the recess region. An oxidation inhibiting layer is provided in the substrate to surround the recess region. The oxidation inhibiting layer is in contact with the buffer oxide layer and inhibits growth of the buffer oxide layer.
摘要翻译：本发明的概念提供半导体存储器件及其制造方法。堆叠结构和垂直通道结构设置在基板上。堆叠结构包括在基板上交替重复堆叠的绝缘层和栅电极。第一垂直通道图案设置在每个垂直通道结构的下部。栅极氧化物层形成在第一垂直沟道图案的侧壁上。在垂直通道结构之间的衬底中形成凹陷区域。在凹陷区域中形成缓冲氧化物层。在基板中设置氧化抑制层以包围凹部。氧化抑制层与缓冲氧化物层接触并抑制缓冲氧化物层的生长。

5. 发明申请

US20130115761A1 Methods of Forming a Semiconductor Device 有权
标题翻译：形成半导体器件的方法
公开(公告)号：US20130115761A1
公开(公告)日：2013-05-09
申请号：US13724632
申请日：2012-12-21
申请人： Jung Ho Kim , Sunghae Lee , Hanvit Yang , Dongwoo Kim , Chaeho Kim , Daehyun Jang , Ju-Eun Kim , Yong-Hoon Son , Sangryol Yang , Myoungbum Lee , Kihyun Hwang
发明人： Jung Ho Kim , Sunghae Lee , Hanvit Yang , Dongwoo Kim , Chaeho Kim , Daehyun Jang , Ju-Eun Kim , Yong-Hoon Son , Sangryol Yang , Myoungbum Lee , Kihyun Hwang
IPC分类号： H01L21/04
CPC分类号： H01L21/04 , H01L27/11582 , H01L29/66833 , H01L29/7926
摘要： Methods of forming a semiconductor device are provided. The methods may include forming first and second layers that are alternately and repeatedly stacked on a substrate, and forming an opening penetrating the first and second layers. The methods may also include forming a first semiconductor pattern in the opening. The methods may additionally include forming an insulation pattern on the first semiconductor pattern. The methods may further include forming a second semiconductor pattern on the insulation pattern. The methods may also include providing dopants in the first semiconductor pattern. Moreover, the methods may include thermally treating a portion of the first semiconductor pattern to form a third semiconductor pattern.
摘要翻译：提供了形成半导体器件的方法。所述方法可以包括形成在衬底上交替和重复堆叠的第一和第二层，以及形成穿透第一层和第二层的开口。所述方法还可以包括在开口中形成第一半导体图案。所述方法还可以包括在第一半导体图案上形成绝缘图案。所述方法还可以包括在绝缘图案上形成第二半导体图案。所述方法还可以包括在第一半导体图案中提供掺杂剂。此外，所述方法可以包括热处理第一半导体图案的一部分以形成第三半导体图案。

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