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1. 发明申请

US20080265385A1 Semiconductor package using copper wires and wire bonding method for the same 审中-公开
标题翻译：半导体封装采用铜线和引线接合方式相同
公开(公告)号：US20080265385A1
公开(公告)日：2008-10-30
申请号：US12215543
申请日：2008-06-27
申请人： Han-Lung Tsai , Chih-Ming Huang , Cheng-Hsu Hsiao
发明人： Han-Lung Tsai , Chih-Ming Huang , Cheng-Hsu Hsiao
IPC分类号： H01L21/60 , H01L23/495
CPC分类号： H01L24/85 , H01L23/49811 , H01L24/45 , H01L24/48 , H01L24/78 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/4845 , H01L2224/48465 , H01L2224/48475 , H01L2224/4848 , H01L2224/48482 , H01L2224/48499 , H01L2224/48599 , H01L2224/78301 , H01L2224/85051 , H01L2224/85181 , H01L2224/85205 , H01L2224/85444 , H01L2224/85455 , H01L2224/85986 , H01L2924/00014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/15787 , H01L2924/181 , H01L2924/00 , H01L2924/00015 , H01L2924/00012 , H01L2224/4554
摘要： A semiconductor package using copper wires and a wire bonding method for the same are proposed. The package includes a carrier having fingers and a chip mounted on the carrier. The method includes implanting stud bumps on the fingers of the carrier and electrically connecting the chip and the carrier by copper wires with one ends of the copper wires being bonded to bond pads of the chip and the other ends of the copper wires being bonded to the stud bumps on the carrier. The implanted stud bumps on the carrier improve bondability of the copper wires to the carrier and thus prevent stitch lift. With good bonding, residues of copper wires left behind after a bonding process have even tail ends and uniform tail length to enable fabrication of solder balls of uniform size, thereby eliminating a conventional step of implanting stud bumps on the bond pads of chips and preventing ball lift from occurring.
摘要翻译：提出了使用铜线的半导体封装及其引线接合方法。封装包括具有指状物的载体和安装在载体上的芯片。该方法包括在支架的指状物上注入螺柱凸块，并用铜线电连接芯片和载体，铜线的一端被接合到芯片的接合焊盘，并且铜线的另一端被接合到支架上的螺柱凸起。载体上植入的柱形突起提高了铜线对载体的粘结性，从而防止了针迹提升。通过良好的接合，在接合工艺之后留下的铜线的残留物具有均匀的尾端和均匀的尾部长度，以使得能够制造均匀尺寸的焊球，从而消除了在芯片的接合焊盘上植入凸块凸起并防止球的常规步骤提升不发生。

2. 发明授权

US07713846B2 Process applied to semiconductor 有权
标题翻译：工艺应用于半导体
公开(公告)号：US07713846B2
公开(公告)日：2010-05-11
申请号：US12104947
申请日：2008-04-17
申请人： Ru-Sheng Liu , Han-Lung Tsai , Cheng-Hsu Hsiao
发明人： Ru-Sheng Liu , Han-Lung Tsai , Cheng-Hsu Hsiao
IPC分类号： H01L21/76
CPC分类号： H01L21/67132 , H01L21/6835 , H01L21/6836 , H01L21/78 , H01L24/29 , H01L24/32 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2221/68354 , H01L2224/32145 , H01L2224/83191 , H01L2224/83192 , H01L2224/83193 , H01L2224/83856 , H01L2225/0651 , H01L2924/01005 , H01L2924/01033 , H01L2924/01047 , H01L2924/01082 , H01L2924/07802 , H01L2924/3511 , H01L2924/3512 , H01L2924/00
摘要： A process applied to grinding, dicing, and/or stacking semiconductors is disclosed. One of its features is that after transparent material is stuck on its active surface, a semiconductor is ground from another surface thereof to become thinner, then take advantage of transparency of the transparent material to cut the transparent material and the semiconductor, to obtain at least one smaller semiconductor unit such as die or chip. Another feature is that the transparent material remains sticking to the active surface of the die by an adhesion layer until the die is attached to a carrier or another die, and then the transparent material and the adhesion layer are removed by taking advantage of a function of the adhesion layer: receiving a ray to lose adhesion between it and the active surface. Preferably the ray reaches the adhesion layer via the transparent material stuck on the active surface of the die.
摘要翻译：公开了一种应用于研磨，切割和/或堆叠半导体的方法。其特征之一是在将透明材料粘贴在其活性表面上之后，从其另一表面研磨半导体以变薄，然后利用透明材料的透明度来切割透明材料和半导体，以获得至少一个较小的半导体单元，如芯片或芯片。另一个特征是透明材料通过粘合层保持粘附到模具的活性表面，直到模具附接到载体或另一个模具，然后通过利用透明材料和粘合层的功能去除透明材料和粘附层粘合层：接收光线以失去其与活性表面之间的粘附。优选地，光线通过粘附在模具的有效表面上的透明材料到达粘附层。

3. 发明申请

US20080213980A1 Process Applied to Semiconductor 有权
标题翻译：工艺应用于半导体
公开(公告)号：US20080213980A1
公开(公告)日：2008-09-04
申请号：US12104947
申请日：2008-04-17
申请人： Ru-Sheng Liu , Han-Lung Tsai , Cheng-Hsu Hsiao
发明人： Ru-Sheng Liu , Han-Lung Tsai , Cheng-Hsu Hsiao
IPC分类号： H01L21/304
CPC分类号： H01L21/67132 , H01L21/6835 , H01L21/6836 , H01L21/78 , H01L24/29 , H01L24/32 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2221/68354 , H01L2224/32145 , H01L2224/83191 , H01L2224/83192 , H01L2224/83193 , H01L2224/83856 , H01L2225/0651 , H01L2924/01005 , H01L2924/01033 , H01L2924/01047 , H01L2924/01082 , H01L2924/07802 , H01L2924/3511 , H01L2924/3512 , H01L2924/00
摘要： A process applied to grinding, dicing, and/or stacking semiconductors is disclosed. One of its features is that after transparent material is stuck on its active surface, a semiconductor is ground from another surface thereof to become thinner, then take advantage of transparency of the transparent material to cut the transparent material and the semiconductor, to obtain at least one smaller semiconductor unit such as die or chip. Another feature is that the transparent material remains sticking to the active surface of the die by an adhesion layer until the die is attached to a carrier or another die, and then the transparent material and the adhesion layer are removed by taking advantage of a function of the adhesion layer: receiving a ray to lose adhesion between it and the active surface. Preferably the ray reaches the adhesion layer via the transparent material stuck on the active surface of the die.
摘要翻译：公开了一种应用于研磨，切割和/或堆叠半导体的方法。其特征之一是在将透明材料粘贴在其活性表面上之后，从其另一表面研磨半导体以变薄，然后利用透明材料的透明度来切割透明材料和半导体，以获得至少一个较小的半导体单元，如芯片或芯片。另一个特征是透明材料通过粘合层保持粘附到模具的活性表面，直到模具附接到载体或另一个模具，然后通过利用透明材料和粘合层的功能去除透明材料和粘附层粘合层：接收光线以失去其与活性表面之间的粘附。优选地，光线通过粘附在模具的有效表面上的透明材料到达粘附层。

4. 发明申请

US20060137420A1 Process applied to semiconductor 审中-公开
标题翻译：工艺应用于半导体
公开(公告)号：US20060137420A1
公开(公告)日：2006-06-29
申请号：US11319110
申请日：2005-12-27
申请人： Ru- Sheng Liu , Han-Lung Tsai , Cheng-Hsu Hsiao
发明人： Ru- Sheng Liu , Han-Lung Tsai , Cheng-Hsu Hsiao
IPC分类号： B21C23/00
CPC分类号： H01L21/6835 , H01L21/67132 , H01L21/6836 , H01L21/78 , H01L2221/68327 , H01L2221/6834 , H01L2224/32145 , H01L2924/3511
摘要： A process applied to grinding, dicing, and/or stacking semiconductors is disclosed. One feature of the process is that after transparent material is stuck on its active surface, a semiconductor is ground from another surface thereof to become thinner, then the semiconductor is diced, by taking advantage of transparency of the transparent material, from its active surface, to obtain at least one smaller semiconductor unit such as die/dice or chip(s). Another feature is that the transparent material remains sticking to the active surface of the die by an adhesion layer until the die is attached to a carrier or another die, and then the transparent material and the adhesion layer are removed by taking advantage of a function of the adhesion layer: receiving a ray to lose adhesion between it and the active surface. Preferably the ray reaches the adhesion layer via the transparent material stuck on the active surface of the die.
摘要翻译：公开了一种应用于研磨，切割和/或堆叠半导体的方法。该方法的一个特征是，在透明材料粘附在其有效表面上之后，从其另一表面研磨半导体以变薄，然后通过利用透明材料的透明度从其活性表面切割半导体，以获得至少一个较小的半导体单元，例如芯片/芯片或芯片。另一个特征是透明材料通过粘合层保持粘附到模具的活性表面，直到模具附接到载体或另一个模具，然后通过利用透明材料和粘合层的功能去除透明材料和粘附层粘合层：接收光线以失去其与活性表面之间的粘附。优选地，光线通过粘附在模具的有效表面上的透明材料到达粘附层。

5. 发明申请

US20090134455A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD 审中-公开
标题翻译：半导体器件和制造方法
公开(公告)号：US20090134455A1
公开(公告)日：2009-05-28
申请号：US11946016
申请日：2007-11-27
申请人： Shih-Fang Lin , Meng-Yen Hsieh , Yi-Tsung Jan , Sung-Min Wei , Chia-Yi Lee , Chun-Yao Li , Han-Lung Tsai , Zhe-Xiong Wu , Wen-Tsung Wang
发明人： Shih-Fang Lin , Meng-Yen Hsieh , Yi-Tsung Jan , Sung-Min Wei , Chia-Yi Lee , Chun-Yao Li , Han-Lung Tsai , Zhe-Xiong Wu , Wen-Tsung Wang
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7836 , H01L29/1087 , H01L29/66575
摘要： A semiconductor device including a substrate, a first well, a second well, a gate, a first doped region, and a second doped region. The substrate includes a first conductive type. The first well includes a second conductive type and is formed in the substrate. The second well includes the second conductive type and is formed in the substrate. The gate is formed on the substrate and overlaps the first and the second wells. The first doped region includes the second conductive type. The first doped region is formed in the first well and self-aligned with the gate. The second doped region includes the second conductive type. The second doped region is formed in the second well and self-aligned with the gate. The gate, the first and the second doped regions constitute a transistor.
摘要翻译：一种半导体器件，包括衬底，第一阱，第二阱，栅极，第一掺杂区域和第二掺杂区域。基板包括第一导电类型。第一阱包括第二导电类型并且形成在衬底中。第二阱包括第二导电类型并形成在衬底中。栅极形成在衬底上并与第一和第二阱重叠。第一掺杂区域包括第二导电类型。第一掺杂区形成在第一阱中并与栅极自对准。第二掺杂区域包括第二导电类型。第二掺杂区形成在第二阱中并与栅极自对准。栅极，第一和第二掺杂区域构成晶体管。

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