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    • 2. 发明申请
    • PHASE CONTROL THYRISTOR
    • US20170243966A1
    • 2017-08-24
    • US15421128
    • 2017-01-31
    • ABB Schweiz AG
    • Marco BelliniJan Vobecky
    • H01L29/74H01L29/66H01L29/08
    • H01L29/7428H01L29/0839H01L29/66363H01L29/74
    • A thyristor, in particular a phase control thyristor, is disclosed with comprises: a) a semiconductor slab, in particular a semiconductor wave or die, in which a thyristor structure is formed, b) a cathode metallization formed on a cathode region on a cathode side surface of the semiconductor slab, c) a gate metallization formed on a gate region on the cathode side surface of the semiconductor slab, d) a plurality of N discrete emitter shorts, arranged at points Pi in the cathode region, said points having point locations xi, with iε{1; . . . ; N}, e) the points Pl defining a Delaunay triangulation comprising a plurality of triangles Tj with jε{1; . . . ; M), wherein f) for a first subset of triangles Tl with lεS1⊂{1; . . . ; M), g) with each triangle Tl being characterized by a geometric quantity having values qT,l with lεS1⊂{1; . . . ; M), said geometric quantity having a mean value μ, and i) a coefficient of variation of the values qT,l with lεS1 is smaller than 0.1, preferably smaller than 0.05, and/or ii) an absolute value of a skewedness of the geometric quantities qT,l with lεS1 is smaller than 5, preferably smaller than 1, and/or iii) a Kurtosis of the geometric quantities qT,l with lεS1 is smaller than 20, preferably smaller than 10, and h) for a second subset of triangles Tm with mεS2⊂S1, for which the respective geometric quantities qT,m with mεS2 deviate from the mean value by more than a predetermined amount, in particular by more than 30%, (1) a quotient of a standard deviation of the quantities qT,m with mεS2 and a mean squared value of the geometric quantity qT,l with lεS1 is less than 1 or less than 0.1, and/or a quotient of a number of triangles in the second subset and a number of triangles in the first subset is less than
    • 6. 发明申请
    • GATE AMPLIFICATION TRIAC
    • 门式放大器TRIAC
    • US20130105855A1
    • 2013-05-02
    • US13658670
    • 2012-10-23
    • Yannick Hague
    • Yannick Hague
    • H01L29/747
    • H01L29/747H01L29/0638H01L29/0692H01L29/7428
    • A gate amplification triac including in a semiconductor substrate of a first conductivity type a vertical triac and a lateral bipolar transistor having its emitter connected to the triac gate, its base connected to a control terminal, and its collector connected to a terminal intended to be connected to a first reference voltage, the main terminal of the triac on the side of the transistor being intended to be connected to a second reference voltage, the transistor being formed in a first well of the second conductivity type and the triac comprising on the transistor side a second well of the second conductivity type, the first and second wells being formed so that the substrate-well breakdown voltage of the transistor is greater than the substrate-well breakdown voltage of the triac by at least the difference between the first and second reference voltages.
    • 一种栅极放大三端双向可控硅开关元件,包括在第一导电类型的半导体衬底中的垂直三端双向可控硅开关元件和横向双极晶体管,其发射极连接到三端双向可控硅开关栅极,其基极连接到控制端子,并且其集电极连接到要连接的端子 在第一参考电压下,晶体管侧面上的三端双向可控硅开关的主端子将被连接到第二参考电压,晶体管形成在第二导电类型的第一阱中,并且三端双向可控硅开关元件包括在晶体管侧 第二导电类型的第二阱,第一阱和第二阱形成为使得晶体管的衬底井击穿电压大于三端双向可控硅开关元件的衬底 - 阱击穿电压至少第一和第二参考点之间的差值 电压。