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1. 发明申请

US20100103401A1 METHOD AND DEVICE FOR FORMING POLY-SILICON FILM 审中-公开
标题翻译：形成聚硅膜的方法和装置
公开(公告)号：US20100103401A1
公开(公告)日：2010-04-29
申请号：US12652566
申请日：2010-01-05
申请人： Fang-Tsun Chu , Jia-Xing Lin
发明人： Fang-Tsun Chu , Jia-Xing Lin
IPC分类号： G03F7/20 , G03F1/00
CPC分类号： H01L21/0268 , B23K26/066 , H01L21/02532
摘要： A method and a device for forming a poly-silicon film, using sequential lateral solidification (SLS) by laser irradiation through an optical device to pattern the laser beam so as to lengthen the crystalline grains and enhance the throughput. The optical device comprises a plurality of first transparent regions, a plurality of second transparent regions and a plurality of final transparent regions. The plurality of second transparent regions are disposed between the plurality of first transparent regions and the plurality of final transparent regions. The first transparent regions and the second transparent regions have a first width W1 and a first length L1, and the final transparent regions have a second width W2 and a second length L2. An mth first transparent region of the plurality of first transparent regions and an mth second transparent region of the plurality of second transparent regions are arranged in a tier-shape. An mth final transparent region of the plurality of final transparent regions is extended from the mth second transparent region of the plurality of second transparent regions.
摘要翻译：一种用于形成多晶硅膜的方法和装置，其通过使用光学装置的激光照射使用顺序侧向固化（SLS）来对激光束进行图案化，以延长晶粒并提高生产量。光学装置包括多个第一透明区域，多个第二透明区域和多个最终透明区域。多个第二透明区域设置在多个第一透明区域和多个最终透明区域之间。第一透明区域和第二透明区域具有第一宽度W1和第一长度L1，并且最终透明区域具有第二宽度W2和第二长度L2。多个第一透明区域的第m个第一透明区域和多个第二透明区域的第m个第二透明区域被布置成层状。多个最终透明区域的第m个最终透明区域从多个第二透明区域的第m个第二透明区域延伸。

2. 发明授权

US07579123B2 Method for crystallizing amorphous silicon into polysilicon and mask used therefor 有权
标题翻译：将非晶硅结晶成多晶硅的方法和用于其的掩模
公开(公告)号：US07579123B2
公开(公告)日：2009-08-25
申请号：US11557947
申请日：2006-11-08
申请人： Fang-Tsun Chu , Yu-Cheng Chen
发明人： Fang-Tsun Chu , Yu-Cheng Chen
IPC分类号： G03F1/00
CPC分类号： C30B29/06 , B23K26/066 , C30B13/24 , C30B13/30 , H01L21/0242 , H01L21/02422 , H01L21/02532 , H01L21/0268 , H01L21/02691
摘要： A mask for laser-crystallizing amorphous silicon into polysilicon is provided. The mask comprises a transparent substrate having a first block, a second block, and a third block with equal sizes. The second block is located between the first block and the third block. The first block includes a plurality of first transmission regions and a plurality of first opaque regions located between the first transmission regions. The second block includes a plurality of second transmission regions correspond to the first opaque regions and a plurality of second opaque regions located between the second transmission regions and corresponds to the first transmission regions. The third block includes a plurality of third transmission regions arranged corresponding to the centers of the first transmission regions and corresponding to centers of the second transmission regions and a plurality of third opaque regions located between the third transmission regions.
摘要翻译：提供了一种用于将非晶硅激光结晶成多晶硅的掩模。掩模包括具有第一块，第二块和具有相同尺寸的第三块的透明衬底。第二块位于第一块和第三块之间。第一块包括多个第一透射区域和位于第一透射区域之间的多个第一不透明区域。第二块包括对应于第一不透明区域的多个第二透射区域和位于第二透射区域之间并对应于第一透射区域的多个第二不透明区域。第三块包括对应于第一透射区域的中心并且对应于第二透射区域的中心布置的多个第三透射区域和位于第三透射区域之间的多个第三不透明区域。

3. 发明申请

US20080233718A1 Method of Semiconductor Thin Film Crystallization and Semiconductor Device Fabrication 审中-公开
标题翻译：半导体薄膜结晶和半导体器件制造方法
公开(公告)号：US20080233718A1
公开(公告)日：2008-09-25
申请号：US11689498
申请日：2007-03-21
申请人： Jia-Xing Lin , Fang-Tsun Chu , Hung-Tse Chen
发明人： Jia-Xing Lin , Fang-Tsun Chu , Hung-Tse Chen
IPC分类号： H01L21/20
CPC分类号： H01L21/268 , H01L21/02532 , H01L21/02675 , H01L27/1281 , H01L29/42384 , H01L29/66757
摘要： A method of fabricating a semiconductor device includes providing a substrate, forming an amorphous silicon layer over the substrate, forming a patterned heat retaining layer over the amorphous silicon layer, doping the amorphous silicon layer to form a pair of doped regions in the amorphous silicon layer by using the patterned heat retaining layer as a mask, and irradiating the amorphous silicon layer to activate the pair of doped regions, forming a pair of activated regions, and form a crystallized region between the pair of activated regions.
摘要翻译：制造半导体器件的方法包括提供衬底，在衬底上形成非晶硅层，在非晶硅层上形成图案化的保温层，掺杂非晶硅层以在非晶硅层中形成一对掺杂区域通过使用图案化保温层作为掩模，并且照射非晶硅层以激活该对掺杂区域，形成一对激活区域，并在该对激活区域之间形成结晶区域。

4. 发明申请

US20070196743A1 METHOD FOR CRYSTALLIZING AMORPHOUS SILICON INTO POLYSILICON AND MASK USED THEREFOR 有权
标题翻译：将非晶硅结晶成多晶硅和其使用的掩模的方法
公开(公告)号：US20070196743A1
公开(公告)日：2007-08-23
申请号：US11557947
申请日：2006-11-08
申请人： Fang-Tsun Chu , Yu-Cheng Chen
发明人： Fang-Tsun Chu , Yu-Cheng Chen
IPC分类号： C30B28/12 , C30B28/14 , C30B23/00 , G03F1/00 , C30B25/00
CPC分类号： C30B29/06 , B23K26/066 , C30B13/24 , C30B13/30 , H01L21/0242 , H01L21/02422 , H01L21/02532 , H01L21/0268 , H01L21/02691
摘要： A mask for laser-crystallizing amorphous silicon into polysilicon is provided. The mask comprises a transparent substrate having a first block, a second block, and a third block with equal sizes. The second block is located between the first block and the third block. The first block includes a plurality of first transmission regions and a plurality of first opaque regions located between the first transmission regions. The second block includes a plurality of second transmission regions correspond to the first opaque regions and a plurality of second opaque regions located between the second transmission regions and corresponds to the first transmission regions. The third block includes a plurality of third transmission regions arranged corresponding to the centers of the first transmission regions and corresponding to centers of the second transmission regions and a plurality of third opaque regions located between the third transmission regions.
摘要翻译：提供了一种用于将非晶硅激光结晶成多晶硅的掩模。掩模包括具有第一块，第二块和具有相同尺寸的第三块的透明衬底。第二块位于第一块和第三块之间。第一块包括多个第一透射区域和位于第一透射区域之间的多个第一不透明区域。第二块包括对应于第一不透明区域的多个第二透射区域和位于第二透射区域之间并对应于第一透射区域的多个第二不透明区域。第三块包括对应于第一透射区域的中心并且对应于第二透射区域的中心布置的多个第三透射区域和位于第三透射区域之间的多个第三不透明区域。

5. 发明申请

US20070190705A1 Method for forming poly-silicon thin-film device 审中-公开
标题翻译：多晶硅薄膜器件形成方法
公开(公告)号：US20070190705A1
公开(公告)日：2007-08-16
申请号：US11524440
申请日：2006-09-21
申请人： Fang-Tsun Chu , Yu-Cheng Chen
发明人： Fang-Tsun Chu , Yu-Cheng Chen
IPC分类号： H01L21/84
CPC分类号： H01L29/04 , H01L27/1296 , H01L29/78696
摘要： A method for forming a poly-silicon thin-film device, comprising steps of: providing a substrate; forming a poly-silicon film on the substrate, the poly-silicon film comprising a plurality of poly-silicon grains oriented in a grain growth direction; and forming a plurality of thin-film transistors, each of the thin-film transistors including a channel region formed from a portion of the poly-silicon film; wherein at least one channel region has an equivalent parallel channel region with a channel direction parallel to the grain growth direction and an equivalent perpendicular channel region with a channel direction perpendicular to the grain growth direction.
摘要翻译：一种形成多晶硅薄膜器件的方法，包括以下步骤：提供衬底; 在所述基板上形成多晶硅膜，所述多晶硅膜包括沿晶粒生长方向取向的多个多晶硅晶粒; 以及形成多个薄膜晶体管，每个所述薄膜晶体管包括由所述多晶硅膜的一部分形成的沟道区; 其中至少一个沟道区具有平行于晶粒生长方向的沟道方向的等效平行沟道区和具有垂直于晶粒生长方向的沟道方向的等效垂直沟道区。

6. 发明申请

US20050269571A1 Method of forming thin-film transistor devices with electro-static discharge protection 有权
标题翻译：用静电放电保护形成薄膜晶体管器件的方法
公开(公告)号：US20050269571A1
公开(公告)日：2005-12-08
申请号：US11203346
申请日：2005-08-12
申请人： Chen-Ming Chen , Fang-Tsun Chu , Jiun-Jye Chang
发明人： Chen-Ming Chen , Fang-Tsun Chu , Jiun-Jye Chang
IPC分类号： H01L21/00 , H01L21/77 , H01L21/84 , H01L23/60 , H01L27/01 , H01L27/02 , H01L27/12 , H01L29/10 , H01L29/78
CPC分类号： H01L27/12 , H01L27/0248 , H01L27/124
摘要： A silicon layer is formed on a substrate, and then the silicon layer is patterned, and source regions, drain regions and connectors, all with the same conductivity, are formed. The source regions are connected with the drain regions electrically by the connectors, and short circuits are thus constructed. Then, subsequent procedures of thin film transistor fabrication are performed in turn. Finally, when the source/drain metal is patterned to form data lines, the connectors are cut off by etching as the source/drain metal is etched.
摘要翻译：在衬底上形成硅层，然后对硅层进行构图，形成全部具有相同导电性的源区，漏区和连接器。源极区域通过连接器与漏极区域电连接，从而构成短路。然后依次执行薄膜晶体管制造的后续步骤。最后，当源极/漏极金属被图案化以形成数据线时，当蚀刻源极/漏极金属时，通过蚀刻来切断连接器。

7. 发明授权

US09245852B2 ESD protection for 2.5D/3D integrated circuit systems 有权
标题翻译： 2.5D / 3D集成电路系统的ESD保护
公开(公告)号：US09245852B2
公开(公告)日：2016-01-26
申请号：US13227502
申请日：2011-09-08
申请人： Chia-Hui Chen , Fang-Tsun Chu
发明人： Chia-Hui Chen , Fang-Tsun Chu
IPC分类号： H05K7/00 , H01L23/552 , H01L27/02 , H01L25/065
CPC分类号： H01L27/0292 , H01L23/49811 , H01L23/49827 , H01L23/552 , H01L23/60 , H01L23/62 , H01L25/0652 , H01L25/0655 , H01L2224/16225 , H01L2224/16238 , H01L2224/81193 , H01L2924/15192 , H01L2924/15311 , H01L2924/157
摘要： An integrated circuit structure includes first and second integrated circuit devices disposed on a interposer. Each integrated circuit device has electrostatic discharge (ESD) protection circuitry therein connected to an internal ESD bus. The first and second integrated circuit devices communicate with one another through the interposer. The interposer includes an ESD bus electrically connected to the ESD busses of the first and second integrated circuit devices for providing cross-device ESD protection for the integrated circuit devices.
摘要翻译：集成电路结构包括设置在插入器上的第一和第二集成电路器件。每个集成电路器件具有连接到内部ESD总线的静电放电（ESD）保护电路。第一和第二集成电路器件通过插入器彼此通信。插入器包括电连接到第一和第二集成电路器件的ESD总线的ESD总线，用于为集成电路器件提供交叉器件ESD保护。

8. 发明授权

US08569129B2 Device-manufacturing scheme for increasing the density of metal patterns in inter-layer dielectrics 有权
标题翻译：用于增加层间电介质中金属图案密度的器件制造方案
公开(公告)号：US08569129B2
公开(公告)日：2013-10-29
申请号：US13149547
申请日：2011-05-31
申请人： Wei Yu Ma , Fang-Tsun Chu , Kvei-Feng Yen , Yao-Bin Wang
发明人： Wei Yu Ma , Fang-Tsun Chu , Kvei-Feng Yen , Yao-Bin Wang
IPC分类号： H01L21/8234 , H01L21/336 , H01L21/8238 , H01L21/20 , H01L21/3205
CPC分类号： H01L23/5226 , H01L21/76816 , H01L21/7684 , H01L21/76879 , H01L23/528 , H01L27/0629 , H01L29/0619 , H01L2924/0002 , H01L2924/00
摘要： A method includes forming a transistor at a surface of a semiconductor substrate, wherein the step of forming the transistor comprises forming a gate electrode, and forming a source/drain region adjacent the gate electrode. First metal features are formed to include at least portions at a same level as the gate electrode. Second metal features are formed simultaneously, and are over and contacting the first metal features. A first one of the second metal features is removed and replaced with a third metal feature, wherein a second one of the second metal features is not removed. A fourth metal feature is formed directly over and contacting the gate electrode, wherein the third and the fourth metal features are formed using a same metal-filling process.
摘要翻译：一种方法包括在半导体衬底的表面形成晶体管，其中形成晶体管的步骤包括形成栅电极，以及形成与栅电极相邻的源/漏区。第一金属特征形成为至少包括与栅电极相同水平的部分。第二金属特征同时形成，并且与第一金属特征结合并接触。第二金属特征中的第一个被去除并被第三金属特征替换，其中第二金属特征的第二个不被去除。直接在栅极上方形成第四金属特征，其中第三和第四金属特征使用相同的金属填充工艺形成。

9. 发明申请

US20120081820A1 ESD POWER CLAMP FOR HIGH-VOLTAGE APPLICATIONS 有权
标题翻译： ESD功率钳位用于高压应用
公开(公告)号：US20120081820A1
公开(公告)日：2012-04-05
申请号：US12897585
申请日：2010-10-04
申请人： Fang-Tsun Chu , Kuo-Ji Chen
发明人： Fang-Tsun Chu , Kuo-Ji Chen
IPC分类号： H02H9/04
CPC分类号： H02H9/046
摘要： An ESD clamp includes a first power supply node; an ESD detection circuit coupled to the first power supply node and configured to detect an ESD event; and a bias circuit coupled to the first power supply node and configured to output a second power supply voltage to a second power supply node. The second power supply voltage is lower than a first power supply voltage on the first power supply node. The ESD detection circuit is configured to activate the bias circuit to change working state in response to the ESD event. The ESD clamp further includes an LV ESD clamp coupled to the second power supply node, wherein the LV ESD clamp includes LV devices with maximum endurable voltages lower than the first power supply voltage.
摘要翻译： ESD钳位包括第一电源节点; ESD检测电路，耦合到所述第一电源节点并且被配置为检测ESD事件; 以及耦合到所述第一电源节点并被配置为将第二电源电压输出到第二电源节点的偏置电路。第二电源电压低于第一电源节点上的第一电源电压。 ESD检测电路被配置为激活偏置电路以响应于ESD事件改变工作状态。 ESD钳位还包括耦合到第二电源节点的LV ESD钳位，其中LV ESD钳位器包括具有低于第一电源电压的最大耐久电压的LV器件。

10. 发明授权

US07772135B2 Method for forming poly-silicon film 有权
标题翻译：多晶硅膜的形成方法
公开(公告)号：US07772135B2
公开(公告)日：2010-08-10
申请号：US11601689
申请日：2006-11-20
申请人： Fang-Tsun Chu , Jla-Xing Lin
发明人： Fang-Tsun Chu , Jla-Xing Lin
IPC分类号： H01L21/00
CPC分类号： H01L21/02532 , H01L21/0268 , Y10T117/1016
摘要： A method for forming a poly-silicon film, using sequential lateral solidification (SLS) by laser irradiation through an optical device to pattern the laser beam and provide a periodic energy profile on the edges of transparent regions so as to widen the poly-silicon grains and achieve grain size uniformity. The optical device comprises a plurality of first transparent regions with a length of L, wherein at least one side of the edge of each of the first transparent regions has a first periodic shape.
摘要翻译：一种用于通过激光照射通过光学装置使用顺序横向固化（SLS）来形成多晶硅膜的方法，以对激光束进行图案化并在透明区域的边缘上提供周期性能量分布，以便加宽多晶硅颗粒并达到晶粒尺寸均匀性。光学装置包括长度为L的多个第一透明区域，其中每个第一透明区域的边缘的至少一侧具有第一周期性形状。

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