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1. 发明授权

US06751034B1 Preamplifier read recovery parade 有权
标题翻译：前置放大器读取恢复游行
公开(公告)号：US06751034B1
公开(公告)日：2004-06-15
申请号：US09618684
申请日：2000-07-19
申请人： Bryan E. Bloodworth , Ashish Manjrekar , Echere Iroaga
发明人： Bryan E. Bloodworth , Ashish Manjrekar , Echere Iroaga
IPC分类号： G11B509
CPC分类号： G11B19/04 , G11B5/012 , G11B20/10 , G11B20/10009 , G11B2005/001 , G11B2005/0016 , G11B2005/0018
摘要： The present invention relates to a method of enhancing a preamplifier read recovery in a hard disk drive system and comprises the steps of determining whether the hard disk drive system is transitioning from a non-read state to a read state and initiating a non-read state to a read state transition sequence when a transition from the non-read state to the read state is determined. The transition sequence is independent of a type of non-read state prior to the transitioning. After the non-read state to read state transition sequence is complete the read mode is initiated. In addition, the invention comprises a system for controlling a transition from a non-read state to a read state associated with a preamplifier in a hard disk drive system. The system comprises a detection circuit operable to detect a completion of the non-read state and a non-read state to read state circuit operable to execute a series of events to transition from the non-read state to the read state, wherein the series of events is the same regardless of a type of non-read state. Further, the system comprises a read state initiation circuit operable to initiate the read state after the execution of the series of events.
摘要翻译：本发明涉及一种增强硬盘驱动器系统中前置放大器读取恢复的方法，包括以下步骤：确定硬盘驱动器系统是否从非读取状态转换到读取状态，并启动非读取状态当从非读取状态到读取状态的转变被确定时，读取状态转换序列。转换序列与转换之前的非读取状态类型无关。在读取状态转换序列的非读取状态完成后，读取模式被启动。此外，本发明包括一种用于控制从硬盘驱动器系统中的与非读取状态到与前置放大器相关联的读取状态的转换的系统。该系统包括检测电路，其可操作以检测非读取状态的完成和非读取状态，以读取状态电路，其可操作以执行一系列事件以从非读取状态转换到读取状态，其中该系列的事件是相同的，不管一种类型的非读取状态。此外，该系统包括读取状态发起电路，其可操作以在执行一系列事件之后启动读取状态。

2. 发明授权

US06856481B2 Apparatus and method for providing a read signal for an information processing device 有权
标题翻译：一种用于为信息处理装置提供读取信号的装置和方法
公开(公告)号：US06856481B2
公开(公告)日：2005-02-15
申请号：US10298806
申请日：2002-11-18
申请人： Ashish Manjrekar , Patrick Michael Teterud , Indumini Ranmuthu , Echere Iroaga
发明人： Ashish Manjrekar , Patrick Michael Teterud , Indumini Ranmuthu , Echere Iroaga
IPC分类号： G11B5/02 , G11B20/10 , G11B5/09
CPC分类号： G11B20/10009 , G11B5/02
摘要： An apparatus for providing a read signal at an output locus for access by an information processing device receives an input signal containing the information; the apparatus includes: (a) a read signal control unit receiving the input signal at a control unit input locus; the control unit is coupled with the output locus and controls the read signal; (b) a plurality of switches; and (c) a plurality of bias arrays coupled with the switches. A first bias array set cooperates with the plurality of switches in a first orientation to couple the first bias array set with the control unit to establish a first operational mode. A second bias array set cooperates with the plurality of switches in a second orientation to couple the second bias array set with the control unit to establish a second operational mode.
摘要翻译：一种用于在输出轨迹处提供读信号以供信息处理设备访问的装置接收包含该信息的输入信号; 该装置包括：（a）读取信号控制单元，其在控制单元输入轨迹处接收输入信号; 控制单元与输出轨迹耦合并控制读取信号; （b）多个开关; 和（c）与开关耦合的多个偏置阵列。第一偏置阵列组以第一方向与多个开关配合，以将第一偏置阵列组与控制单元耦合以建立第一操作模式。第二偏置阵列组以第二方向与多个开关配合，以将第二偏置阵列组与控制单元耦合以建立第二操作模式。

3. 发明授权

US06700719B2 Preamp reader design for high resistance read heads 有权
标题翻译：前置读取器设计用于高阻读头
公开(公告)号：US06700719B2
公开(公告)日：2004-03-02
申请号：US09875703
申请日：2001-06-06
申请人： Echere Iroaga , Ashish Manjreka , Indumini Ranmuthu
发明人： Echere Iroaga , Ashish Manjreka , Indumini Ranmuthu
IPC分类号： G11B509
CPC分类号： G11B5/012 , G11B5/02 , G11B5/09 , G11B2005/0016 , G11B2005/0018
摘要： A differential circuit to read differential data from a disk by a voltage bias includes a read circuit to read the differential data from the disk by maintaining the voltage bias by a first transistor and a second transistor, the first transistor being positioned in a first current path to maintain a first current and the second transistor being positioned in a second current path to maintain a second current. The first current is approximately equal to the second current.
摘要翻译：通过电压偏置从盘读取差分数据的差分电路包括读取电路，通过由第一晶体管和第二晶体管维持电压偏置来从盘读取差分数据，第一晶体管位于第一电流通路以保持第一电流并且第二晶体管位于第二电流路径中以维持第二电流。第一电流近似等于第二电流。

4. 发明授权

US07369080B1 Method and system for driver circuits of capacitive loads 有权
标题翻译：容性负载驱动电路的方法和系统
公开(公告)号：US07369080B1
公开(公告)日：2008-05-06
申请号：US11521077
申请日：2006-09-14
申请人： Echere Iroaga , Boris Murmann
发明人： Echere Iroaga , Boris Murmann
IPC分类号： H03M1/12
CPC分类号： H03M1/124 , H03M1/162 , H03M1/167 , H03M1/40 , H03M1/442
摘要： Driver circuits for switched-capacitor circuits are implemented using a variety of methods and devices. According to one such circuit, a switched-capacitor driver circuit is implemented for producing an output signal by driving a capacitive output load in response to step input signals. The driver circuit includes output circuitry that drives the capacitive output load toward a steady-state mode responsive to one of the step input signals and control circuitry that, before realizing the steady-state mode, inhibits the output circuitry from driving the capacitive output load to the steady-state mode.
摘要翻译：用于开关电容器电路的驱动电路使用各种方法和装置来实现。根据一个这样的电路，实现开关电容器驱动电路，用于通过响应于步进输入信号驱动电容性输出负载来产生输出信号。驱动器电路包括输出电路，其响应于步进输入信号之一和控制电路将电容性输出负载驱动到稳态模式，在实现稳态模式之前，禁止输出电路驱动电容性输出负载稳态模式。

5. 发明申请

US20050068076A1 Current mirror compensation circuit and method 有权
标题翻译：电流镜补偿电路及方法
公开(公告)号：US20050068076A1
公开(公告)日：2005-03-31
申请号：US10671755
申请日：2003-09-26
申请人： Echere Iroaga
发明人： Echere Iroaga
IPC分类号： G05F3/26 , H03K5/00 , H03K5/13 , H03L7/081 , H03L7/089 , H03L7/06
CPC分类号： H03L7/0812 , G05F3/262 , H03K5/13 , H03K2005/00026 , H03K2005/00156 , H03L7/0891
摘要： A current compensation circuit for use with a current mirror is disclosed. The current mirror circuit has a current path defined by a first current mirror stage driving a second current mirror stage, the second current mirror stage is coupled to a supply voltage source. The current compensation circuit comprises an impedance divider coupled to the supply voltage and an output node. The impedance divider operates to generate a compensation signal at the node representative of voltage changes in the supply voltage source. The compensation circuit further includes a gain stage having an input coupled to the output node and a current output connected to the current path. The gain stage operates to generate a compensation current for application to the current path in response to the compensation signal.
摘要翻译：公开了一种与电流镜一起使用的电流补偿电路。电流镜电路具有由驱动第二电流镜级的第一电流镜级限定的电流路径，第二电流镜级耦合到电源电压源。电流补偿电路包括耦合到电源电压的阻抗分配器和输出节点。阻抗分配器用于在表示电源电压源中的电压变化的节点处产生补偿信号。补偿电路还包括具有耦合到输出节点的输入和连接到当前路径的电流输出的增益级。增益级用于响应于补偿信号而产生用于施加到电流路径的补偿电流。

6. 发明授权

US06819515B1 Method and circuit for eliminating glitches in a disk drive read head 有权
标题翻译：消除磁盘驱动器读取头毛刺的方法和电路
公开(公告)号：US06819515B1
公开(公告)日：2004-11-16
申请号：US09664278
申请日：2000-09-18
申请人： Echere Iroaga
发明人： Echere Iroaga
IPC分类号： G11B509
CPC分类号： G11B5/3906 , G11B2005/0018
摘要： An improved bias circuit for a disk drive head which reduces or eliminates transients while switching biasing. Embodiments of the invention are directed to eliminating transients while switching the bias of a MR head such as from current bias to voltage biasing. In an embodiment of the present invention, bias enable signals from a control circuit are inputs to delay circuits. The delay circuits provide a delay on the high-to-low transition, and essentially no delay on the low-to-high transition. The unsymmetrical delay ensures that the read head bias current will continue to be driven during the biasing transition to reduce voltage swings that could damage the head.
摘要翻译：一种用于盘驱动器头的改进的偏置电路，其在切换偏置时减少或消除瞬变。本发明的实施例涉及在将MR头的偏置从电流偏压切换到电压偏置的同时消除瞬变。在本发明的实施例中，来自控制电路的偏置使能信号是对延迟电路的输入。延迟电路在高到低的转换中提供延迟，并且在低到高的转换上基本上没有延迟。不对称延迟确保读偏头电流在偏置转换期间将继续被驱动，以减少可能损坏磁头的电压摆幅。

7. 发明授权

US06549357B1 Selectable input pole compensation for a disk drive read head 有权
标题翻译：可选择的磁盘驱动器读取头的输入极补偿
公开(公告)号：US06549357B1
公开(公告)日：2003-04-15
申请号：US09513393
申请日：2000-02-25
申请人： Echere Iroaga
发明人： Echere Iroaga
IPC分类号： G11B509
CPC分类号： G11B5/02 , G11B5/012 , G11B2005/0016
摘要： A selectively adjustable impedance boosting circuit for a magneto-resistive head in a disk drive to compensate a frequency pole by introducing a zero in proportion to the resistance of the magneto-resistive element and with selectable circuit parameters to further adjust the pole compensation. The invention includes selectively adjusting the sensitivity of the pole compensation to changes in the resistance of the head, selectively adjusting the peak compensation, and adjusting the frequency of the compensating zero.
摘要翻译：一种用于磁盘驱动器中的磁阻头的可选择性调节的阻抗提升电路，用于通过与磁阻元件的电阻成比例地引入零，并且具有可选择的电路参数以进一步调整极补偿来补偿频率极。本发明包括选择性地调节磁极补偿对磁头电阻变化的灵敏度，选择性地调节峰值补偿以及调整补偿零点的频率。

8. 发明授权

US09036730B2 Method and apparatus for peak-to-average ratio reduction 有权
标题翻译：峰均比降低的方法和装置
公开(公告)号：US09036730B2
公开(公告)日：2015-05-19
申请号：US13346638
申请日：2012-01-09
申请人： Sylvain Flamant , Qasem Aldrubi , Echere Iroaga , Jason Hu
发明人： Sylvain Flamant , Qasem Aldrubi , Echere Iroaga , Jason Hu
IPC分类号： H04B15/00 , H04L27/26
CPC分类号： H04L27/2624 , H04L27/2647
摘要： Peak-to-average ratio reduction is achieved by detecting peaks in an original analog signal that exceed a given threshold. Segments of the original analog signal containing such peaks are treated (e.g., by attenuation) and a composite analog signal is assembled that includes treated and untreated segments of the original analog signal. The composite analog signal is processed to perform analog-to-digital conversion to generate a composite digital signal. Segments of the composite digital signal corresponding to the treated segments of the original analog signal are reverse-treated or otherwise treated again to undo treatment of the segments of the original analog signal. A final output digital signal is generated that corresponds to the original analog signal in digital form.
摘要翻译：通过检测超过给定阈值的原始模拟信号中的峰值来实现峰值与平均比的降低。包含这种峰值的原始模拟信号的段被处理（例如通过衰减），并且组合复合模拟信号，其包括原始模拟信号的经处理和未处理的段。处理复合模拟信号以执行模数转换以产生复合数字信号。对应于原始模拟信号的处理段的复合数字信号的段被重新处理或以其他方式处理，以解除对原始模拟信号的段的处理。产生对应于数字形式的原始模拟信号的最终输出数字信号。

9. 发明授权

US07061307B2 Current mirror compensation circuit and method 有权
标题翻译：电流镜补偿电路及方法
公开(公告)号：US07061307B2
公开(公告)日：2006-06-13
申请号：US10671755
申请日：2003-09-26
申请人： Echere Iroaga
发明人： Echere Iroaga
IPC分类号： G05F1/10
CPC分类号： H03L7/0812 , G05F3/262 , H03K5/13 , H03K2005/00026 , H03K2005/00156 , H03L7/0891
摘要： A current compensation circuit for use with a current mirror is disclosed. The current mirror circuit has a current path defined by a first current mirror stage driving a second current mirror stage, the second current mirror stage is coupled to a supply voltage source. The current compensation circuit comprises an impedance divider coupled to the supply voltage and an output node. The impedance divider operates to generate a compensation signal at the node representative of voltage changes in the supply voltage source. The compensation circuit further includes a gain stage having an input coupled to the output node and a current output connected to the current path. The gain stage operates to generate a compensation current for application to the current path in response to the compensation signal.
摘要翻译：公开了一种与电流镜一起使用的电流补偿电路。电流镜电路具有由驱动第二电流镜级的第一电流镜级限定的电流路径，第二电流镜级耦合到电源电压源。电流补偿电路包括耦合到电源电压的阻抗分配器和输出节点。阻抗分配器用于在表示电源电压源中的电压变化的节点处产生补偿信号。补偿电路还包括具有耦合到输出节点的输入和连接到当前路径的电流输出的增益级。增益级用于响应于补偿信号产生用于施加到电流路径的补偿电流。

10. 发明授权

US06587296B1 Capacitor bias recovery methodology 有权
标题翻译：电容偏置恢复方法
公开(公告)号：US06587296B1
公开(公告)日：2003-07-01
申请号：US09621200
申请日：2000-07-21
申请人： Echere Iroaga , Ashish Manjrekar , Bryan E. Bloodworth
发明人： Echere Iroaga , Ashish Manjrekar , Bryan E. Bloodworth
IPC分类号： G11B1512
CPC分类号： G11B5/4984
摘要： A preamplifier circuit for a hard disk drive system comprises a preamplifier circuit having a bias voltage circuit stage associated therewith. The preamplifier circuit further comprises a current bias boost recovery circuit operatively coupled to the bias voltage circuit stage which is configured to increase a rate of charging of a noise reduction capacitor associated with the bias voltage circuit stage. A head select boost recovery circuit is also operatively coupled to the bias voltage circuit and is configured to increase a rate of charging or discharging of a bias capacitor associated with the bias voltage circuit stage. Together the circuits allow for a concurrent head switch and current bias switch and avoids the problems associated with the prior art.
摘要翻译：用于硬盘驱动系统的前置放大器电路包括具有与其相关联的偏置电压电路级的前置放大器电路。前置放大器电路还包括可操作地耦合到偏置电压电路级的电流偏置升压恢复电路，其被配置为增加与偏置电压电路级相关联的降噪电容器的充电速率。头部选择升压恢复电路还可操作地耦合到偏置电压电路，并且被配置为增加与偏置电压电路级相关联的偏置电容器的充电或放电的速率。这些电路一起允许同时的头开关和电流偏置开关，并且避免了与现有技术相关的问题。

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