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1. 发明申请

US20100187588A1 SEMICONDUCTOR MEMORY DEVICE INCLUDING A CYLINDER TYPE STORAGE NODE AND A METHOD OF FABRICATING THE SAME 失效
标题翻译：包括圆筒型存储节点的半导体存储器件及其制造方法
公开(公告)号：US20100187588A1
公开(公告)日：2010-07-29
申请号：US12537461
申请日：2009-08-07
申请人： Gil-Sub KIM , Won Mo PARK , Seong Ho KIM , Dong Kwan YANG
发明人： Gil-Sub KIM , Won Mo PARK , Seong Ho KIM , Dong Kwan YANG
IPC分类号： H01L27/108
CPC分类号： H01L28/91 , H01L27/10817 , H01L27/10852
摘要： Provided is a semiconductor memory device including cylinder type storage nodes and a method of fabricating the semiconductor memory device. The semiconductor memory device includes: a semiconductor substrate including switching devices; a recessed insulating layer including storage contact plugs therein, wherein the storage contact plugs are electrically connected to the switching devices and the recessed insulating layer exposes at least some portions of upper surfaces and side surfaces of the storage contact plugs. The semiconductor device further includes cylinder type storage nodes each having a lower electrode. The lower electrode contacting the at least some portions of the exposed upper surfaces and side surfaces of the storage node contact plugs.
摘要翻译：提供了一种包括圆筒型存储节点的半导体存储器件和制造半导体存储器件的方法。半导体存储器件包括：包括开关器件的半导体衬底; 其中包括存储接触插塞的凹陷绝缘层，其中所述存储接触插塞电连接到所述开关装置，并且所述凹陷绝缘层暴露所述存储接触插塞的上表面和侧表面的至少一些部分。半导体器件还包括各自具有下电极的圆筒型存储节点。下部电极接触存储节点接触插塞的暴露的上表面和侧表面的至少一些部分。

2. 发明授权

US08435840B2 Fuse box guard rings including protrusions and methods of forming same 有权
标题翻译：保险丝盒保护环包括突起及其形成方法
公开(公告)号：US08435840B2
公开(公告)日：2013-05-07
申请号：US12773444
申请日：2010-05-04
申请人： Seong-Ho Kim , Gil-Sub Kim , Dong-Kwan Yang
发明人： Seong-Ho Kim , Gil-Sub Kim , Dong-Kwan Yang
IPC分类号： H01L21/82 , H01L23/52
CPC分类号： H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： A structure included in a semiconductor device can include a fuse box guard ring that defines an interior region of the fuse box inside the fuse box guard ring and that defines an exterior region of the fuse box outside the fuse box guard ring. The fuse box guard ring can include protruding support members that protruding from an interior sidewall or from an exterior sidewall of the fuse box guard ring.
摘要翻译：包括在半导体器件中的结构可以包括保险丝盒保护环，其限定保险丝盒保护环内部的保险丝盒的内部区域，并且将保险丝盒的外部区域限定在保险丝盒保护环外部。保险丝盒保护环可以包括从保险丝盒保护环的内侧壁或外侧壁突出的突出支撑构件。

3. 发明授权

US08058678B2 Semiconductor memory device including a cylinder type storage node and a method of fabricating the same 失效
标题翻译：包括圆柱型存储节点的半导体存储器件及其制造方法
公开(公告)号：US08058678B2
公开(公告)日：2011-11-15
申请号：US12537461
申请日：2009-08-07
申请人： Gil-Sub Kim , Won-Mo Park , Seong-Ho Kim , Dong-Kwan Yang
发明人： Gil-Sub Kim , Won-Mo Park , Seong-Ho Kim , Dong-Kwan Yang
IPC分类号： H01L27/108
CPC分类号： H01L28/91 , H01L27/10817 , H01L27/10852
摘要： Provided is a semiconductor memory device including cylinder type storage nodes and a method of fabricating the semiconductor memory device. The semiconductor memory device includes: a semiconductor substrate including switching devices; a recessed insulating layer including storage contact plugs therein, wherein the storage contact plugs are electrically connected to the switching devices and the recessed insulating layer exposes at least some portions of upper surfaces and side surfaces of the storage contact plugs. The semiconductor device further includes cylinder type storage nodes each having a lower electrode. The lower electrode contacting the at least some portions of the exposed upper surfaces and side surfaces of the storage node contact plugs.
摘要翻译：提供了一种包括圆筒型存储节点的半导体存储器件和制造半导体存储器件的方法。半导体存储器件包括：包括开关器件的半导体衬底; 其中包括存储接触插塞的凹陷绝缘层，其中所述存储接触插塞电连接到所述开关装置，并且所述凹陷绝缘层暴露所述存储接触插塞的上表面和侧表面的至少一些部分。半导体器件还包括各自具有下电极的圆筒型存储节点。下部电极接触存储节点接触插塞的暴露的上表面和侧表面的至少一些部分。

4. 发明申请

US20100283117A1 FUSE BOX GUARD RINGS INCLUDING PROTRUSIONS AND METHODS OF FORMING SAME 有权
标题翻译：保险丝盒防护罩，包括形状和其形成方法
公开(公告)号：US20100283117A1
公开(公告)日：2010-11-11
申请号：US12773444
申请日：2010-05-04
申请人： Seong-Ho KIM , Gil-Sub Kim , Dong-Kwan Yang
发明人： Seong-Ho KIM , Gil-Sub Kim , Dong-Kwan Yang
IPC分类号： H01L29/06 , H01L21/302
CPC分类号： H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： A structure included in a semiconductor device can include a fuse box guard ring that defines an interior region of the fuse box inside the fuse box guard ring and that defines an exterior region of the fuse box outside the fuse box guard ring. The fuse box guard ring can include protruding support members that protruding from an interior sidewall or from an exterior sidewall of the fuse box guard ring.
摘要翻译：包括在半导体器件中的结构可以包括保险丝盒保护环，其限定保险丝盒保护环内部的保险丝盒的内部区域，并且将保险丝盒的外部区域限定在保险丝盒保护环外部。保险丝盒保护环可以包括从保险丝盒保护环的内侧壁或外侧壁突出的突出支撑构件。

5. 发明申请

US20100187101A1 METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20100187101A1
公开(公告)日：2010-07-29
申请号：US12691967
申请日：2010-01-22
申请人： Gil-Sub Kim , Won-Mo Park , Seong-Ho Kim , Dong-Kwan Yang , Ho-Ju Song
发明人： Gil-Sub Kim , Won-Mo Park , Seong-Ho Kim , Dong-Kwan Yang , Ho-Ju Song
IPC分类号： C23C14/34
CPC分类号： H01L27/10817 , H01L28/90
摘要： In a semiconductor device and a method of manufacturing the semiconductor device, lower electrodes having cylindrical shapes are provided to be arranged repeatedly on a substrate. Upper surfaces of the lower electrodes are flat so that the lower electrodes have uniform heights. Supporting structures are provided between the lower electrodes to support the lower electrode, the supporting structure partially contacting outer surfaces of sidewalls of the lower electrodes that are arranged in a line. A dielectric layer is formed on surfaces of the lower electrodes and the supporting structures. An upper electrode is provided on the dielectric layer. The semiconductor device includes a capacitor having an improved capacitance. Further, the capacitor includes the support structure between the lower electrodes to prevent the adjacent lower electrodes from being short each other.
摘要翻译：在半导体器件和半导体器件的制造方法中，具有圆筒形状的下电极被重复配置在基板上。下电极的上表面是平坦的，使得下电极具有均匀的高度。在下部电极之间设置支撑结构以支撑下部电极，支撑结构部分地接触一排地布置在下部电极的侧壁的外表面。在下电极和支撑结构的表面上形成电介质层。在电介质层上设置上电极。半导体器件包括具有改善的电容的电容器。此外，电容器包括在下电极之间的支撑结构，以防止相邻的下电极彼此短路。

6. 发明授权

US07846825B2 Method of forming a contact hole and method of manufacturing a semiconductor device having the same 失效
标题翻译：形成接触孔的方法和制造具有该接触孔的半导体器件的方法
公开(公告)号：US07846825B2
公开(公告)日：2010-12-07
申请号：US12319406
申请日：2009-01-07
申请人： Nam-Jung Kang , Jae-Hoon Song , So-Hyun Ryu , Dong-Kwan Yang
发明人： Nam-Jung Kang , Jae-Hoon Song , So-Hyun Ryu , Dong-Kwan Yang
IPC分类号： H01L21/3205 , H01L21/4763
CPC分类号： H01L21/76816 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L21/76897 , H01L27/10855 , H01L27/10876 , H01L27/10888 , H01L27/10891 , H01L27/10894 , Y10S438/95
摘要： In a method of forming a contact hole and a method of manufacturing a semiconductor device having the same, a first insulation interlayer is formed on a substrate. A dummy pattern is formed on the first insulation interlayer. A second insulation interlayer is formed to cover the dummy pattern. A photoresist pattern is formed on the second insulation interlayer. The photoresist pattern has an exposed portion. The dummy pattern under the photoresist pattern is arranged to cross over the exposed portion of the photoresist pattern. The first and second insulation interlayers are etched using the photoresist pattern and the dummy pattern as an etching mask, to form a plurality of contact holes on both sides of the dummy pattern. Accordingly, the contact holes may be formed to have a smaller width.
摘要翻译：在形成接触孔的方法和制造具有该接触孔的半导体器件的方法中，在衬底上形成第一绝缘中间层。在第一绝缘中间层上形成虚拟图案。形成第二绝缘中间层以覆盖虚设图案。在第二绝缘中间层上形成光致抗蚀剂图案。光致抗蚀剂图案具有暴露部分。光致抗蚀剂图案下面的虚设图案被布置成与光致抗蚀剂图案的暴露部分交叉。使用光致抗蚀剂图案和伪图案作为蚀刻掩模来蚀刻第一和第二绝缘夹层，以在虚设图案的两侧上形成多个接触孔。因此，接触孔可以形成为具有较小的宽度。

7. 发明申请

US20100120212A1 Method of forming capacitor of semiconductor memory device 有权
标题翻译：形成半导体存储器件电容器的方法
公开(公告)号：US20100120212A1
公开(公告)日：2010-05-13
申请号：US12591072
申请日：2009-11-06
申请人： Dong-kwan Yang , Seong-ho Kim , Won-mo Park , Gil-sub Kim
发明人： Dong-kwan Yang , Seong-ho Kim , Won-mo Park , Gil-sub Kim
IPC分类号： H01L21/8239 , H01L21/02
CPC分类号： H01L27/10817 , H01L21/0337 , H01L21/31144 , H01L21/76816 , H01L27/10855
摘要： A method of forming a semiconductor memory device includes sequentially forming an etch stop layer and then a mold layer, forming a plurality of line-shaped support structures and a first sacrificial layer filling gaps between the support structures on the mold layer, sequentially forming a plurality of line-shaped first mask patterns, a second sacrificial layer, and then second mask patterns on the support structures and on the first sacrificial layer, removing the second sacrificial layer, the first sacrificial layer, and the mold layer using the first mask patterns, the second mask patterns, and the support structures as masks, removing the first mask patterns and second mask patterns, filling the storage node electrode holes with a conductive material and etching back the conductive material to expose the support structures, and removing the first sacrificial layer and the mold layer to form pillar-type storage node electrodes supported by the support structures.
摘要翻译：形成半导体存储器件的方法包括顺序地形成蚀刻停止层，然后形成模具层，形成多个线状支撑结构，以及填充模具层上的支撑结构之间的间隙的第一牺牲层，依次形成多个线形的第一掩模图案，第二牺牲层，然后在支撑结构上和第一牺牲层上的第二掩模图案，使用第一掩模图案去除第二牺牲层，第一牺牲层和模具层，第二掩模图案和支撑结构作为掩模，去除第一掩模图案和第二掩模图案，用导电材料填充存储节点电极孔并蚀刻导电材料以暴露支撑结构，以及去除第一牺牲层和模具层，以形成由支撑结构支撑的柱状存储节点电极。

8. 发明授权

US08043925B2 Method of forming capacitor of semiconductor memory device 有权
标题翻译：形成半导体存储器件电容器的方法
公开(公告)号：US08043925B2
公开(公告)日：2011-10-25
申请号：US12591072
申请日：2009-11-06
申请人： Dong-kwan Yang , Seong-ho Kim , Won-mo Park , Gil-sub Kim
发明人： Dong-kwan Yang , Seong-ho Kim , Won-mo Park , Gil-sub Kim
IPC分类号： H01L21/20
CPC分类号： H01L27/10817 , H01L21/0337 , H01L21/31144 , H01L21/76816 , H01L27/10855
摘要： A method of forming a semiconductor memory device includes sequentially forming an etch stop layer and then a mold layer, forming a plurality of line-shaped support structures and a first sacrificial layer filling gaps between the support structures on the mold layer, sequentially forming a plurality of line-shaped first mask patterns, a second sacrificial layer, and then second mask patterns on the support structures and on the first sacrificial layer, removing the second sacrificial layer, the first sacrificial layer, and the mold layer using the first mask patterns, the second mask patterns, and the support structures as masks, removing the first mask patterns and second mask patterns, filling the storage node electrode holes with a conductive material and etching back the conductive material to expose the support structures, and removing the first sacrificial layer and the mold layer to form pillar-type storage node electrodes supported by the support structures.
摘要翻译：形成半导体存储器件的方法包括顺序地形成蚀刻停止层，然后形成模具层，形成多个线状支撑结构，以及填充模具层上的支撑结构之间的间隙的第一牺牲层，依次形成多个线形的第一掩模图案，第二牺牲层，然后在支撑结构上和第一牺牲层上的第二掩模图案，使用第一掩模图案去除第二牺牲层，第一牺牲层和模具层，第二掩模图案和支撑结构作为掩模，去除第一掩模图案和第二掩模图案，用导电材料填充存储节点电极孔并蚀刻导电材料以暴露支撑结构，以及去除第一牺牲层和模具层，以形成由支撑结构支撑的柱状存储节点电极。

9. 发明申请

US20090181529A1 Method of forming a contact hole and method of manufacturing a semiconductor device having the same 失效
标题翻译：形成接触孔的方法和制造具有该接触孔的半导体器件的方法
公开(公告)号：US20090181529A1
公开(公告)日：2009-07-16
申请号：US12319406
申请日：2009-01-07
申请人： Nam-Jung Kang , Jae-Hoon Song , So-Hyun Ryu , Dong-Kwan Yang
发明人： Nam-Jung Kang , Jae-Hoon Song , So-Hyun Ryu , Dong-Kwan Yang
IPC分类号： H01L21/4763 , H01L21/3205
CPC分类号： H01L21/76816 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L21/76897 , H01L27/10855 , H01L27/10876 , H01L27/10888 , H01L27/10891 , H01L27/10894 , Y10S438/95
摘要： In a method of forming a contact hole and a method of manufacturing a semiconductor device having the same, a first insulation interlayer is formed on a substrate. A dummy pattern is formed on the first insulation interlayer. A second insulation interlayer is formed to cover the dummy pattern. A photoresist pattern is formed on the second insulation interlayer. The photoresist pattern has an exposed portion. The dummy pattern under the photoresist pattern is arranged to cross over the exposed portion of the photoresist pattern. The first and second insulation interlayers are etched using the photoresist pattern and the dummy pattern as an etching mask, to form a plurality of contact holes on both sides of the dummy pattern. Accordingly, the contact holes may be formed to have a smaller width.
摘要翻译：在形成接触孔的方法和制造具有该接触孔的半导体器件的方法中，在衬底上形成第一绝缘中间层。在第一绝缘中间层上形成虚拟图案。形成第二绝缘中间层以覆盖虚设图案。在第二绝缘中间层上形成光致抗蚀剂图案。光致抗蚀剂图案具有暴露部分。光致抗蚀剂图案下面的虚设图案被布置成与光致抗蚀剂图案的暴露部分交叉。使用光致抗蚀剂图案和伪图案作为蚀刻掩模来蚀刻第一和第二绝缘夹层，以在虚设图案的两侧上形成多个接触孔。因此，接触孔可以形成为具有较小的宽度。

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