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1. 发明申请

US20100120212A1 Method of forming capacitor of semiconductor memory device 有权
标题翻译：形成半导体存储器件电容器的方法
公开(公告)号：US20100120212A1
公开(公告)日：2010-05-13
申请号：US12591072
申请日：2009-11-06
申请人： Dong-kwan Yang , Seong-ho Kim , Won-mo Park , Gil-sub Kim
发明人： Dong-kwan Yang , Seong-ho Kim , Won-mo Park , Gil-sub Kim
IPC分类号： H01L21/8239 , H01L21/02
CPC分类号： H01L27/10817 , H01L21/0337 , H01L21/31144 , H01L21/76816 , H01L27/10855
摘要： A method of forming a semiconductor memory device includes sequentially forming an etch stop layer and then a mold layer, forming a plurality of line-shaped support structures and a first sacrificial layer filling gaps between the support structures on the mold layer, sequentially forming a plurality of line-shaped first mask patterns, a second sacrificial layer, and then second mask patterns on the support structures and on the first sacrificial layer, removing the second sacrificial layer, the first sacrificial layer, and the mold layer using the first mask patterns, the second mask patterns, and the support structures as masks, removing the first mask patterns and second mask patterns, filling the storage node electrode holes with a conductive material and etching back the conductive material to expose the support structures, and removing the first sacrificial layer and the mold layer to form pillar-type storage node electrodes supported by the support structures.
摘要翻译：形成半导体存储器件的方法包括顺序地形成蚀刻停止层，然后形成模具层，形成多个线状支撑结构，以及填充模具层上的支撑结构之间的间隙的第一牺牲层，依次形成多个线形的第一掩模图案，第二牺牲层，然后在支撑结构上和第一牺牲层上的第二掩模图案，使用第一掩模图案去除第二牺牲层，第一牺牲层和模具层，第二掩模图案和支撑结构作为掩模，去除第一掩模图案和第二掩模图案，用导电材料填充存储节点电极孔并蚀刻导电材料以暴露支撑结构，以及去除第一牺牲层和模具层，以形成由支撑结构支撑的柱状存储节点电极。

2. 发明授权

US08633565B2 Semiconductor device including fuse having form of capacitor 有权
标题翻译：包括具有电容器形式的熔丝的半导体装置
公开(公告)号：US08633565B2
公开(公告)日：2014-01-21
申请号：US12840375
申请日：2010-07-21
申请人： Ho-Ju Song , Seong-Ho Kim , Won-Mo Park , Gil-Sub Kim
发明人： Ho-Ju Song , Seong-Ho Kim , Won-Mo Park , Gil-Sub Kim
IPC分类号： H01L29/93
CPC分类号： H01L23/5256 , H01L27/105 , H01L27/10852 , H01L27/10894 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a fuse having the form of a capacitor. The semiconductor device includes a cathode formed on a semiconductor substrate, an anode formed over the cathode, and at least one filament having a cylindrical-shell shape formed between the cathode and the anode and electrically connecting the cathode and the anode.
摘要翻译：半导体器件包括具有电容器形式的熔丝。半导体器件包括形成在半导体衬底上的阴极，阴极上形成的阳极，以及形成在阴极和阳极之间并且电连接阴极和阳极的至少一个具有圆柱壳形状的灯丝。

3. 发明申请

US20120202336A1 METHOD OF FORMING AN ISOLATION STRUCTURE AND METHOD OF FORMING A SEMICONDUCTOR DEVICE 有权
标题翻译：形成隔离结构的方法和形成半导体器件的方法
公开(公告)号：US20120202336A1
公开(公告)日：2012-08-09
申请号：US13362142
申请日：2012-01-31
申请人： Joo-Sung PARK , Se-Myeong Jang , Gil-Sub Kim
发明人： Joo-Sung PARK , Se-Myeong Jang , Gil-Sub Kim
IPC分类号： H01L21/762
CPC分类号： H01L21/76229
摘要： A method of forming an isolation structure includes forming a trench at an upper portion of a substrate, forming a first oxide layer on an inner wall of the trench, oxidizing a portion of the substrate adjacent to the trench to form a second oxide layer such that the portion of the substrate adjacent to the trench has the first oxide layer thereon, forming a nitride layer on the first oxide layer, and forming an insulation layer pattern on the nitride layer such that the insulation layer pattern fills a remaining portion of the trench.
摘要翻译：形成隔离结构的方法包括在衬底的上部形成沟槽，在沟槽的内壁上形成第一氧化物层，氧化邻近沟槽的衬底的一部分以形成第二氧化物层，使得与沟槽相邻的衬底部分具有第一氧化物层，在第一氧化物层上形成氮化物层，并在氮化物层上形成绝缘层图案，使得绝缘层图案填充沟槽的剩余部分。

4. 发明授权

US08198664B2 Semiconductor memory device having cylinder-type capacitor lower electrode and associated methods 有权
标题翻译：具有圆柱型电容器下电极的半导体存储器件及相关方法
公开(公告)号：US08198664B2
公开(公告)日：2012-06-12
申请号：US12588791
申请日：2009-10-28
申请人： Gil-sub Kim
发明人： Gil-sub Kim
IPC分类号： H01L27/108
CPC分类号： H01L27/10852 , H01L28/91
摘要： A semiconductor memory device including a plurality of supports extending parallel to each other in a first direction on a semiconductor substrate, and capacitor lower electrode rows including a plurality of capacitor lower electrodes arranged in a line along the first direction between two adjacent supports from among the plurality of supports, each capacitor lower electrode including outside walls, wherein each of the capacitor lower electrodes includes two support contact surfaces on the outside walls of the capacitor lower electrode, the support contact surfaces respectively contacting the two adjacent supports from among the plurality of supports.
摘要翻译：一种半导体存储器件，包括在半导体衬底上沿第一方向彼此平行延伸的多个支撑体，以及电容器下电极行，包括沿两个相邻支撑件之间的第一方向排列成一列的多个电容器下电极，多个支撑件，每个电容器下电极包括外壁，其中每个电容器下电极在电容器下电极的外壁上包括两个支撑接触表面，支撑接触表面分别接触来自多个支撑件中的两个相邻的支撑件。

5. 发明授权

US08111501B2 Capacitor 有权
标题翻译：电容器
公开(公告)号：US08111501B2
公开(公告)日：2012-02-07
申请号：US12385938
申请日：2009-04-24
申请人： Gil-Sub Kim
发明人： Gil-Sub Kim
IPC分类号： H01G4/005
CPC分类号： H01G4/33 , H01G4/228 , H01G4/232 , H01L27/10817 , H01L27/10852 , H01L28/91
摘要： A method of forming a capacitor includes forming a cylindrical lower electrode structure having an internal support structure on a substrate, forming a dielectric layer on the cylindrical lower electrode structure and the support structure, and forming an upper electrode on the dielectric layer.
摘要翻译：形成电容器的方法包括在基板上形成具有内部支撑结构的圆柱形下电极结构，在圆柱形下电极结构和支撑结构上形成电介质层，并在电介质层上形成上电极。

6. 发明授权

US08697579B2 Method of forming an isolation structure and method of forming a semiconductor device 有权
标题翻译：形成隔离结构的方法和形成半导体器件的方法
公开(公告)号：US08697579B2
公开(公告)日：2014-04-15
申请号：US13362142
申请日：2012-01-31
申请人： Joo-Sung Park , Se-Myeong Jang , Gil-Sub Kim
发明人： Joo-Sung Park , Se-Myeong Jang , Gil-Sub Kim
IPC分类号： H01L21/311
CPC分类号： H01L21/76229
摘要： A method of forming an isolation structure includes forming a trench at an upper portion of a substrate, forming a first oxide layer on an inner wall of the trench, oxidizing a portion of the substrate adjacent to the trench to form a second oxide layer such that the portion of the substrate adjacent to the trench has the first oxide layer thereon, forming a nitride layer on the first oxide layer, and forming an insulation layer pattern on the nitride layer such that the insulation layer pattern fills a remaining portion of the trench.
摘要翻译：形成隔离结构的方法包括在衬底的上部形成沟槽，在沟槽的内壁上形成第一氧化物层，氧化邻近沟槽的衬底的一部分以形成第二氧化物层，使得与沟槽相邻的衬底部分具有第一氧化物层，在第一氧化物层上形成氮化物层，并在氮化物层上形成绝缘层图案，使得绝缘层图案填充沟槽的剩余部分。

7. 发明授权

US08043925B2 Method of forming capacitor of semiconductor memory device 有权
标题翻译：形成半导体存储器件电容器的方法
公开(公告)号：US08043925B2
公开(公告)日：2011-10-25
申请号：US12591072
申请日：2009-11-06
申请人： Dong-kwan Yang , Seong-ho Kim , Won-mo Park , Gil-sub Kim
发明人： Dong-kwan Yang , Seong-ho Kim , Won-mo Park , Gil-sub Kim
IPC分类号： H01L21/20
CPC分类号： H01L27/10817 , H01L21/0337 , H01L21/31144 , H01L21/76816 , H01L27/10855
摘要： A method of forming a semiconductor memory device includes sequentially forming an etch stop layer and then a mold layer, forming a plurality of line-shaped support structures and a first sacrificial layer filling gaps between the support structures on the mold layer, sequentially forming a plurality of line-shaped first mask patterns, a second sacrificial layer, and then second mask patterns on the support structures and on the first sacrificial layer, removing the second sacrificial layer, the first sacrificial layer, and the mold layer using the first mask patterns, the second mask patterns, and the support structures as masks, removing the first mask patterns and second mask patterns, filling the storage node electrode holes with a conductive material and etching back the conductive material to expose the support structures, and removing the first sacrificial layer and the mold layer to form pillar-type storage node electrodes supported by the support structures.
摘要翻译：形成半导体存储器件的方法包括顺序地形成蚀刻停止层，然后形成模具层，形成多个线状支撑结构，以及填充模具层上的支撑结构之间的间隙的第一牺牲层，依次形成多个线形的第一掩模图案，第二牺牲层，然后在支撑结构上和第一牺牲层上的第二掩模图案，使用第一掩模图案去除第二牺牲层，第一牺牲层和模具层，第二掩模图案和支撑结构作为掩模，去除第一掩模图案和第二掩模图案，用导电材料填充存储节点电极孔并蚀刻导电材料以暴露支撑结构，以及去除第一牺牲层和模具层，以形成由支撑结构支撑的柱状存储节点电极。

8. 发明申请

US20100237394A1 Semiconductor memory device 审中-公开
标题翻译：半导体存储器件
公开(公告)号：US20100237394A1
公开(公告)日：2010-09-23
申请号：US12659735
申请日：2010-03-19
申请人： Jai-Kyun Park , Hyeong-Sun Hong , Jong-Seop Lee , Yong-Il Kim , Yun-Sung Lee , Nam-Jung Kang , Jae-Hoon Song , Gil-Sub Kim
发明人： Jai-Kyun Park , Hyeong-Sun Hong , Jong-Seop Lee , Yong-Il Kim , Yun-Sung Lee , Nam-Jung Kang , Jae-Hoon Song , Gil-Sub Kim
IPC分类号： H01L27/108
CPC分类号： H01L27/0207 , H01L27/10855
摘要： A semiconductor memory device includes unit active regions, word lines extending in a first direction over the unit active region, bit lines extending on the word lines in a second direction substantially perpendicularly to the first direction, first pad contacts in contact with central portions of the unit active regions, the first pad contacts being arranged between the word lines, direct contacts electrically connected between the first pad contacts and the bit lines, second pad contacts in contact with edge portions of the unit active regions, the second pad contacts being arranged between the word lines and between the bit lines, buried contacts electrically connected to the second pad contacts, and capacitors electrically connected to the buried contacts.
摘要翻译：半导体存储器件包括单元有源区域，在单元有源区域上沿第一方向延伸的字线，沿着基本垂直于第一方向的第二方向在字线上延伸的位线，与第一方向的中心部分接触的第一焊盘触点所述第一焊盘触点布置在所述字线之间，直接触点电连接在所述第一焊盘触点和所述位线之间，所述第二焊盘触点与所述单元有源区域的边缘部分接触，所述第二焊盘触点布置在字线和位线之间，电连接到第二焊盘触点的埋入触点，以及电连接到埋入触点的电容器。

9. 发明授权

US08759945B2 Fuse structures, e-fuses comprising fuse structures, and semiconductor devices comprising e-fuses 有权
标题翻译：保险丝结构，包括保险丝结构的电子保险丝以及包括电子保险丝的半导体器件
公开(公告)号：US08759945B2
公开(公告)日：2014-06-24
申请号：US13081949
申请日：2011-04-07
申请人： Seong-Ho Kim , Won-Mo Park , Gil-Sub Kim , Ho-Ju Song
发明人： Seong-Ho Kim , Won-Mo Park , Gil-Sub Kim , Ho-Ju Song
IPC分类号： H01L23/52 , H01L29/00
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A fuse structure, an e-fuse including the fuse structure and a semiconductor device including the e-fuse are disclosed. The fuse structure includes first and second electrodes extending in a first direction, and spaced a predetermined distance apart from each other and having one ends thereof facing each other, an insulation layer formed between the one end of the first electrode and the one end of the second electrode facing each other, and a conductive film overlapping portions of the first and second electrodes on the insulation layer and contacting the first electrode and the one end of the second electrode.
摘要翻译：公开了一种熔丝结构，包括熔丝结构的电熔丝和包括该电熔丝的半导体器件。熔丝结构包括第一和第二电极，第一和第二电极沿第一方向延伸，彼此隔开预定的距离并且其一端面对彼此，形成在第一电极的一端和第一电极的一端之间的绝缘层第二电极彼此面对，并且导电膜在绝缘层上重叠第一和第二电极的部分，并与第一电极和第二电极的一端接触。

10. 发明申请

US20110298086A1 Fuse Structures, E-Fuses Comprising Fuse Structures, and Semiconductor Devices Comprising E-Fuses 有权
标题翻译：保险丝结构，包括保险丝结构的电子保险丝以及包含电子保险丝的半导体器件
公开(公告)号：US20110298086A1
公开(公告)日：2011-12-08
申请号：US13081949
申请日：2011-04-07
申请人： Seong-Ho Kim , Won-Mo Park , Gil-Sub Kim , Ho-Ju Song
发明人： Seong-Ho Kim , Won-Mo Park , Gil-Sub Kim , Ho-Ju Song
IPC分类号： H01L23/525
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A fuse structure, an e-fuse including the fuse structure and a semiconductor device including the e-fuse are disclosed. The fuse structure includes first and second electrodes extending in a first direction, and spaced a predetermined distance apart from each other and having one ends thereof facing each other, an insulation layer formed between the one end of the first electrode and the one end of the second electrode facing each other, and a conductive film overlapping portions of the first and second electrodes on the insulation layer and contacting the first electrode and the one end of the second electrode.
摘要翻译：公开了一种熔丝结构，包括熔丝结构的电熔丝和包括该电熔丝的半导体器件。熔丝结构包括第一和第二电极，第一和第二电极沿第一方向延伸，彼此隔开预定的距离并且其一端面对彼此，形成在第一电极的一端和第一电极的一端之间的绝缘层第二电极彼此面对，并且导电膜在绝缘层上重叠第一和第二电极的部分，并与第一电极和第二电极的一端接触。

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