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1. 发明授权

US07245007B1 Exposed lead interposer leadframe package 有权
标题翻译：裸露引线插入式引线框封装
公开(公告)号：US07245007B1
公开(公告)日：2007-07-17
申请号：US10667226
申请日：2003-09-18
申请人： Donald Craig Foster
发明人： Donald Craig Foster
IPC分类号： H01L23/02
CPC分类号： H01L23/49861 , H01L23/49527 , H01L23/49531 , H01L23/49551 , H01L24/45 , H01L24/48 , H01L24/49 , H01L25/105 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/49109 , H01L2224/73265 , H01L2224/85207 , H01L2225/1029 , H01L2225/1041 , H01L2924/01005 , H01L2924/01014 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/15153 , H01L2924/1517 , H01L2924/1532 , H01L2924/181 , H01L2924/3011 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： An interposer for use in an external lead or land pattern semiconductor package. The interposer includes an interposer body which is molded from a dielectric material. The interposer body defines opposed top and bottom surfaces, an outer peripheral edge, and an inner peripheral edge. Embedded within the interposer body is a die pad which itself defines opposed top and bottom surfaces and a peripheral edge. The bottom surface of the die pad is exposed in and substantially flush with the bottom surface of the interposer body, with the inner peripheral edge of the interposer body and the top surface of the die pad collectively defining a cavity of the interposer. A plurality of electrically conductive interposer leads are embedded within the top surface of the interposer body and at least partially exposed therein. The interposer body forms a nonconductive barrier between each of the interposer leads and between the interposer leads and the die pad.
摘要翻译：一种用于外部引线或焊盘图案半导体封装的插入器。插入器包括由电介质材料模制的插入体。插入器主体限定相对的顶表面和底表面，外周边缘和内周边缘。嵌入在插入体内部的是一个芯片焊盘，其本身限定相对的顶表面和底表面以及外围边缘。芯片焊盘的底表面暴露在插入件主体的底表面上并基本上与内插器主体的底表面齐平，插入件主体的内周边缘和管芯焊盘的顶表面共同限定了插入件的空腔。多个导电插入器引线嵌入到插入体的顶表面内并且至少部分地暴露在其中。插入器主体在每个插入器引线之间以及插入器引线和芯片焊盘之间形成非导电屏障。

2. 发明授权

US07176062B1 Lead-frame method and assembly for interconnecting circuits within a circuit module 有权
标题翻译：电路模块内互连电路的引线框架方法和组装
公开(公告)号：US07176062B1
公开(公告)日：2007-02-13
申请号：US11035239
申请日：2005-01-13
申请人： Jeffrey Alan Miks , Kenneth Kaskoun , Markus Liebhard , Donald Craig Foster , Paul Robert Hoffman , Frederic Bertholio
发明人： Jeffrey Alan Miks , Kenneth Kaskoun , Markus Liebhard , Donald Craig Foster , Paul Robert Hoffman , Frederic Bertholio
IPC分类号： H01L21/50 , H01L21/48 , H01L21/44 , H01L23/02 , H01L23/52 , H01L23/495
CPC分类号： H01L23/49575 , H01L23/3107 , H01L24/48 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/181 , H01L2924/1815 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A lead-frame method and assembly for interconnecting circuits within a circuit module allows a circuit module to be fabricated without a circuit board substrate. Integrated circuit dies are attached to a metal lead-frame assembly and the die interconnects are wire-bonded to interconnect points on the lead-frame assembly. An extension of the lead-frame assembly out of the circuit interconnect plane provides external electrical contacts for connection of the circuit module to a socket.
摘要翻译：用于在电路模块内互连电路的引线框架方法和组件允许在没有电路板基板的情况下制造电路模块。集成电路管芯连接到金属引线框架组件，并且管芯互连线被引线接合到引线框架组件上的互连点。引线框架组件从电路互连平面的延伸提供外部电触头，用于将电路模块连接到插座。

3. 发明授权

US07102216B1 Semiconductor package and leadframe with horizontal leads spaced in the vertical direction and method of making 有权
标题翻译：半导体封装和引线框架，水平引线在垂直方向上间隔开，制造方法
公开(公告)号：US07102216B1
公开(公告)日：2006-09-05
申请号：US09932290
申请日：2001-08-17
申请人： Donald Craig Foster
发明人： Donald Craig Foster
IPC分类号： H01L23/495 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L23/49558 , H01L23/49537 , H01L23/49548 , H01L24/17 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/13099 , H01L2224/16245 , H01L2224/32245 , H01L2224/451 , H01L2224/48091 , H01L2224/48247 , H01L2224/49109 , H01L2224/73265 , H01L2924/00014 , H01L2924/01006 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012 , H01L2224/0555 , H01L2224/0556
摘要： A leadframe, a semiconductor package, and methods of making the same are disclosed. A leadframe includes leads having an inner end segment. A first subset of the leads include a recess in a first surface of the inner end segment. A second subset of the leads include a recess in an opposite second surface of the inner end segment. The first subset leads are in an alternating lateral pattern with the second subset leads such that the recess of adjacent inner end segments are oriented in opposite directions. The recesses separate adjacent inner end segments in a vertical direction, thereby eliminating or reducing a need for horizontal spacing between adjacent inner end segments. In a semiconductor package, a semiconductor chip is electrically connected by a bond wire to the inner end segment of the leads. The bond wire is bonded within the recess of alternating leads.
摘要翻译：公开了一种引线框，半导体封装及其制造方法。引线框架包括具有内端段的引线。引线的第一子集包括在内端段的第一表面中的凹陷。引线的第二子集包括在内端段的相对的第二表面中的凹部。第一子集引线具有与第二子集引线相交的横向图案，使得相邻内端部分的凹部沿相反方向定向。这些凹槽在垂直方向上分隔相邻的内端段，从而消除或减少相邻内端段之间的水平间隔的需要。在半导体封装中，半导体芯片通过接合线电连接到引线的内端部分。接合线结合在交替引线的凹槽内。

4. 发明授权

US06429513B1 Active heat sink for cooling a semiconductor chip 有权
标题翻译：主动散热片用于冷却半导体芯片
公开(公告)号：US06429513B1
公开(公告)日：2002-08-06
申请号：US09866100
申请日：2001-05-25
申请人： Charles A. Shermer, IV , Thomas P. Glenn , Steven Webster , Donald Craig Foster
发明人： Charles A. Shermer, IV , Thomas P. Glenn , Steven Webster , Donald Craig Foster
IPC分类号： H01L2334
CPC分类号： H01L23/427 , H01L23/4334 , H01L2224/48227 , H01L2224/48247 , H01L2924/15311
摘要： Semiconductor packages and other electronic assemblies having an active heat sink are disclosed, along with methods of making the same. The active heat sink includes a cavity partially filled with a heat activated liquid. Heat generated during operation of a chip boils the heat activated liquid. The vapor condenses on an inner surface of the active heat sink and transfers heat to an outer, possibly finned, surface exposed to ambient to dissipate heat. In some embodiments, the active heat sink may be a closed vessel mounted on the chip. In some embodiments, the vessel of the active heat sink is formed from a die pad of a leadframe substrate. The die pad includes a recess that forms the active heat sink cavity when bonded to the back surface of the chip. The heat activated liquid directly contacts the back surface of the chip in these embodiments.
摘要翻译：公开了具有有源散热器的半导体封装和其它电子组件及其制造方法。活性散热器包括部分填充有热活化液体的空腔。在芯片运行期间产生的热量使热活化液体沸腾。蒸汽在有源散热器的内表面上冷凝，并将热量传递到暴露于环境的外部可能有翅片的表面以散热。在一些实施例中，有源散热器可以是安装在芯片上的封闭容器。在一些实施例中，有源散热器的容器由引线框架基板的管芯焊盘形成。芯片焊盘包括当结合到芯片的背面时形成有源散热腔的凹部。在这些实施例中，热活化液体直接接触芯片的背面。

5. 发明授权

US08551820B1 Routable single layer substrate and semiconductor package including same 有权
标题翻译：可路由单层基板和包含相同的半导体封装
公开(公告)号：US08551820B1
公开(公告)日：2013-10-08
申请号：US12568041
申请日：2009-09-28
申请人： Donald Craig Foster , Ronald Patrick Huemoeller
发明人： Donald Craig Foster , Ronald Patrick Huemoeller
IPC分类号： H01L21/44 , H01L23/495
CPC分类号： H01L23/3107 , H01L21/4821 , H01L21/561 , H01L23/49548 , H01L23/49582 , H01L24/97 , H01L2224/32245 , H01L2224/48247 , H01L2224/73265 , H01L2224/97 , H01L2924/181 , H05K2201/10689 , H01L2924/00 , H01L2224/85 , H01L2924/00012
摘要： In accordance with the present invention, there is provided a routable substrate that may be used, for example, in relation to the manufacture of Dual and Quad Flat No-Lead (DFN/QFN) style semiconductor packages as a substrate or interposer of such packages. The method of fabricating the substrate effectively removes metal from the saw streets and provides a more stable surface structure for wire bonding. The substrate fabrication method also utilizes existing etching techniques which are implemented in a prescribed sequence to achieve no metal in the saw streets and to completely electrically isolated features. Further, the substrate fabrication method includes a molding step intended to replace pressure sensitive adhesive tapes.
摘要翻译：根据本发明，提供了一种可路由的衬底，其可以例如关于制造双和四扁平无铅（DFN / QFN）型半导体封装作为这种封装的衬底或插入件。制造基板的方法有效地从锯片上除去金属并提供用于引线接合的更稳定的表面结构。衬底制造方法还利用现有的蚀刻技术，其以规定的顺序实现，以在锯片街道中没有金属和完全电隔离的特征。此外，基板制造方法包括用于替代压敏粘合带的成型步骤。

6. 发明授权

US08362597B1 Shielded package having shield lid 有权
公开(公告)号：US08362597B1
公开(公告)日：2013-01-29
申请号：US12589500
申请日：2009-10-23
申请人： Donald Craig Foster
发明人： Donald Craig Foster
IPC分类号： H01L23/552 , H01L23/12
CPC分类号： H01L21/52 , H01L21/56 , H01L23/3121 , H01L23/552 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2224/05554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/3025 , H01L2224/85 , H01L2924/00012 , H01L2924/00 , H01L2224/05599 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A shielded package includes a shield assembly having a shield fence, a shield lid, and a shield lid adhesive electrically coupling the shield lid to the shield fence. The shield fence includes a porous sidewall through which molding compound passes during molding of the shielded package. Further, the shield fence includes a central aperture through which an electronic component is die attached and wire bonded.

7. 发明授权

US07629674B1 Shielded package having shield fence 有权
标题翻译：屏蔽包装有屏蔽围栏
公开(公告)号：US07629674B1
公开(公告)日：2009-12-08
申请号：US10992036
申请日：2004-11-17
申请人： Donald Craig Foster
发明人： Donald Craig Foster
IPC分类号： H01L23/552
CPC分类号： H01L21/52 , H01L21/56 , H01L23/3121 , H01L23/552 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2224/05554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/3025 , H01L2224/85 , H01L2924/00012 , H01L2924/00 , H01L2224/05599 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A shielded package includes a shield assembly having a shield fence, a shield lid, and a shield lid adhesive electrically coupling the shield lid to the shield fence. The shield fence includes a porous sidewall through which molding compound passes during molding of the shielded package. Further, the shield fence includes a central aperture through which an electronic component is die attached and wire bonded.
摘要翻译：屏蔽封装包括具有屏蔽罩，屏蔽盖和将屏蔽盖电连接到屏蔽栅的屏蔽盖粘合剂的屏蔽组件。屏蔽栅栏包括多孔侧壁，模制复合体在模制屏蔽封装期间通过该侧壁。此外，屏蔽栅栏包括中心孔，电子部件通过该中心孔模连接并引线接合。

8. 发明授权

US06900527B1 Lead-frame method and assembly for interconnecting circuits within a circuit module 有权
标题翻译：电路模块内互连电路的引线框架方法和组装
公开(公告)号：US06900527B1
公开(公告)日：2005-05-31
申请号：US09956190
申请日：2001-09-19
申请人： Jeffrey Alan Miks , Kenneth Kaskoun , Markus Liebhard , Donald Craig Foster , Paul Robert Hoffman , Frederic Bertholio
发明人： Jeffrey Alan Miks , Kenneth Kaskoun , Markus Liebhard , Donald Craig Foster , Paul Robert Hoffman , Frederic Bertholio
IPC分类号： H01L23/31 , H01L23/495 , H01L23/02 , H01L23/04
CPC分类号： H01L23/49575 , H01L23/3107 , H01L24/48 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/181 , H01L2924/1815 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A lead-frame method and assembly for interconnecting circuits within a circuit module allows a circuit module to be fabricated without a circuit board substrate. Integrated circuit dies are attached to a metal lead-frame assembly and the die interconnects are wire-bonded to interconnect points on the lead-frame assembly. An extension of the lead-frame assembly out of the circuit interconnect plane provides external electrical contacts for connection of the circuit module to a socket.
摘要翻译：用于在电路模块内互连电路的引线框架方法和组件允许在没有电路板基板的情况下制造电路模块。集成电路管芯连接到金属引线框架组件，并且管芯互连线被引线接合到引线框架组件上的互连点。引线框架组件从电路互连平面的延伸提供外部电触头，用于将电路模块连接到插座。

9. 发明授权

US06791166B1 Stackable lead frame package using exposed internal lead traces 有权
标题翻译：可堆叠引线框封装，使用暴露的内部引线
公开(公告)号：US06791166B1
公开(公告)日：2004-09-14
申请号：US09829341
申请日：2001-04-09
申请人： Donald Craig Foster
发明人： Donald Craig Foster
IPC分类号： H01L23495
CPC分类号： H01L23/49541 , H01L23/49503 , H01L23/49551 , H01L24/48 , H01L24/49 , H01L25/105 , H01L2224/05554 , H01L2224/05599 , H01L2224/32245 , H01L2224/45099 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/49171 , H01L2224/73265 , H01L2224/85399 , H01L2225/1029 , H01L2225/1041 , H01L2924/00014 , H01L2924/01078 , H01L2924/14 , H01L2924/1532 , H01L2924/181 , H01L2924/30107 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： A die package is formed, which allows additional electrical connections to the die by using internal leads or traces from a lead frame. The internal leads are exposed through an upper or lower surface of the package, thereby allowing an additional die package to be stacked and electrically connected to the underlying die or additional inputs/outputs to underlying external circuitry, such as a printed circuit board.
摘要翻译：形成管芯封装，其通过使用来自引线框架的内部引线或迹线来允许额外的电连接到管芯。内部引线通过封装的上表面或下表面暴露，从而允许将另外的管芯封装堆叠并电连接到下面的管芯或额外的输入/输出到诸如印刷电路板的下面的外部电路。

10. 发明授权

US06686651B1 Multi-layer leadframe structure 有权
标题翻译：多层引线框架结构
公开(公告)号：US06686651B1
公开(公告)日：2004-02-03
申请号：US09996226
申请日：2001-11-27
申请人： Donald Craig Foster
发明人： Donald Craig Foster
IPC分类号： H01L23495
CPC分类号： H01L24/49 , H01L23/49527 , H01L23/49531 , H01L23/49541 , H01L24/48 , H01L2224/05554 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/49109 , H01L2224/4911 , H01L2224/49171 , H01L2224/73265 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/181 , H01L2924/19107 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
摘要： A leadframe and a package including the leadframe are disclosed. At least one lead includes a nonconductive layer on the inner end segment of the lead set back from its inner end. An electrically conductive layer is on a surface of the nonconductive layer. The nonconductive layer electrically isolates the electrically conductive layer from the lead upon which the nonconductive layer is positioned. The lead itself and the electrically conductive layer thereon are separately available for electrical connection to a semiconductor chip. The electrically conductive layer in turn may be electrically coupled to a second lead, with the electrically conductive layer serving as a bridge for an electrical connection between the chip and the second lead.
摘要翻译：公开了引线框和包括引线框的封装。至少一个引线在引线的内端段上包括从其内端返回的非导电层。导电层在非导电层的表面上。导电层将导电层与不导电层所位于的引线电隔离。引线本身和其上的导电层可单独地用于电连接到半导体芯片。导电层又可以电耦合到第二引线，导电层用作芯片和第二引线之间的电连接的桥接器。

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