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1. 发明申请

US20160132070A1 OSCILLATOR CIRCUIT AND METHOD OF GENERATING A CLOCK SIGNAL 有权
标题翻译：振荡器电路和产生时钟信号的方法
公开(公告)号：US20160132070A1
公开(公告)日：2016-05-12
申请号：US14899170
申请日：2013-07-04
申请人： Hubert BODE , Dirk WENDEL
发明人： HUBERT BODE , DIRK WENDEL
IPC分类号： G06F1/08 , H03K3/023
CPC分类号： G06F1/08 , H03K3/023 , H03K3/0231
摘要： An oscillator circuit of the type comprising a flip-flop for generating a clock signal and two comparators for comparing a reference voltage with the voltage across a first capacitor which is charged during a first cycle of the clock signal and the voltage across a second capacitor which is charged during a second cycle of a clock signal provides a means for removing the effects of any offset in either comparator. This is achieved by reversing the inputs of the comparators for each cycle of the output frequency. Thus an offset in a comparator which would increase the clock period on one cycle will reduce the period of the next cycle by the same amount. As a net result, the period of time over two clock periods will stay constant regardless of any offset drift in a comparator.
摘要翻译：一种振荡器电路，包括用于产生时钟信号的触发器和用于将参考电压与在第一电容器的第一周期期间充电的第一电容器两端的电压进行比较的两个比较器，以及跨越第二电容器的电压在时钟信号的第二周期期间被充电提供了用于消除任一比较器中任何偏移的影响的装置。这是通过在输出频率的每个周期反转比较器的输入来实现的。因此，将在一个周期上增加时钟周期的比较器中的偏移将使下一个周期的周期减少相同的量。作为最终结果，无论比较器中有任何偏移漂移，两个时钟周期的时间段将保持不变。

2. 发明授权

US07098964B2 Apparatus and method for slope-enhancement of signal transitions in television pictures 有权
公开(公告)号：US07098964B2
公开(公告)日：2006-08-29
申请号：US10108232
申请日：2002-03-26
申请人： Peter Rieder , Marko Hahn , Günter Scheffler , Dirk Wendel
发明人： Peter Rieder , Marko Hahn , Günter Scheffler , Dirk Wendel
IPC分类号： H04N5/21 , H04N1/409
CPC分类号： H04N5/208
摘要： A time-discrete picture signal is formed from an analog picture signal, such as a luminance signal or a chrominance signal. Corresponding to the time-discrete picture signal, a time-discrete filter signal is formed, specifically a so-called “peaking signal,” which has a sequence of peaking signal values, of which one value each is associated with one signal value of the time-discrete picture signal. The discrete peaking signal is formed by a digital peaking filter from the discrete picture signal or by an analog peaking filter from the analog picture signal during subsequent sampling of the analog peaking signal. The peaking filter increases the amplitude of selected frequency components of the picture signal.

3. 发明授权

US09507373B2 Oscillator circuit and method of generating a clock signal 有权
标题翻译：振荡电路和产生时钟信号的方法
公开(公告)号：US09507373B2
公开(公告)日：2016-11-29
申请号：US14899170
申请日：2013-07-04
申请人： Hubert Bode , Dirk Wendel
发明人： Hubert Bode , Dirk Wendel
IPC分类号： G06F1/04 , G06F1/08 , H03K3/0231 , H03K3/023
CPC分类号： G06F1/08 , H03K3/023 , H03K3/0231
摘要： An oscillator circuit of the type comprising a flip-flop for generating a clock signal and two comparators for comparing a reference voltage with the voltage across a first capacitor which is charged during a first cycle of the clock signal and the voltage across a second capacitor which is charged during a second cycle of a clock signal provides a means for removing the effects of any offset in either comparator. This is achieved by reversing the inputs of the comparators for each cycle of the output frequency. Thus an offset in a comparator which would increase the clock period on one cycle will reduce the period of the next cycle by the same amount. As a net result, the period of time over two clock periods will stay constant regardless of any offset drift in a comparator.
摘要翻译：一种振荡器电路，包括用于产生时钟信号的触发器和用于将参考电压与在第一电容器的第一周期期间充电的第一电容器两端的电压进行比较的两个比较器，以及跨越第二电容器的电压在时钟信号的第二周期期间被充电提供了用于消除任一比较器中任何偏移的影响的装置。这是通过在输出频率的每个周期反转比较器的输入来实现的。因此，将在一个周期上增加时钟周期的比较器中的偏移将使下一个周期的周期减少相同的量。作为最终结果，无论比较器中有任何偏移漂移，两个时钟周期的时间段将保持不变。

4. 发明申请

US20160037186A1 METHOD AND VIDEO SYSTEM FOR FREEZE-FRAME DETECTION 有权
标题翻译：用于冻结框架检测的方法和视频系统
公开(公告)号：US20160037186A1
公开(公告)日：2016-02-04
申请号：US14445718
申请日：2014-07-29
申请人： DIRK WENDEL , JOACHIM FADER , STEPHAN HERRMANN , WILHARD CHRISTOPHORUS VON WENDORFF
发明人： DIRK WENDEL , JOACHIM FADER , STEPHAN HERRMANN , WILHARD CHRISTOPHORUS VON WENDORFF
IPC分类号： H04N19/89 , H04N19/66 , H04N19/46
CPC分类号： H04N19/89
摘要： A method for detecting a freeze-frame condition comprises receiving a sequence of images from at least one digital device; selectively encoding a first subset of the sequence of images using a first coding scheme that causes an adjustment to an image characteristic of the selected images being encoded; selectively encoding a second subset of the sequence of images using a second coding scheme; storing the first encoded subset and second encoded subset; retrieving the stored first encoded subset and second encoded subset; selectively decoding the first subset of the selected images using the first coding scheme and selectively decoding the second subset of the selected images using the second coding scheme to re-create the sequence of images. A freeze-frame condition in the re-created sequence of images is identifiable based on a plurality of decoded images being different with respect to the image characteristic across multiple decoded image frames.
摘要翻译：一种用于检测冻结帧状况的方法包括从至少一个数字设备接收一系列图像; 使用导致对被编码的所选择的图像的图像特征进行调整的第一编码方案来选择性地编码图像序列的第一子集; 使用第二编码方案选择性地编码图像序列的第二子集; 存储第一编码子集和第二编码子集; 检索所存储的第一编码子集和第二编码子集; 使用第一编码方案选择性地解码所选图像的第一子集，并且使用第二编码方案选择性地解码所选图像的第二子集以重新创建图像序列。基于多个解码图像相对于跨多个解码图像帧的图像特征而不同的图像重新创建序列中的冻结帧条件是可识别的。

5. 发明授权

US07532216B2 Method of scaling a graphic character 有权
标题翻译：缩放图形字符的方法
公开(公告)号：US07532216B2
公开(公告)日：2009-05-12
申请号：US11297123
申请日：2005-12-07
申请人： Dirk Wendel , Ulrich Langenkamp , Marko Hahn
发明人： Dirk Wendel , Ulrich Langenkamp , Marko Hahn
IPC分类号： G06T11/00 , G09G5/26 , G09G5/00
CPC分类号： G06T3/40
摘要： A graphic character that has a character matrix with a number of character units that are indivisible at least in either a horizontal direction or a vertical direction is scaled by dividing the character matrix into one first and at least one second character segment, each comprising at least one of the character units. The first character segment is symmetrically scaled using a first scaling factor and the second character segment is scaled using a second scaling factor different from the first scaling factor.
摘要翻译：具有至少在水平方向或垂直方向上不可分割的具有多个字符单元的字符矩阵的图形字符通过将字符矩阵划分成一个第一和至少一个第二字符段来缩放，每个字符段至少包括其中一个角色单位。使用第一缩放因子对第一字符段进行对称缩放，并且使用不同于第一缩放因子的第二缩放因子来缩放第二字符段。

6. 发明授权

US06950146B1 Method and circuit for inserting a picture into a video picture 失效
标题翻译：将图像插入视频图像的方法和电路
公开(公告)号：US06950146B1
公开(公告)日：2005-09-27
申请号：US09979079
申请日：2000-05-19
申请人： Maik Brett , Dirk Wendel , Matthias Burkert
发明人： Maik Brett , Dirk Wendel , Matthias Burkert
IPC分类号： H04N5/44 , H04N5/45 , H04N5/46
CPC分类号： H04N7/0122 , H04N5/45 , H04N21/4316
摘要： In display apparatuses, particularly television receivers and monitors, a video picture can be inserted into a main picture (HB) from a first video signal (VS1), in which a second picture (ZB) from a second video signal (VS2) has a first picture format and is composed of picture lines (BZ) and filling lines (FZ). The picture lines (BZ) forming a sub-picture (UB) with the second picture format is adjoined by the filling lines (FZ) in the vertical picture direction. The second picture format of the sub-picture (UB) is determined and the determined second picture format is used for determining the filling lines (FZ). The picture lines (BZ) and a portion of the filling lines (FZ) are inserted as an insertion picture into the main picture (HB). Additional insertions (OSD) from an additional signal, which at least partly lie within the filling lines (FZ), is displaced into the sub-picture (UB).
摘要翻译：在显示装置，特别是电视接收机和监视器中，视频图像可以从第一视频信号（VS 1）插入到主图像（HB）中，其中来自第二视频信号（VS2）的第二图像（ZB）具有第一图像格式并且由图像行（BZ）和填充线（FZ）组成。形成具有第二图像格式的子图像（UB）的图像行（BZ）在垂直图像方向上与填充线（FZ）相邻。确定子图像（UB）的第二图像格式，并且确定第二图像格式用于确定填充线（FZ）。图像线（BZ）和填充线（FZ）的一部分作为插入图像插入到主图像（HB）中。至少部分位于填充线（FZ）内的附加信号的附加插入（OSD）被移位到子图像（UB）中。

7. 发明授权

US06762800B1 Circuit for controlling luminance signal amplitude 失效
标题翻译：用于控制亮度信号幅度的电路
公开(公告)号：US06762800B1
公开(公告)日：2004-07-13
申请号：US09786451
申请日：2001-06-11
申请人： Xiaoning Nie , Dirk Wendel , Maik Brett
发明人： Xiaoning Nie , Dirk Wendel , Maik Brett
IPC分类号： H04N520
CPC分类号： H04N5/20 , H04N5/45
摘要： The circuit takes into account whether the image on a screen is too bright, whether more than one specific number of pixels have a luminance value that is greater than a given peak value and whether this condition is met in more than one specific number of lines in a picture and in more than one specific number of successive images with one such number of lines.
摘要翻译：该电路考虑了屏幕上的图像是否太亮，多于一个特定数量的像素是否具有大于给定峰值的亮度值，以及该条件是否满足多于一个特定数量的行一张照片和多于一个特定数量的连续图像，其中一条这样的行数。

8. 发明授权

US10540284B2 Cache-coherent multiprocessor system and a method for detecting failures in a cache-coherent multiprocessor system 有权
公开(公告)号：US10540284B2
公开(公告)日：2020-01-21
申请号：US14445237
申请日：2014-07-29
申请人： Dirk Wendel , Oliver Bibel , Joachim Fader , Wilhard Christophorus Von Wendorff
发明人： Dirk Wendel , Oliver Bibel , Joachim Fader , Wilhard Christophorus Von Wendorff
IPC分类号： G06F12/0831 , G06F12/14 , G06F12/084 , G06F12/0811
摘要： A cache-coherent multiprocessor system comprising processing units, a shared memory resource accessible by the processing units, the shared memory resource being divided into at least one shared region, at least one first region, and at least one second region, a first cache, a second cache, a coherency unit, and a monitor unit, wherein the monitor unit is adapted to generate an error signal, when the coherency unit affects the at least one first region due to a memory access from the second processing unit and/or when the coherency unit affects the at least one second region due to a memory access from the first processing unit, and a method for detecting failures in a such a cache-coherent multiprocessor system.

9. 发明授权

US09400708B2 Integrated circuit and method of detecting a data integrity error 有权
标题翻译：集成电路和检测数据完整性错误的方法
公开(公告)号：US09400708B2
公开(公告)日：2016-07-26
申请号：US14483262
申请日：2014-09-11
申请人： Dirk Wendel , Michael Rohleder , Rolf Schlagenhaft
发明人： Dirk Wendel , Michael Rohleder , Rolf Schlagenhaft
IPC分类号： G06F11/00 , G06F11/07
CPC分类号： G06F11/079 , G06F11/0736 , G06F11/0751 , G06F11/0772
摘要： An integrated circuit comprises a write bus coupled to a register for storing control data. A storage unit is arranged to store reference signature data encoding a reference collective state of the register. First logic circuitry generates actual signature data encoding the actual collective state of the register. Second logic circuitry is coupled to the storage unit, receives the actual signature data and compares the actual signature data with the reference signature data. The second logic circuitry comprises an alert output to provide an alert signal in response to the comparison identifying a difference between the actual signature data and the reference signature data, thereby ensuring detection of a data integrity error in respect of the register. An alert inhibitor comprises a control input and is responsive to the control input and arranged to inhibit selectively onward propagation of the alert signal from the alert output.
摘要翻译：集成电路包括耦合到用于存储控制数据的寄存器的写总线。存储单元被布置为存储编码寄存器的参考集合状态的参考签名数据。第一逻辑电路生成编码寄存器的实际集体状态的实际签名数据。第二逻辑电路耦合到存储单元，接收实际签名数据并将实际签名数据与参考签名数据进行比较。第二逻辑电路包括警报输出，以响应于比较识别实际签名数据和参考签名数据之间的差异来提供警报信号，从而确保检测关于该寄存器的数据完整性错误。警报抑制器包括控制输入并且响应于控制输入并被布置成禁止警报信号从警报输出中选择性地向前传播。

10. 发明申请

US20160071228A1 DATA LOGGING SYSTEM AND METHOD 有权
标题翻译：数据记录系统及方法
公开(公告)号：US20160071228A1
公开(公告)日：2016-03-10
申请号：US14479456
申请日：2014-09-08
申请人： DIRK WENDEL , STEPHAN HERRMANN , MICHAEL ANDREAS STAUDENMAIER
发明人： DIRK WENDEL , STEPHAN HERRMANN , MICHAEL ANDREAS STAUDENMAIER
IPC分类号： G06T1/00 , G06K9/00
CPC分类号： G06T1/0007 , G06K9/00926 , G07C5/0866 , G07C5/0891 , G08B13/19676
摘要： A data logging system for logging input data received from a data source is described. The data logging system has a data storage memory. A data input is arranged to repeatedly receive input data having a temporal input data resolution. A write controller is arranged to write newly received input data as received via the data input into the data storage memory. The writing comprises writing the newly received input data at the temporal input data resolution. The writing comprises keeping recent data at the temporal input data resolution in the data storage memory, and overwriting part of old data with newly received input data while keeping another part of the old data in the data storage memory at lower data resolution.
摘要翻译：描述用于记录从数据源接收的输入数据的数据记录系统。数据记录系统具有数据存储存储器。数据输入被布置为重复地接收具有时间输入数据分辨率的输入数据。写入控制器被布置成经由输入到数据存储器中的数据来写入接收的新接收的输入数据。写入包括以时间输入数据分辨率写入新接收的输入数据。该写入包括在数据存储存储器中保持最新数据处于时间输入数据分辨率，并且用新接收的输入数据覆盖旧数据的一部分，同时将数据存储存储器中的另一部分旧数据保持在较低的数据分辨率。

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