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    • 1. 发明授权
    • Technique for performing partial stores in store-thru memory
configuration
    • 在存储器存储器配置中执行部分存储的技术
    • US4157586A
    • 1979-06-05
    • US794323
    • 1977-05-05
    • Patrick M. GannonJulius D. JonesDale M. JunodRichard L. PartridgeThomas R. Wright
    • Patrick M. GannonJulius D. JonesDale M. JunodRichard L. PartridgeThomas R. Wright
    • G06F12/04G06F12/08G06F7/02
    • G06F12/0804
    • This specification relates to performance of partial store operation in a hierarchical memory system which has a buffer store interposed between a processor interrogating the memory system and the main memory of the memory system. Such a partial store operation can be performed on a word of data in the main memory using the buffer store copy of that word of data. The copy of the word of data is read out of the buffer store into a register where it is modified to form a new word by replacing one or more but not all of the bytes in the word of data with bytes supplied by the processor. The new word is then placed in the main memory by performing a full store operation. The problem with performing a partial store operation in this manner is that the copy of the word of data in the buffer store may not be up-to-date. A technique is provided to eliminate the possibility of this old data being rewritten back into the main memory.
    • 本说明书涉及在分层存储器系统中的部分存储操作的性能,其具有插入在询问存储器系统的处理器和存储器系统的主存储器之间的缓冲存储器。 可以使用该数据字的缓冲存储副本对主存储器中的数据字执行这种部分存储操作。 将数据字的副本从缓冲存储器中读出到寄存器中,在该寄存器中,通过用处理器提供的字节替换数据字中的一个或多个但不是全部的字节来修改它来形成新的字。 然后通过执行完整的存储操作将新的字放置在主存储器中。 以这种方式执行部分存储操作的问题是缓冲存储器中的数据字的副本可能不是最新的。 提供了一种技术来消除将旧数据重写回主存储器的可能性。
    • 2. 发明授权
    • Floating-priority storage control for processors in a multi-processor
system
    • 多处理器系统中处理器的浮动优先级存储控制
    • US4152764A
    • 1979-05-01
    • US778290
    • 1977-03-16
    • William D. ConnorsDale M. Junod
    • William D. ConnorsDale M. Junod
    • G06F12/00G06F9/52G06F13/18G06F15/16G06F15/177G06F9/18
    • G06F13/18
    • The disclosure describes a floating-priority storage access control arrangement for plural processors to a shared main storage in a multi-processing (MP) system. The shared main storage logically couples the main storage units provided with each of the processors into a single expanse of real addresses available to each processor. Exclusive access to the shared storage is given to any processor for as long as that processor can provide a burst of one or more successive storage requests. The burst ends when that processor misses a storage cycle by not providing a locally granted request.The shared storage access is controlled in each processor by means of an MP priority pointer circuit which receives storage requests granted by a local priority circuit in the processor. The MP priority pointer circuits are interconnected between the processors. When a burst ends for one processor, another processor having one or more pending storage requests is given priority and begins its burst during the missed cycle, continuing with highest priority until it completes its burst by not having a locally granted request during a cycle. If no processor makes a request during a storage cycle, and both processors simultaneously make a request during a following cycle, priority for an access burst is given to the processor which last had priority. Thus, priority flip-flops back and forth between the processors as they respectively access main storage in bursts of requests.
    • 本公开描述了一种用于多处理器到多处理(MP)系统中的共享主存储器的浮动优先级存储访问控制装置。 共享主存储器将提供有每个处理器的主存储单元逻辑耦合到每个处理器可用的单个实际地址范围。 只要该处理器可以提供一个或多个连续的存储请求的突发,则向任何处理器提供对共享存储器的独占访问。 当处理器通过不提供本地授权的请求而失去存储周期时,突发结束。