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    • 5. 发明申请
    • TECHNOLOGIES FOR ROOT CAUSE IDENTIFICATION OF USE-AFTER-FREE MEMORY CORRUPTION BUGS
    • 技术因素导致无使用内存损坏BUG的识别
    • US20160283302A1
    • 2016-09-29
    • US14670863
    • 2015-03-27
    • Justin E. GottschlichGilles A. PokamCristiano L. Pereira
    • Justin E. GottschlichGilles A. PokamCristiano L. Pereira
    • G06F11/07
    • G06F11/079G06F11/073
    • Technologies for identification of a potential root cause of a use-after-free memory corruption bug of a program include a computing device to replay execution of the execution of the program based on an execution log of the program. The execution log comprises an ordered set of executed instructions of the program that resulted in the use-after-free memory corruption bug. The computing device compares a use-after-free memory address access of the program to a memory address associated with an occurrence of the use-after-free memory corruption bug in response to detecting the use-after-free memory address access and records the use-after-free memory address access of the program as a candidate for a root cause of the use-after-free memory corruption bug to a candidate list in response to detecting a match between the use-after-free memory address access of the program and the memory address associated with the occurrence of the use-after-free memory corruption bug.
    • 用于识别程序的无使用存储器内存损坏错误的潜在根本原因的技术包括基于程序的执行日志来重放执行程序的计算设备。 执行日志包括导致使用随机存储器损坏错误的程序的执行指令的有序集合。 计算装置响应于检测到使用无存储器存储器地址访问而将程序的无用空闲存储器地址访问与与使用无释放存储器损坏错误的发生相关联的存储器地址进行比较,并且记录 响应于检测到所述无用存储器内存地址访问之间的匹配,将所述程序的无用空闲内存地址访问作为候选列表的候选者,作为所述无用存储器内存损坏错误的根本原因 程序和与使用随机存储器内存损坏错误的发生相关联的存储器地址。
    • 9. 发明申请
    • TECHNIQUES FOR DETECTING RACE CONDITIONS
    • 检测条件的技术
    • US20160232077A1
    • 2016-08-11
    • US15026515
    • 2013-12-12
    • Shiliang HUGilles A. POKAMCristiano L. PEREIRAJustin E. GOTTSCHLICH
    • Shiliang HUGilles A. POKAMCristiano L. PEREIRAJustin E. GOTTSCHLICH
    • G06F11/36
    • G06F11/3632G06F9/526G06F11/0715G06F11/0778G06F11/30G06F11/3409G06F11/3419G06F11/3466G06F11/366
    • Various embodiments are generally directed to detecting race conditions arising from uncoordinated data accesses by different portions of an application routine by detecting occurrences of a selected cache event associated with such accesses. An apparatus includes a processor component; a trigger component for execution by the processor component to configure a monitoring unit of the processor component to detect a cache event associated with a race condition between accesses to a piece of data and to capture an indication of a state of the processor component to generate monitoring data in response to an occurrence of the cache event; and a counter component for execution by the processor component to configure a counter of the monitoring unit to enable capture of the indication of the state of the processor component at a frequency less than every occurrence of the cache event. Other embodiments are described and claimed.
    • 各种实施例通常涉及通过检测与这种访问相关联的所选择的高速缓存事件的发生来检测由应用程序的不同部分的未协调数据访问引起的竞争条件。 一种装置包括处理器组件; 触发组件,用于由处理器组件执行以配置处理器组件的监控单元以检测与对一条数据的访问之间的竞争条件相关联的高速缓存事件,并且捕获处理器组件的状态的指示以生成监视 响应于缓存事件的发生的数据; 以及用于由处理器组件执行以配置监视单元的计数器的计数器组件,以使得能够以小于高速缓存事件的每次出现的频率捕获处理器组件的状态的指示。 描述和要求保护其他实施例。