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1. 发明申请

US20140089642A1 METHODS AND SYSTEMS FOR PERFORMING A REPLAY EXECUTION 有权
标题翻译：执行重复执行的方法和系统
公开(公告)号：US20140089642A1
公开(公告)日：2014-03-27
申请号：US13629131
申请日：2012-09-27
申请人： Justin E. Gottschlich , Klaus Danne , Cristiano L. Pereira , Gilles A. Pokam , Rolf Kassa , Shiliang Hu , Tim Kranich
发明人： Justin E. Gottschlich , Klaus Danne , Cristiano L. Pereira , Gilles A. Pokam , Rolf Kassa , Shiliang Hu , Tim Kranich
IPC分类号： G06F9/30
CPC分类号： G06F9/3005 , G06F9/30072 , G06F9/3802 , G06F9/3851 , G06F9/44 , G06F9/455 , G06F9/52 , G06F11/30 , G06F11/3414 , G06F11/3476 , G06F11/36 , G06F11/3664 , G06F11/3688 , G06F2201/815 , G06F2201/825 , G06F2201/865
摘要： One or more embodiments may provide a method for performing a replay. The method includes initiating execution of a program, the program having a plurality of sets of instructions, and each set of instructions has a number of chunks of instructions. The method also includes intercepting, by a virtual machine unit executing on a processor, an instruction of a chunk of the number of chunks before execution. The method further includes determining, by a replay module executing on the processor, whether the chunk is an active chunk, and responsive to the chunk being the active chunk, executing the instruction.
摘要翻译：一个或多个实施例可以提供用于执行重放的方法。该方法包括启动程序的执行，程序具有多组指令，并且每组指令具有多个指令块。该方法还包括通过在处理器上执行的虚拟机单元截取在执行之前块数量的指令。该方法还包括通过在处理器上执行的重播模块确定该块是否是活动块，并且响应于该块作为活动块来执行该指令。

2. 发明申请

US20140366006A1 VISUALIZING RECORDED EXECUTIONS OF MULTI-THREADED SOFTWARE PROGRAMS FOR PERFORMANCE AND CORRECTNESS 审中-公开
标题翻译：可视化多线程软件程序的性能和正确性的记录执行
公开(公告)号：US20140366006A1
公开(公告)日：2014-12-11
申请号：US13997786
申请日：2013-03-13
申请人： Justin E. Gottschlich , Gilles A. Pokam , Cristiano L. Pereira , Klaus Danne , Shiliang Hu , Rolf Kassa
发明人： Justin E. Gottschlich , Gilles A. Pokam , Cristiano L. Pereira , Klaus Danne , Shiliang Hu , Rolf Kassa
IPC分类号： G06F11/36 , G06T13/80
CPC分类号： G06F11/3664 , G06F9/38 , G06F11/323 , G06F11/3404 , G06F2201/865 , G06T11/206 , G06T13/80
摘要： A system graphically visualizes performance and/or correctness features of a recorded execution of a multi-threaded software program. The system may process chunk-based information recorded during an execution of the multi-threaded program, prepare a graphical visualization of the recorded information, and display the graphical visualization on a display in an animated fashion. The system may allow a viewer to interactively control the display of the animated graphical visualization.
摘要翻译：系统以图形方式可视化多线程软件程序的记录执行的性能和/或正确性特征。系统可以处理在执行多线程程序期间记录的基于块的信息，准备所记录信息的图形可视化，并以动画方式在显示器上显示图形可视化。系统可以允许观看者交互地控制动画图形可视化的显示。

3. 发明授权

US09501340B2 Mechanism for facilitating dynamic and efficient management of instruction atomicity violations in software programs at computing systems 有权
标题翻译：促进计算系统软件程序中指令原子性违规的动态和有效管理的机制
公开(公告)号：US09501340B2
公开(公告)日：2016-11-22
申请号：US13977690
申请日：2013-03-15
申请人： Nathan D. Dautenhahn , Justin E. Gottschlich , Gilles Pokam , Cristiano L. Pereira , Shiliang Hu , Klaus Danne , Rolf Kassa
发明人： Nathan D. Dautenhahn , Justin E. Gottschlich , Gilles Pokam , Cristiano L. Pereira , Shiliang Hu , Klaus Danne , Rolf Kassa
IPC分类号： G06F9/45 , G06F11/07 , G06F9/38 , G06F11/14
CPC分类号： G06F9/30145 , G06F9/3009 , G06F9/3895 , G06F9/3897 , G06F9/52 , G06F11/0724 , G06F11/1438 , G06F11/1484 , G06F11/3636
摘要： A mechanism is described for facilitating dynamic and efficient management of instruction atomicity violations in software programs according to one embodiment. A method of embodiments, as described herein, includes receiving, at a replay logic from a recording system, a recording of a first software thread running a first macro instruction, and a second software thread running a second macro instruction. The first software thread and the second software thread are executed by a first core and a second core, respectively, of a processor at a computing device. The recording system may record interleavings between the first and second macro instructions. The method includes correctly replaying the recording of the interleavings of the first and second macro instructions precisely as they occurred. The correctly replaying may include replaying a local memory state of the first and second macro instructions and a global memory state of the first and second software threads.
摘要翻译：描述了根据一个实施例的用于促进软件程序中的指令原子性违规的动态和有效管理的机制。如本文所述的实施例的方法包括在来自记录系统的重放逻辑处接收运行第一宏指令的第一软件线程的记录和运行第二宏指令的第二软件线程。第一软件线程和第二软件线程分别由计算设备处理器的第一核心和第二核心执行。记录系统可以记录第一和第二宏指令之间的交织。该方法包括在发生时准确地重播第一和第二宏指令的交错记录。正确重放可以包括重播第一和第二宏指令的本地存储器状态以及第一和第二软件线程的全局存储器状态。

4. 发明申请

US20150186178A1 Processor With Transactional Capability and Logging Circuitry To Report Transactional Operations 有权
标题翻译：具有事务功能和记录电路的处理器来报告事务操作
公开(公告)号：US20150186178A1
公开(公告)日：2015-07-02
申请号：US14142475
申请日：2013-12-27
申请人： Rolf Kassa , Justin E. Gottschlich , Shiliang Hu , Gilles A. Pokam , Robert C. Knauerhase
发明人： Rolf Kassa , Justin E. Gottschlich , Shiliang Hu , Gilles A. Pokam , Robert C. Knauerhase
IPC分类号： G06F9/46
CPC分类号： G06F9/467 , G06F9/528 , G06F11/0724 , G06F11/0772
摘要： A processor is described comprising memory access conflict detection circuitry to identify a conflict pertaining to a transaction being executed by a thread that believes it has locked information within a memory. The processor also includes logging circuitry to construct and report out a packet if the memory access conflict detection circuitry identifies a conflict that causes the transaction to be aborted.
摘要翻译：描述了一种处理器，其包括存储器访问冲突检测电路，以识别与正在由线程执行的事务有关的冲突，该线程相信它已经将信息锁定在存储器内。如果存储器访问冲突检测电路识别导致事务中止的冲突，则处理器还包括记录电路来构造和报告数据包。

5. 发明申请

US20150277968A1 SOFTWARE REPLAYER FOR TRANSACTIONAL MEMORY PROGRAMS 有权
标题翻译：用于实时存储器程序的软件更新程序
公开(公告)号：US20150277968A1
公开(公告)日：2015-10-01
申请号：US14226312
申请日：2014-03-26
申请人： Justin E. Gottschlich , Gilles A. Pokam , Shiliang Hu , Rolf Kassa , Youfeng Wu , Irina Calciu
发明人： Justin E. Gottschlich , Gilles A. Pokam , Shiliang Hu , Rolf Kassa , Youfeng Wu , Irina Calciu
IPC分类号： G06F9/46 , G06F11/36 , G11C7/10
CPC分类号： G06F9/467 , G06F11/34 , G06F11/362 , G06F11/3648
摘要： A system is disclosed that includes a processor and a dynamic random access memory (DRAM). The processor includes a hybrid transactional memory (HyTM) that includes hardware transactional memory (HTM), and a program debugger to replay a program that includes an HTM instruction and that has been executed has been executed using the HyTM. The program debugger includes a software emulator that is to replay the HTM instruction by emulation of the HTM. Other embodiments are disclosed and claimed.
摘要翻译：公开了一种包括处理器和动态随机存取存储器（DRAM）的系统。处理器包括包括硬件事务存储器（HTM）的混合事务处理存储器（HyTM），并且使用HyTM执行用于重放包括HTM指令并已被执行的程序的程序调试器。程序调试器包括一个软件仿真器，通过仿真HTM来重播HTM指令。公开和要求保护其他实施例。

6. 发明授权

US07188290B2 Data alignment for telecommunications networks 失效
标题翻译：电信网络的数据调整
公开(公告)号：US07188290B2
公开(公告)日：2007-03-06
申请号：US10128134
申请日：2002-04-23
申请人： Rolf Kassa
发明人： Rolf Kassa
IPC分类号： G01R31/28
CPC分类号： H04J3/0608
摘要： An alignment module receives a sequence of un-aligned data words, finds a frame alignment word, and aligns the data words based on the position of the frame alignment word in the un-aligned data words. Comparators compare segments of two consecutive un-aligned data words to a frame alignment word and generate a first logic signal when there is a match. A shift register and a counter are used to determine which comparator generates the first logic signal. The counter sends a count to a barrel shifter, which shifts the un-aligned data words according to the count to generate aligned data words.
摘要翻译：对准模块接收一系列不对齐的数据字，找到一个帧对齐字，并根据帧排列字在未排列数据字中的位置对齐数据字。比较器将两个连续的非对齐数据字的段与帧对准字进行比较，并在存在匹配时产生第一逻辑信号。使用移位寄存器和计数器来确定哪个比较器产生第一逻辑信号。计数器向桶形移位器发送计数，该移位器根据计数移位不对齐的数据字，以生成对齐的数据字。

7. 发明申请

US20170192904A1 METHOD, SYSTEM, AND APPARATUS FOR PAGE SIZING EXTENSION 审中-公开
公开(公告)号：US20170192904A1
公开(公告)日：2017-07-06
申请号：US15384067
申请日：2016-12-19
申请人： Edward Grochowski , Julio Gago , Roger Gramunt , Roger Espasa , Rolf Kassa
发明人： Edward Grochowski , Julio Gago , Roger Gramunt , Roger Espasa , Rolf Kassa
IPC分类号： G06F12/1009 , G06F12/109 , G06F12/1027
CPC分类号： G06F12/1009 , G06F12/0864 , G06F12/1027 , G06F12/145 , G06F2212/152 , G06F2212/6032 , G06F2212/652 , G06F2212/657 , G06F2212/68
摘要： A method, system, and apparatus may initialize a fixed plurality of page table entries for a fixed plurality of pages in memory, each page having a first size, wherein a linear address for each page table entry corresponds to a physical address and the fixed plurality of pages are aligned. A bit in each of the page table entries for the aligned pages may be set to indicate whether or not the fixed plurality of pages is to be treated as one combined page having a second page size larger than the first page size. Other embodiments are described and claimed.

8. 发明申请

US20130117531A1 METHOD, SYSTEM, AND APPARATUS FOR PAGE SIZING EXTENSION 审中-公开
公开(公告)号：US20130117531A1
公开(公告)日：2013-05-09
申请号：US13722485
申请日：2012-12-20
申请人： Edward Grochowski , Julio Gago , Roger Gramunt , Roger Espasa , Rolf Kassa
发明人： Edward Grochowski , Julio Gago , Roger Gramunt , Roger Espasa , Rolf Kassa
IPC分类号： G06F12/10
CPC分类号： G06F12/1009 , G06F12/0864 , G06F12/1027 , G06F12/109 , G06F12/145 , G06F2212/152 , G06F2212/6032 , G06F2212/652 , G06F2212/657 , G06F2212/68
摘要： A method, system, and apparatus may initialize a fixed plurality of page table entries for a fixed plurality of pages in memory, each page having a first size, wherein a linear address for each page table entry corresponds to a physical address and the fixed plurality of pages are aligned. A bit in each of the page table entries for the aligned pages may be set to indicate whether or not the fixed plurality of pages is to be treated as one combined page having a second page size larger than the first page size. Other embodiments are described and claimed.

9. 发明申请

US20090172344A1 METHOD, SYSTEM, AND APPARATUS FOR PAGE SIZING EXTENSION 有权
标题翻译：方法，系统和设备的尺寸扩展
公开(公告)号：US20090172344A1
公开(公告)日：2009-07-02
申请号：US11967868
申请日：2007-12-31
申请人： Ed Grochowski , Julio Gago , Roger Gramunt , Roger Espasa , Rolf Kassa
发明人： Ed Grochowski , Julio Gago , Roger Gramunt , Roger Espasa , Rolf Kassa
IPC分类号： G06F12/10
CPC分类号： G06F12/1009 , G06F12/0864 , G06F12/1027 , G06F12/109 , G06F12/145 , G06F2212/152 , G06F2212/6032 , G06F2212/652 , G06F2212/657 , G06F2212/68
摘要： A method, system, and apparatus may initialize a fixed plurality of page table entries for a fixed plurality of pages in memory, each page having a first size, wherein a linear address for each page table entry corresponds to a physical address and the fixed plurality of pages are aligned. A bit in each of the page table entries for the aligned pages may be set to indicate whether or not the fixed plurality of pages is to be treated as one combined page having a second page size larger than the first page size. Other embodiments are described and claimed.
摘要翻译：方法，系统和装置可以对存储器中固定的多个页面的固定的多个页表条目进行初始化，每个页面具有第一大小，其中每个页表条目的线性地址对应于物理地址，固定多个的页面对齐。可以将针对对齐的页面的每个页表条目中的一个位设置为指示固定的多个页面是否被视为具有大于第一页面大小的第二页面大小的一个组合页面。描述和要求保护其他实施例。

10. 发明申请

US20170199825A1 METHOD, SYSTEM, AND APPARATUS FOR PAGE SIZING EXTENSION 审中-公开
公开(公告)号：US20170199825A1
公开(公告)日：2017-07-13
申请号：US15384054
申请日：2016-12-19
申请人： Edward Grochowski , Julio Gago , Roger Gramunt , Roger Espasa , Rolf Kassa
发明人： Edward Grochowski , Julio Gago , Roger Gramunt , Roger Espasa , Rolf Kassa
IPC分类号： G06F12/1009 , G06F12/14 , G06F12/0864 , G06F12/1027
CPC分类号： G06F12/1009 , G06F12/0864 , G06F12/1027 , G06F12/145 , G06F2212/152 , G06F2212/6032 , G06F2212/652 , G06F2212/657 , G06F2212/68
摘要： A method, system, and apparatus may initialize a fixed plurality of page table entries for a fixed plurality of pages in memory, each page having a first size, wherein a linear address for each page table entry corresponds to a physical address and the fixed plurality of pages are aligned. A bit in each of the page table entries for the aligned pages may be set to indicate whether or not the fixed plurality of pages is to be treated as one combined page having a second page size larger than the first page size. Other embodiments are described and claimed.

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