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1. 发明授权

US07642152B2 Method of fabricating spacers and cleaning method of post-etching and semiconductor device 有权
标题翻译：制造间隔物的方法和后蚀刻和半导体器件的清洁方法
公开(公告)号：US07642152B2
公开(公告)日：2010-01-05
申请号：US11221611
申请日：2005-09-07
申请人： Chuan-Kai Wang , Yi-Hsing Chen , Chia-Jui Liu , Juan-Yi Chen , Ming-Yi Lin
发明人： Chuan-Kai Wang , Yi-Hsing Chen , Chia-Jui Liu , Juan-Yi Chen , Ming-Yi Lin
IPC分类号： H01L21/8238 , H01L21/336 , H01L21/31
CPC分类号： H01L21/31116 , H01L21/0206 , H01L29/6656 , Y10S438/976
摘要： A method of fabricating spacers is provided. The method includes providing a substrate with a device structure formed thereon. The device structure comprises a gate structure and a pair of source/drain regions. Then, a spacer material layer is formed over the substrate to cover the substrate and the device structure. Thereafter, an etching process is performed to remove a portion of the spacer material layer so that spacers are formed on the respective sidewalls of the gate structure. After that, a plasma treatment step is performed to form a spacer protection layer on the surface of the substrate, the spacers and the gate structure.
摘要翻译：提供了制造间隔物的方法。该方法包括提供其上形成有器件结构的衬底。器件结构包括栅极结构和一对源极/漏极区域。然后，在衬底上形成间隔材料层以覆盖衬底和器件结构。此后，进行蚀刻处理以去除间隔材料层的一部分，使得在栅极结构的相应侧壁上形成间隔物。之后，执行等离子体处理步骤，以在衬底的表面，间隔物和栅极结构上形成间隔保护层。

2. 发明申请

US20080045033A1 STACKED STRUCTURE AND PATTERNING METHOD USING THE SAME 有权
标题翻译：使用它的堆叠结构和方式
公开(公告)号：US20080045033A1
公开(公告)日：2008-02-21
申请号：US11464496
申请日：2006-08-15
申请人： Meng-Jun Wang , Yi-Hsing Chen , Jiunn-Hsiung Liao , Min-Chieh Yang , Chuan-Kai Wang
发明人： Meng-Jun Wang , Yi-Hsing Chen , Jiunn-Hsiung Liao , Min-Chieh Yang , Chuan-Kai Wang
IPC分类号： H01L21/467 , H01L23/58
CPC分类号： H01L21/0271 , H01L21/0332 , H01L21/3081 , H01L21/32139
摘要： A stacked structure for patterning a material layer to form an opening pattern with a predetermined opening width in the layer is provided. The stacked structure includes an underlayer, a silicon rich organic layer, and a photoresist layer. The underlayer is on the material layer. The silicon rich organic layer is between the underlayer and the photoresist layer. The thickness of the photoresist layer is smaller than that of the underlayer and larger than two times of the thickness of the silicon rich organic layer. The thickness of the underlayer is smaller than three times of the predetermined opening width.
摘要翻译：提供了用于图案化材料层以形成在该层中具有预定开口宽度的开口图案的层叠结构。层叠结构包括底层，富硅有机层和光致抗蚀剂层。底层在材料层上。富硅有机层位于底层和光刻胶层之间。光致抗蚀剂层的厚度小于底层的厚度，并且大于富硅有机层的厚度的两倍。底层的厚度小于预定开口宽度的三倍。

3. 发明申请

US20130043727A1 POWER SUPPLY APPARATUS 审中-公开
标题翻译：电源设备
公开(公告)号：US20130043727A1
公开(公告)日：2013-02-21
申请号：US13586877
申请日：2012-08-16
申请人： Change-Yuan Liu , Chuan-Kai Wang
发明人： Change-Yuan Liu , Chuan-Kai Wang
IPC分类号： G05F1/563
CPC分类号： G06F1/26 , H02J1/10 , Y10T307/406
摘要： A power supply apparatus is provided, which includes an input conversion stage, a main power conversion circuit, an auxiliary power conversion circuit, a switching unit and a buck power conversion circuit. The input conversion stage is used for receiving an AC voltage and converting the AC voltage to output a DC input voltage. The main power conversion circuit is used for converting the DC input voltage so as to generate and output a main power. The auxiliary power conversion circuit is used for converting the DC input voltage so as to generate and output an auxiliary power. The switching unit is used for receiving the main power and the auxiliary power and selecting and outputting one of the main power and the auxiliary power. The buck power conversion circuit is used for stepping down the output of the switching unit so as to generate and output a standby power.
摘要翻译：提供一种电源装置，其包括输入转换级，主电源转换电路，辅助电源转换电路，开关单元和降压功率转换电路。输入转换级用于接收交流电压并转换交流电压以输出直流输入电压。主电源转换电路用于转换直流输入电压，以产生并输出主电源。辅助电力转换电路用于转换直流输入电压，以产生和输出辅助电源。开关单元用于接收主电源和辅助电源，并选择并输出主电源和辅助电源之一。降压功率转换电路用于降低开关单元的输出，以产生和输出待机功率。

4. 发明授权

US08071487B2 Patterning method using stacked structure 有权
标题翻译：使用堆叠结构的图案化方法
公开(公告)号：US08071487B2
公开(公告)日：2011-12-06
申请号：US11464496
申请日：2006-08-15
申请人： Meng-Jun Wang , Yi-Hsing Chen , Jiunn-Hsiung Liao , Min-Chieh Yang , Chuan-Kai Wang
发明人： Meng-Jun Wang , Yi-Hsing Chen , Jiunn-Hsiung Liao , Min-Chieh Yang , Chuan-Kai Wang
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/0271 , H01L21/0332 , H01L21/3081 , H01L21/32139
摘要： A stacked structure for patterning a material layer to form an opening pattern with a predetermined opening width in the layer is provided. The stacked structure includes an underlayer, a silicon rich organic layer, and a photoresist layer. The underlayer is on the material layer. The silicon rich organic layer is between the underlayer and the photoresist layer. The thickness of the photoresist layer is smaller than that of the underlayer and larger than two times of the thickness of the silicon rich organic layer. The thickness of the underlayer is smaller than three times of the predetermined opening width.
摘要翻译：提供了用于图案化材料层以形成在该层中具有预定开口宽度的开口图案的层叠结构。层叠结构包括底层，富硅有机层和光致抗蚀剂层。底层在材料层上。富硅有机层位于底层和光刻胶层之间。光致抗蚀剂层的厚度小于底层的厚度，并且大于富硅有机层的厚度的两倍。底层的厚度小于预定开口宽度的三倍。

5. 发明申请

US20110254142A1 STACKED STRUCTURE 审中-公开
标题翻译：堆叠结构
公开(公告)号：US20110254142A1
公开(公告)日：2011-10-20
申请号：US13167737
申请日：2011-06-24
申请人： Meng-Jun Wang , Yi-Hsing Chen , Jiunn-Hsiung Liao , Min-Chieh Yang , Chuan-Kai Wang
发明人： Meng-Jun Wang , Yi-Hsing Chen , Jiunn-Hsiung Liao , Min-Chieh Yang , Chuan-Kai Wang
IPC分类号： H01L29/02
CPC分类号： H01L21/0271 , H01L21/0332 , H01L21/3081 , H01L21/32139
摘要： A stacked structure for patterning a material layer to form an opening pattern with a predetermined opening width in the layer is provided. The stacked structure includes an underlayer, a silicon rich organic layer, and a photoresist layer. The underlayer is on the material layer. The silicon rich organic layer is between the underlayer and the photoresist layer. The thickness of the photoresist layer is smaller than that of the underlayer and larger than two times of the thickness of the silicon rich organic layer. The thickness of the underlayer is smaller than three times of the predetermined opening width.
摘要翻译：提供了用于图案化材料层以形成在该层中具有预定开口宽度的开口图案的层叠结构。层叠结构包括底层，富硅有机层和光致抗蚀剂层。底层在材料层上。富硅有机层位于底层和光刻胶层之间。光致抗蚀剂层的厚度小于底层的厚度，并且大于富硅有机层的厚度的两倍。底层的厚度小于预定开口宽度的三倍。

6. 发明申请

US20070054458A1 Method of fabricating spacers and cleaning method of post-etching and semiconductor device 有权
标题翻译：制造间隔物的方法和后蚀刻和半导体器件的清洗方法
公开(公告)号：US20070054458A1
公开(公告)日：2007-03-08
申请号：US11221611
申请日：2005-09-07
申请人： Chuan-Kai Wang , Yi-Hsing Chen , Chia-Jui Liu , Juan-Yi Chen , Ming-Yi Lin
发明人： Chuan-Kai Wang , Yi-Hsing Chen , Chia-Jui Liu , Juan-Yi Chen , Ming-Yi Lin
IPC分类号： H01L21/336
CPC分类号： H01L21/31116 , H01L21/0206 , H01L29/6656 , Y10S438/976
摘要： A method of fabricating spacers is provided. The method includes providing a substrate with a device structure formed thereon. The device structure comprises a gate structure and a pair of source/drain regions. Then, a spacer material layer is formed over the substrate to cover the substrate and the device structure. Thereafter, an etching process is performed to remove a portion of the spacer material layer so that spacers are formed on the respective sidewalls of the gate structure. After that, a plasma treatment step is performed to form a spacer protection layer on the surface of the substrate, the spacers and the gate structure.
摘要翻译：提供了制造间隔物的方法。该方法包括提供其上形成有器件结构的衬底。器件结构包括栅极结构和一对源极/漏极区域。然后，在衬底上形成间隔材料层以覆盖衬底和器件结构。此后，进行蚀刻处理以去除间隔材料层的一部分，使得在栅极结构的相应侧壁上形成间隔物。之后，执行等离子体处理步骤，以在衬底的表面，间隔物和栅极结构上形成间隔保护层。

7. 发明申请

US20080036018A1 METHOD OF FABRICATING SPACERS AND CLEANING METHOD OF POST-ETCHING AND SEMICONDUCTOR DEVICE 审中-公开
标题翻译：隔离层的制造方法和后处理和半导体器件的清洗方法
公开(公告)号：US20080036018A1
公开(公告)日：2008-02-14
申请号：US11874683
申请日：2007-10-18
申请人： Chuan-Kai Wang , Yi-Hsing Chen , Chia-Jui Liu , Juan-Yi Chen , Ming-Yi Lin
发明人： Chuan-Kai Wang , Yi-Hsing Chen , Chia-Jui Liu , Juan-Yi Chen , Ming-Yi Lin
IPC分类号： H01L29/76
CPC分类号： H01L21/31116 , H01L21/0206 , H01L29/6656 , Y10S438/976
摘要： A method of fabricating spacers is provided. The method includes providing a substrate with a device structure formed thereon. The device structure comprises a gate structure and a pair of source/drain regions. Then, a spacer material layer is formed over the substrate to cover the substrate and the device structure. Thereafter, an etching process is performed to remove a portion of the spacer material layer so that spacers are formed on the respective sidewalls of the gate structure. After that, a plasma treatment step is performed to form a spacer protection layer on the surface of the substrate, the spacers and the gate structure.
摘要翻译：提供了制造间隔物的方法。该方法包括提供其上形成有器件结构的衬底。器件结构包括栅极结构和一对源极/漏极区域。然后，在衬底上形成间隔材料层以覆盖衬底和器件结构。此后，进行蚀刻处理以去除间隔材料层的一部分，使得在栅极结构的相应侧壁上形成间隔物。之后，执行等离子体处理步骤，以在衬底的表面，间隔物和栅极结构上形成间隔保护层。

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