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1. 发明授权

US06744469B1 Illumination compensation using built-in reference 有权
标题翻译：照明补偿使用内置参考
公开(公告)号：US06744469B1
公开(公告)日：2004-06-01
申请号：US09459555
申请日：1999-12-13
申请人： John C. Gudenburr , William L. Kozlowski , Christopher N. St. John , John D. Vala
发明人： John C. Gudenburr , William L. Kozlowski , Christopher N. St. John , John D. Vala
IPC分类号： H04N5222
CPC分类号： H04N1/40006 , H04N1/028 , H04N1/02865 , H04N1/02885 , H04N1/40056 , H04N5/235 , H04N2201/044
摘要： A method and system provide for real-time compensation of an imaging system for variations in illumination intensity. An illumination system provides reflected illumination, and a charge coupled device system directly detects the reflected illumination from the illumination system. The CCD system then converts the reflected illumination into illumination data and a host processor converts the illumination data into adjusted control data and final image data. The adjusted control data is based on an illumination profile and a reference illumination intensity. The reference illumination intensity is measured before each document with a compensation reference, and is compared to the illumination profile to adjust control parameters in a real-time mode. Directly measuring the illumination intensity with the CCD system allows for a reduction in parts, manufacturing steps, and errors.
摘要翻译：一种方法和系统为成像系统实时补偿照明强度的变化。照明系统提供反射照明，并且电荷耦合器件系统直接检测来自照明系统的反射照明。然后，CCD系统将反射的照明转换成照明数据，并且主机处理器将照明数据转换成调节的控制数据和最终的图像数据。经调整的控制数据基于照明轮廓和参考照明强度。在具有补偿参考的每个文档之前测量参考照明强度，并将其与照明轮廓进行比较以在实时模式中调整控制参数。使用CCD系统直接测量照明强度可以减少零件，制造步骤和错误。

2. 发明授权

US06856694B2 Decision enhancement system for a vehicle safety restraint application 失效
标题翻译：车辆安全限制应用的决策增强系统
公开(公告)号：US06856694B2
公开(公告)日：2005-02-15
申请号：US10703957
申请日：2003-11-07
申请人： Michael E. Farmer , Mark L. Dell' Eva , Christopher N. St. John , Galen E. Ressler
发明人： Michael E. Farmer , Mark L. Dell' Eva , Christopher N. St. John , Galen E. Ressler
IPC分类号： B60R21/01 , B60R21/013 , B60R21/015 , G01S1/00 , G06K9/00 , G06T7/00 , G06T7/20
CPC分类号： B60R21/01542 , B60R21/013 , B60R21/01538 , B60R21/0154 , G06K9/00362 , G06K9/00832 , G06T7/20 , G06T7/70
摘要： The disclosure describes systems and methods that pertain to interactions between a vehicle and an occupant within the vehicle. More specifically, various systems and methods for enhancing the decisions of automated vehicle applications (collectively “decision enhancement system”) are disclosed. In a safety restraint embodiment, a sensor is used to capture various sensor readings. Sensor readings are typically in the form of images. Occupant information, such as location attributes, motion attributes, and occupant category attributes can be obtained from the sensor readings. If the system concludes that the deployment of a safety restraint is potentially justified, an at-risk-zone detector can be used to determine whether or not the occupant will be too close to the deploying safety restraint at the time of deployment for the safety restraint to be safely deployed.
摘要翻译：本公开描述涉及车辆和车辆内的乘客之间的相互作用的系统和方法。更具体地，公开了用于增强自动车辆应用的决定（统称为“决策增强系统”）的各种系统和方法。在安全约束实施例中，传感器用于捕获各种传感器读数。传感器读数通常为图像形式。可以从传感器读数获得乘客信息，如位置属性，运动属性和乘员类别属性。如果系统得出结论认为安全限制的部署是有潜力的，则可以使用危险区域检测器来确定在部署安全约束时乘客是否太靠近部署安全约束安全部署。

3. 发明授权

US06757762B1 Multi-mode processor bus bridge 失效
标题翻译：多模式处理器总线桥
公开(公告)号：US06757762B1
公开(公告)日：2004-06-29
申请号：US09430314
申请日：1999-10-29
申请人： Paul McCarthy , Christopher N. St. John
发明人： Paul McCarthy , Christopher N. St. John
IPC分类号： G06F1342
CPC分类号： G06F13/4059
摘要： A processor bus bridge includes a buffer space disposed between a first bus and a second bus. The first bus is operated in a first mode by a first processor and the second bus is operated in a second mode by a second processor. The first bus has an electrical structure which is different from the electrical structure of the second bus. The first mode may also differ from the second mode. The processor bus bridge has a protocol logic module disposed between the first processor and the second processor for controlling data transfer across the buffer space in the first and second modes. Thus, the bus bridge enables communications between dissimilar processor buses while increasing performance and reducing CPU overhead.
摘要翻译：处理器总线桥包括设置在第一总线和第二总线之间的缓冲区。第一总线由第一处理器以第一模式操作，第二总线由第二处理器以第二模式操作。第一总线具有与第二总线的电气结构不同的电气结构。第一模式也可以不同于第二模式。处理器总线桥具有布置在第一处理器和第二处理器之间的协议逻辑模块，用于在第一和第二模式中跨缓冲器空间控制数据传输。因此，总线桥可实现不同处理器总线之间的通信，同时提高性能并降低CPU开销。

4. 发明授权

US06513070B1 Multi-channel master/slave interprocessor protocol 有权
标题翻译：多通道主/从处理器协议
公开(公告)号：US06513070B1
公开(公告)日：2003-01-28
申请号：US09357897
申请日：1999-07-21
申请人： William L. Kozlowski , David A. LaPorte , Weston J. Morris , Christopher N. St. John
发明人： William L. Kozlowski , David A. LaPorte , Weston J. Morris , Christopher N. St. John
IPC分类号： G06F900
CPC分类号： G06F13/36
摘要： A method and configuration for interprocessor communication provides reduced latency and complexity, as well as the ability to simultaneously transfer different types of data. A multi-channel interface is disposed between a slave processor and a master processor, wherein the multi-channel interface has a low-latency channel for transferring low-latency information and a high-throughput channel for transferring high-throughput information. The master processor interrupts the slave processor when the master processor has control information to transfer to the slave processor. Interrupt driven notification and the multi-channel interface provide reliable, high-speed communication between dissimilar processors.
摘要翻译：处理器间通信的方法和配置提供了降低的延迟和复杂性，以及同时传送不同类型的数据的能力。多通道接口设置在从处理器和主处理器之间，其中多通道接口具有用于传送低等待时间信息的低延迟信道和用于传送高吞吐量信息的高吞吐量信道。当主处理器具有传输到从属处理器的控制信息时，主处理器中断从属处理器。中断驱动通知和多通道接口提供不同处理器之间可靠，高速的通信。

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