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1. 发明申请

US20130150991A1 DATA PROCESSING MODULE OF DIGITAL AUDIO PROCESSING DEVICE, DIGITAL AUDIO PROCESSING CONTROLLER MODULE OF PORTABLE DEVICE, AND CONTROL SYSTEM 审中-公开
标题翻译：数字音频处理设备的数据处理模块，便携式设备的数字音频处理控制器模块和控制系统
公开(公告)号：US20130150991A1
公开(公告)日：2013-06-13
申请号：US13442491
申请日：2012-04-09
申请人： SHEN-CHI LIU , TES-MING LAN , SHENG-FENG WENG , CHIH-PIN HUNG
发明人： SHEN-CHI LIU , TES-MING LAN , SHENG-FENG WENG , CHIH-PIN HUNG
IPC分类号： G06F17/00
CPC分类号： G11B19/025 , G11B19/027
摘要： The invention relates to a data processing module of a digital audio processing device, a digital audio processing controller module of a portable device and a control system. Using the data processing module of the digital audio processing device and the digital audio processing controller module of the portable device, the portable device can transmit control command packet to control the digital audio processing device. The user can use a large-size screen of the portable device to control the digital audio processing device to overcome the shortage in the display function of conventional device. Furthermore, when using the portable device under the condition where the hardware of the digital audio processing device is not changed, the functions of the digital audio processing device can be additionally extended. Therefore, the extended functions of the digital audio processing device can be flexibly added in response to customers and DJ's requirements.
摘要翻译：本发明涉及数字音频处理设备的数据处理模块，便携式设备的数字音频处理控制器模块和控制系统。使用便携式设备的数字音频处理设备的数据处理模块和数字音频处理控制器模块，便携式设备可以发送控制命令分组来控制数字音频处理设备。用户可以使用便携式设备的大尺寸屏幕来控制数字音频处理设备以克服常规设备的显示功能的不足。此外，当在数字音频处理装置的硬件没有改变的条件下使用便携式装置时，可以额外地扩展数字音频处理装置的功能。因此，数字音频处理设备的扩展功能可以根据客户和DJ的要求灵活添加。

2. 发明授权

US08350367B2 Semiconductor device packages with electromagnetic interference shielding 有权
标题翻译：具有电磁干扰屏蔽的半导体器件封装
公开(公告)号：US08350367B2
公开(公告)日：2013-01-08
申请号：US12336400
申请日：2008-12-16
申请人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
发明人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
IPC分类号： H01L23/552 , H01L21/56
CPC分类号： H01L21/6835 , H01L21/568 , H01L23/3121 , H01L23/49805 , H01L23/552 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2221/68345 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a substrate unit including a grounding element disposed adjacent to a periphery of the substrate unit; (2) a semiconductor device disposed adjacent to an upper surface of the substrate unit; (3) a package body disposed adjacent to the upper surface and covering the semiconductor device; and (4) an EMI shield disposed adjacent to exterior surfaces of the package body and electrically connected to a connection surface of the grounding element. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit, and the connection surface of the grounding element is electrically exposed adjacent to the lateral surface of the substrate unit. The grounding element corresponds to a remnant of a grounding via, and provides an electrical pathway to ground electromagnetic emissions incident upon the EMI shield.
摘要翻译：这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。在一个实施例中，半导体器件封装包括：（1）衬底单元，其包括邻近衬底单元的周边设置的接地元件; （2）设置在所述衬底单元的上表面附近的半导体器件; （3）与上表面相邻并且覆盖半导体器件的封装体; 和（4）EMI封装体，其与所述封装主体的外表面相邻地设置并电连接到所述接地元件的连接表面。封装主体的侧表面基本上与衬底单元的侧表面对准，并且接地元件的连接表面邻近衬底单元的侧表面电暴露。接地元件对应于接地通孔的残留物，并且提供了电磁路径，用于接地入射在EMI屏蔽上的电磁辐射。

3. 发明申请

US20110260301A1 SEMICONDUCTOR DEVICE PACKAGES WITH ELECTROMAGNETIC INTERFERENCE SHIELDING 有权
标题翻译：具有电磁干扰屏蔽的半导体器件封装
公开(公告)号：US20110260301A1
公开(公告)日：2011-10-27
申请号：US13176679
申请日：2011-07-05
申请人： Kuo-Hsien Liao , Chi-Tsung Chiu , Chih-Pin Hung
发明人： Kuo-Hsien Liao , Chi-Tsung Chiu , Chih-Pin Hung
IPC分类号： H01L23/552 , H01L21/56
CPC分类号： H01L23/552 , H01L21/568 , H01L21/6835 , H01L23/3121 , H01L23/49805 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2221/68345 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/81005 , H01L2224/85005 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/15311 , H01L2924/16152 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , Y10T29/49146 , Y10T29/49153 , Y10T29/49165 , Y10T29/49789 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a substrate unit including a grounding element; (2) a semiconductor device disposed adjacent to an upper surface of the substrate unit; (3) a package body disposed adjacent to the upper surface of the substrate unit and covering the semiconductor device; and (4) an EMI shield disposed adjacent to exterior surfaces of the package body and electrically connected to a connection surface of the grounding element. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit, and the connection surface of the grounding element is electrically exposed adjacent to the lateral surface of the substrate unit. The grounding element corresponds to a remnant of an internal grounding via, and provides an electrical pathway to ground electromagnetic emissions incident upon the EMI shield.
摘要翻译：这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。在一个实施例中，半导体器件封装包括：（1）包括接地元件的衬底单元; （2）设置在所述衬底单元的上表面附近的半导体器件; （3）与基板单元的上表面相邻并且覆盖半导体器件的封装体; 和（4）EMI封装体，其与所述封装主体的外表面相邻地设置并电连接到所述接地元件的连接表面。封装主体的侧表面基本上与衬底单元的侧表面对准，并且接地元件的连接表面邻近衬底单元的侧表面电暴露。接地元件对应于内部接地通孔的残留物，并且提供了入射到EMI屏蔽层上的接地电磁辐射的电气路径。

4. 发明授权

US08000107B2 Carrier with embedded component and method for fabricating the same 有权
标题翻译：具有嵌入式元件的载体及其制造方法
公开(公告)号：US08000107B2
公开(公告)日：2011-08-16
申请号：US12078330
申请日：2008-03-28
申请人： Yung-Hui Wang , In-De Ou , Chih-Pin Hung
发明人： Yung-Hui Wang , In-De Ou , Chih-Pin Hung
IPC分类号： H01L23/495
CPC分类号： H05K1/185 , H01L23/5389 , H01L24/19 , H01L2924/14 , H05K3/4602 , H05K2201/09681 , H05K2201/09781 , H05K2201/10636 , H05K2203/1178 , Y02P70/611 , H01L2924/00
摘要： A carrier with embedded components comprises a substrate and at least one embedded component. The substrate has at least one slot and a first composite layer. The embedded component is disposed at the slot of the substrate. The first composite layer has a degassing structure, at least one first through hole and at least one first fastener, wherein the degassing structure corresponds to the slot, the first through hole exposes the embedded component, and the first fastener is formed at the first through hole and contacts the embedded component. According to the present invention, the degassing structure can smoothly discharge the hydrosphere existing within the carrier under high temperature circumstances and the first fastener is in contact with the embedded component, which increases the joint strength between the embedded component and the substrate.
摘要翻译：具有嵌入式部件的载体包括基板和至少一个嵌入部件。衬底具有至少一个槽和第一复合层。嵌入式部件设置在基板的狭槽处。第一复合层具有脱气结构，至少一个第一通孔和至少一个第一紧固件，其中脱气结构对应于槽，第一通孔暴露嵌入的部件，并且第一紧固件形成在第一通孔孔并与嵌入式组件接触。根据本发明，脱气结构能够在高温环境下平稳地排出存在于载体内的水圈，并且第一紧固件与嵌入部件接触，这增加了嵌入部件和基板之间的接合强度。

5. 发明授权

US07586184B2 Electronic package 有权
标题翻译：电子包装
公开(公告)号：US07586184B2
公开(公告)日：2009-09-08
申请号：US11870620
申请日：2007-10-11
申请人： Chih Pin Hung , Chi Tsung Chiu , In De Ou , Yung Hui Wang
发明人： Chih Pin Hung , Chi Tsung Chiu , In De Ou , Yung Hui Wang
IPC分类号： H01L23/498
CPC分类号： H05K1/144 , H01L24/16 , H01L24/45 , H01L24/48 , H01L25/162 , H01L2224/16 , H01L2224/16225 , H01L2224/45144 , H01L2224/48091 , H01L2924/00011 , H01L2924/00014 , H01L2924/01079 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/19107 , H05K2201/042 , H05K2201/10977 , H05K2203/049 , Y10T428/23 , H01L2224/0401 , H01L2924/00012
摘要： An electronic package is provided. The electronic package includes a first substrate, an electronic component, a first sealant, a second substrate, a plurality of bonding wires and a second sealant, wherein the first substrate has opposing upper and lower surfaces and a plurality of bonding pads is disposed on the upper surface of the first substrate. The electronic component is positioned on the upper surface of the first substrate and electrically connected to the bonding pads. The first sealant is formed on the upper surface of the first substrate to encapsulate the electronic component. The lower surface of the second substrate is attached to the first sealant. The upper surface of the second substrate includes a central protrusion and a rim portion which surrounds and is lower than the central protrusion. A plurality of bonding wires is used to electrically connect the rim portion to the first substrate. The second sealant is formed on the upper surface of the first substrate and on the rim portion of the second substrate to encapsulate the bonding wires, the first sealant and the rim portion.
摘要翻译：提供电子包装。电子封装包括第一基板，电子部件，第一密封剂，第二基板，多个接合线和第二密封剂，其中第一基板具有相对的上表面和下表面，并且多个接合焊盘设置在第一基板的上表面。电子部件位于第一基板的上表面上并电连接到接合焊盘。第一密封剂形成在第一基板的上表面上以封装电子部件。第二基板的下表面附接到第一密封剂。第二基板的上表面包括中心突起和围绕中心突起的边缘部分。使用多个接合线将边缘部分电连接到第一基板。第二密封剂形成在第一基板的上表面和第二基板的边缘部分上，以封装接合线，第一密封剂和边缘部分。

6. 发明申请

US20090194851A1 SEMICONDUCTOR DEVICE PACKAGES WITH ELECTROMAGNETIC INTERFERENCE SHIELDING 有权
标题翻译：具有电磁干扰屏蔽的半导体器件封装
公开(公告)号：US20090194851A1
公开(公告)日：2009-08-06
申请号：US12336400
申请日：2008-12-16
申请人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
发明人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
IPC分类号： H01L23/552 , H01L21/50
CPC分类号： H01L21/6835 , H01L21/568 , H01L23/3121 , H01L23/49805 , H01L23/552 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2221/68345 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a substrate unit including a grounding element disposed adjacent to a periphery of the substrate unit; (2) a semiconductor device disposed adjacent to an upper surface of the substrate unit; (3) a package body disposed adjacent to the upper surface and covering the semiconductor device; and (4) an EMI shield disposed adjacent to exterior surfaces of the package body and electrically connected to a connection surface of the grounding element. A lateral surface of tile package body is substantially aligned with a lateral surface of the substrate unit, and the connection surface of the grounding element is electrically exposed adjacent to the lateral surface of the substrate unit. The grounding element corresponds to a remnant of a grounding via, and provides an electrical pathway to ground electromagnetic emissions incident upon the EMI shield.
摘要翻译：这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。在一个实施例中，半导体器件封装包括：（1）衬底单元，其包括邻近衬底单元的周边设置的接地元件; （2）设置在所述衬底单元的上表面附近的半导体器件; （3）与上表面相邻并且覆盖半导体器件的封装体; 和（4）EMI封装体，其与所述封装主体的外表面相邻地设置并电连接到所述接地元件的连接表面。瓦片封装主体的侧表面基本上与基板单元的侧表面对准，并且接地元件的连接表面邻近基板单元的侧表面电暴露。接地元件对应于接地通孔的残留物，并且提供了电磁路径，用于接地入射在EMI屏蔽上的电磁辐射。

7. 发明授权

US07248134B2 Inductor and capacitor formed of build-up vias 有权
标题翻译：由积聚通孔形成的电感和电容器
公开(公告)号：US07248134B2
公开(公告)日：2007-07-24
申请号：US11186859
申请日：2005-07-22
申请人： Sung-Mao Wu , Chi-Tsung Chiu , Chih-Pin Hung
发明人： Sung-Mao Wu , Chi-Tsung Chiu , Chih-Pin Hung
IPC分类号： H01P3/08
CPC分类号： H05K1/0216 , H01G4/236 , H05K1/025 , H05K1/162 , H05K1/165 , H05K2201/09509
摘要： An inductor and capacitor implemented with build-up vias. The inductor and capacitor comprise a conductor plane, a dielectric layer, an inductor/capacitor inducing build-up via and a conductor layer. There is a conducting material in the inductor/capacitor inducing build-up via and a fist end thereof is in contact with the conductor plane. The length of the inductor inducing build-up via is larger than one fourth of a signal wavelength while the length of the conductor inducing build-up via is smaller than one fourth of a signal wavelength.
摘要翻译：用积层通孔实现的电感和电容器。电感器和电容器包括导体平面，电介质层，电感器/电容器，用于引导积聚通孔和导体层。在电感器/电容器中存在导电材料，其导致积聚通孔，并且其第一端与导体平面接触。感应电感通孔的电感长度大于信号波长的四分之一，而导体积聚通孔的导体长度小于信号波长的四分之一。

8. 发明授权

US06430059B1 Integrated circuit package substrate integrating with decoupling capacitor 有权
标题翻译：集成电路封装衬底与去耦电容集成
公开(公告)号：US06430059B1
公开(公告)日：2002-08-06
申请号：US09741610
申请日：2000-12-19
申请人： Chih-Pin Hung , Jung-sheng Chiang
发明人： Chih-Pin Hung , Jung-sheng Chiang
IPC分类号： H05K111
CPC分类号： H05K1/162 , H01L23/49822 , H01L2924/0002 , H01L2924/3011 , H05K3/4069 , H05K2201/0187 , H05K2201/0209 , H05K2201/09645 , H05K2201/09981 , H01L2924/00
摘要： An integrated circuit package substrate. At least one insulating layer is formed between every two neighboring patterned wiring layers for isolation. At least a via is formed to penetrate through the insulating layers to electrically connect the patterned wiring layers. A capacitor is formed within at least one of the insulating layer. The capacitor has two electrodes insulated by a dielectric layer. One of the electrodes is connected to a power source, while the other is connected to ground.
摘要翻译：集成电路封装基板。在每两个相邻的图案化的布线层之间形成至少一个绝缘层用于隔离。至少形成通孔以穿透绝缘层以电连接图案化的布线层。在绝缘层的至少一个内部形成电容器。电容器具有由电介质层绝缘的两个电极。电极中的一个连接到电源，而另一个连接到地。

9. 发明授权

US08212339B2 Semiconductor device packages with electromagnetic interference shielding 有权
标题翻译：具有电磁干扰屏蔽的半导体器件封装
公开(公告)号：US08212339B2
公开(公告)日：2012-07-03
申请号：US12770645
申请日：2010-04-29
申请人： Kuo-Hsien Liao , Jian-Cheng Chen , Chen-Chuan Fan , Chi-Tsung Chiu , Chih-Pin Hung
发明人： Kuo-Hsien Liao , Jian-Cheng Chen , Chen-Chuan Fan , Chi-Tsung Chiu , Chih-Pin Hung
IPC分类号： H01L23/552 , H01L21/78
CPC分类号： H01L23/552 , H01L21/6835 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2221/68331 , H01L2224/16225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/97 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/07802 , H01L2924/15311 , H01L2924/16152 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2224/0401
摘要： Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes a grounding element disposed adjacent to a periphery of a substrate unit and at least partially extending between an upper surface and a lower surface of the substrate unit. The grounding element includes an indented portion that is disposed adjacent to a lateral surface of the substrate unit. The semiconductor device package also includes an EMI shield that is electrically connected to the grounding element and is inwardly recessed adjacent to the indented portion of the grounding element.
摘要翻译：这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。在一个实施例中，半导体器件封装包括邻近衬底单元的周边设置并至少部分地在衬底单元的上表面和下表面之间延伸的接地元件。接地元件包括与衬底单元的侧表面相邻设置的凹入部分。半导体器件封装还包括EMI屏蔽，其电连接到接地元件并且与接地元件的凹入部分相邻地向内凹陷。

10. 发明授权

US08022511B2 Semiconductor device packages with electromagnetic interference shielding 有权
标题翻译：具有电磁干扰屏蔽的半导体器件封装
公开(公告)号：US08022511B2
公开(公告)日：2011-09-20
申请号：US12336407
申请日：2008-12-16
申请人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
发明人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
IPC分类号： H01L23/552
CPC分类号： H01L24/97 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/49805 , H01L23/552 , H01L24/16 , H01L24/48 , H01L24/49 , H01L2221/68331 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/16152 , H01L2924/166 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a substrate unit; (2) a grounding element disposed adjacent to a periphery of the substrate unit and extending upwardly from an upper surface of the substrate unit; (3) a semiconductor device disposed adjacent to the upper surface; (4) a package body disposed adjacent to the upper surface and covering the semiconductor device and the grounding element; and (5) an EMI shield disposed adjacent to exterior surfaces of the package body and electrically connected to a lateral surface of the grounding element. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit. The grounding element corresponds to a remnant of a conductive bump, and provides an electrical pathway to ground electromagnetic emissions incident upon the EMI shield.
摘要翻译：这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。在一个实施例中，半导体器件封装包括：（1）衬底单元; （2）接地元件，其设置在所述基板单元的周边附近并从所述基板单元的上表面向上延伸; （3）邻近上表面设置的半导体器件; （4）与所述上表面相邻并且覆盖所述半导体器件和所述接地元件的封装体; 和（5）邻近封装体的外表面设置并电连接到接地元件的侧表面的EMI屏蔽。封装主体的侧表面基本上与衬底单元的侧表面对准。接地元件对应于导电凸块的残余物，并且提供了入射到EMI屏蔽上的接地电磁辐射的电路径。

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