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1. 发明授权

US06541320B2 Method to controllably form notched polysilicon gate structures 失效
标题翻译：可控地形成切口多晶硅栅极结构的方法
公开(公告)号：US06541320B2
公开(公告)日：2003-04-01
申请号：US09928210
申请日：2001-08-10
申请人： Jeffrey Brown , Richard Wise , Hongwen Yan , Qingyun Yang , Chienfan Yu
发明人： Jeffrey Brown , Richard Wise , Hongwen Yan , Qingyun Yang , Chienfan Yu
IPC分类号： H01L21336
CPC分类号： H01L21/32137 , H01L21/28114 , H01L21/32139 , H01L21/82385 , H01L29/42376
摘要： A method and structure for forming a notched gate structure having a gate conductor layer on a gate dielectric layer. The gate conductor layer has a first thickness. The inventive method includes patterning a mask over the gate conductor layer, etching the gate conductor layer in regions not protected by the mask to a reduced thickness, (the reduced thickness being less than the first thickness), depositing a passivating film over the gate conductor layer, etching the passivating film to remove the passivating film from horizontal portions of the gate conductor layer (using an anisotropic etch), selectively etching the gate conductor layer to remove the gate conductor layer from all regions not protected by the mask or the passivating film. This forms undercut notches within the gate conductor layer at corner locations where the gate conductor meets the gate dielectric layer. The passivating film comprises a C-containing film, a Si-containing film, a Si—C-containing film or combinations thereof.
摘要翻译：一种用于形成在栅极介电层上具有栅极导体层的缺口栅极结构的方法和结构。栅极导体层具有第一厚度。本发明的方法包括在栅极导体层上图案化掩模，在未被掩模保护的区域中将栅极导体层蚀刻到减小的厚度（减小的厚度小于第一厚度），在栅极导体上沉积钝化膜蚀刻钝化膜以从栅极导体层的水平部分去除钝化膜（使用各向异性蚀刻），选择性地蚀刻栅极导体层以从不受掩模或钝化膜保护的所有区域去除栅极导体层。这在栅极导体与栅极介电层相遇的拐角处形成栅极导体层内的底切凹口。钝化膜包括含C的膜，含Si膜，含Si-C的膜或其组合。

2. 发明授权

US06518151B1 Dual layer hard mask for eDRAM gate etch process 失效
标题翻译：双层硬掩模，用于eDRAM门蚀刻工艺
公开(公告)号：US06518151B1
公开(公告)日：2003-02-11
申请号：US09924118
申请日：2001-08-07
申请人： David Mark Dobuzinsky , Babar Ali Khan , Joyce C. Liu , Paul R. Wensley , Chienfan Yu
发明人： David Mark Dobuzinsky , Babar Ali Khan , Joyce C. Liu , Paul R. Wensley , Chienfan Yu
IPC分类号： H01L2122
CPC分类号： H01L27/10894 , H01L21/32139 , H01L21/76897 , H01L21/823437 , H01L21/823475 , H01L27/10873
摘要： A method of fabricating an integrated circuit chip having a first region of a first layout rule and a second region of a second layout rule. The method includes using a first material to establish a first hard mask pattern in only the first region and using a second material to establish a second hard mask pattern on top of the first hard mask pattern. The second material is additionally used to establish a third hard mask pattern in the second region.
摘要翻译：一种制造集成电路芯片的方法，该集成电路芯片具有第一布局规则的第一区域和第二布局规则的第二区域。该方法包括使用第一材料仅在第一区域中建立第一硬掩模图案，并且使用第二材料在第一硬掩模图案的顶部上建立第二硬掩模图案。第二材料另外用于在第二区域中建立第三硬掩模图案。

3. 发明授权

US06228769B1 Endpoint detection by chemical reaction and photoionization 失效
标题翻译：通过化学反应和光电离终点检测
公开(公告)号：US06228769B1
公开(公告)日：2001-05-08
申请号：US09073606
申请日：1998-05-06
申请人： Leping Li , James Albert Gilhooly , Clifford Owen Morgan, III , Cong Wei , Chienfan Yu
发明人： Leping Li , James Albert Gilhooly , Clifford Owen Morgan, III , Cong Wei , Chienfan Yu
IPC分类号： H01L21302
CPC分类号： B24B37/013 , B24B49/00 , H01L21/30625
摘要： Detection of the endpoint for removal of a target film overlying a stopping film by removing the target film with a process that selectively generates a chemical reaction product (for example ammonia when polishing a wafer with a nitride film in a slurry containing KOH) with either the target or stopping film, and monitoring the level of chemical reaction product by threshold photoionization mass spectroscopy as the target film is removed.
摘要翻译：通过用选择性地产生化学反应产物（例如在含有KOH的浆料中用氮化物膜研磨晶片）的方法除去目标膜，检测用于去除覆盖停止膜的目标膜的终点，目标或停止胶片，并在去除靶膜时通过阈值光电离质谱监测化学反应产物的含量。

4. 发明授权

US5876879A Oxide layer patterned by vapor phase etching 失效
标题翻译：通过气相蚀刻图案化的氧化物层
公开(公告)号：US5876879A
公开(公告)日：1999-03-02
申请号：US865258
申请日：1997-05-29
申请人： Richard L. Kleinhenz , Wesley C. Natzle , Chienfan Yu
发明人： Richard L. Kleinhenz , Wesley C. Natzle , Chienfan Yu
IPC分类号： H01L21/311 , G03F9/00
CPC分类号： H01L21/31116 , H01L21/31144
摘要： Hydrogen fluoride undercut of oxide layers may be reduced by using a low pressure mixture of gaseous hydrogen fluoride and gaseous ammonia mixture. Organic photoresists can be used as a masking material when using the gaseous hydrogen fluoride/ammonia mixture without resulting in an enhanced reaction rate. In addition, because of the reaction conditions, the dimensions in the oxide layer being etched can be specifically sized smaller than openings made in the overcoating masking material.
摘要翻译：可以通过使用气态氟化氢和气态氨混合物的低压混合物来降低氧化物层的氟化氢底切。当使用气态氟化氢/氨混合物时，有机光致抗蚀剂可用作掩蔽材料，而不会导致增强的反应速率。此外，由于反应条件，被蚀刻的氧化物层中的尺寸可以特别地小于在外涂掩模材料中制成的开口的尺寸。

5. 发明授权

US5838055A Trench sidewall patterned by vapor phase etching 失效
标题翻译：通过气相蚀刻图案化的沟槽侧壁
公开(公告)号：US5838055A
公开(公告)日：1998-11-17
申请号：US865261
申请日：1997-05-29
申请人： Richard L. Kleinhenz , Wesley C. Natzle , Chienfan Yu
发明人： Richard L. Kleinhenz , Wesley C. Natzle , Chienfan Yu
IPC分类号： H01L21/02 , H01L21/311 , H01L27/108
CPC分类号： H01L28/40 , H01L21/31111 , H01L21/31144
摘要： Hydrogen fluoride undercut of oxide layers may be reduced by using a low pressure mixture of gaseous hydrogen fluoride and gaseous ammonia mixture. Organic photoresists can be used as a masking material when using the gaseous hydrogen fluoride/ammonia mixture without resulting in an enhanced reaction rate. In addition, because of the reaction conditions, the dimensions in the oxide layer being etched can be specifically sized smaller than openings made in the overcoating masking material.
摘要翻译：可以通过使用气态氟化氢和气态氨混合物的低压混合物来降低氧化物层的氟化氢底切。当使用气态氟化氢/氨混合物时，有机光致抗蚀剂可用作掩蔽材料，而不会导致增强的反应速率。此外，由于反应条件，被蚀刻的氧化物层中的尺寸可以特别地小于在外涂掩模材料中制成的开口的尺寸。

6. 发明授权

US06890815B2 Reduced cap layer erosion for borderless contacts 失效
标题翻译：减少无边界接触的盖层侵蚀
公开(公告)号：US06890815B2
公开(公告)日：2005-05-10
申请号：US10655199
申请日：2003-09-04
申请人： Johnathan Faltermeier , Jeremy Stephens , David Dobuzinsky , Larry Clevenger , Munir D. Naeem , Chienfan Yu , Larry Nesbit , Rama Divakaruni , Michael Maldei
发明人： Johnathan Faltermeier , Jeremy Stephens , David Dobuzinsky , Larry Clevenger , Munir D. Naeem , Chienfan Yu , Larry Nesbit , Rama Divakaruni , Michael Maldei
IPC分类号： H01L21/60 , H01L21/8242 , H01L29/76
CPC分类号： H01L27/10888 , H01L21/76897 , H01L27/10864 , H01L27/10876 , H01L27/10891
摘要： A method of forming borderless contacts and a borderless contact structure for semiconductor devices. A preferred embodiment comprises using a second etch selectivity material disposed over a first etch selectivity material to preserve the first etch selectivity material during the etch processes for the various material layers of the semiconductor device while forming the borderless contacts.
摘要翻译：形成无边界接触的方法和用于半导体器件的无边界接触结构。优选实施例包括使用设置在第一蚀刻选择性材料上的第二蚀刻选择性材料，以在半导体器件的各种材料层的蚀刻工艺期间保持第一蚀刻选择性材料，同时形成无边界接触。

7. 发明授权

US06429067B1 Dual mask process for semiconductor devices 失效
标题翻译：半导体器件的双掩模工艺
公开(公告)号：US06429067B1
公开(公告)日：2002-08-06
申请号：US09765036
申请日：2001-01-17
申请人： Joyce C. Liu , James C. Brighten , Jeffrey J. Brown , John Golz , George A. Kaplita , Rebecca Mih , Senthil Srinivasan , Jin Jwang Wu , Teresa J. Wu , Chienfan Yu
发明人： Joyce C. Liu , James C. Brighten , Jeffrey J. Brown , John Golz , George A. Kaplita , Rebecca Mih , Senthil Srinivasan , Jin Jwang Wu , Teresa J. Wu , Chienfan Yu
IPC分类号： H01L218242
CPC分类号： H01L27/10894 , H01L21/823842 , H01L27/10873
摘要： A method for fabricating a dual gate structure, comprising providing a semiconductor substrate having a first device area and a second device area covered by a gate oxide layer and a polysilicon layer, forming a first hard mask over the polysilicon layer, said first hard mask being a material that is resistant to a first etching, but susceptible to a second etching forming a second hard mask over the first hard mask and the polysilicon layer, said second hard mask being a material that is resistant to a second etching, but susceptible to a first etching, patterning and etching said second hard mask with a first etch to form a gate pattern on a first device area, and patterning and etching said first hard mask with a second etch to transfer gate patterns on the first and second device areas.
摘要翻译：一种制造双栅结构的方法，包括提供半导体衬底，其具有由栅极氧化层和多晶硅层覆盖的第一器件区域和第二器件区域，在所述多晶硅层上形成第一硬掩模，所述第一硬掩模为耐受第一蚀刻的材料，但易于在第一硬掩模和多晶硅层上形成第二硬掩模的第二蚀刻，所述第二硬掩模是耐第二蚀刻的材料，但易受第首先用第一蚀刻蚀刻图案并蚀刻所述第二硬掩模，以在第一器件区域上形成栅极图案，并用第二蚀刻图案化和蚀刻所述第一硬掩模以在第一和第二器件区域上传输栅极图案。

8. 发明授权

US06419785B1 Endpoint detection by chemical reaction 有权
标题翻译：通过化学反应进行端点检测
公开(公告)号：US06419785B1
公开(公告)日：2002-07-16
申请号：US09678633
申请日：2000-10-03
申请人： Leping Li , James Albert Gilhooly , Clifford Owen Morgan, III , Cong Wei , Chienfan Yu
发明人： Leping Li , James Albert Gilhooly , Clifford Owen Morgan, III , Cong Wei , Chienfan Yu
IPC分类号： C23F102
CPC分类号： B24B37/30 , B24B37/013 , H01L21/31053
摘要： Detection of the endpoint for removal of a target film overlying a stopping film by removing the target film with a process that selectively generates a chemical reaction product (for example, ammonia when polishing a wafer with a nitride film in a slurry containing KOH) with either the target or stopping film, and monitoring the level of chemical reaction product as the target film is removed. The reaction product is extracted as a gas from the slurry and monitored using a threshold photoionization mass spectrometer.
摘要翻译：通过用选择性地产生化学反应产物的方法（例如，用含有KOH的浆料中的氮化物膜研磨晶片的氨），通过用任一种方法选择性地生成化学反应产物的方法（例如，氨）目标或停止膜，并且在去除靶膜时监测化学反应产物的水平。反应产物从浆液中提取为气体，并使用阈值光电离质谱仪进行监测。

9. 发明授权

US06294102B1 Selective dry etch of a dielectric film 失效
标题翻译：电介质膜的选择性干蚀刻
公开(公告)号：US06294102B1
公开(公告)日：2001-09-25
申请号：US09305432
申请日：1999-05-05
申请人： Delores A. Bennett , James P. Norum , Hongwen Yan , Chienfan Yu
发明人： Delores A. Bennett , James P. Norum , Hongwen Yan , Chienfan Yu
IPC分类号： H01L21311
CPC分类号： H01L21/31116 , H01L21/3185
摘要： A process of etching an oxide layer placed over a nitride layer of a substrate with high selectivity. The process comprises plasma etching the oxide layer of the substrate with a carbon and fluorine-containing gas and with a nitrogen-containing gas. A SixNy species is formed which is deposited on the nitride layer substantially in equilibrium with etching of the nitride layer.
摘要翻译：以高选择性蚀刻放置在衬底的氮化物层上的氧化物层的工艺。该方法包括用含碳和含氟气体和含氮气体等离子体蚀刻衬底的氧化物层。形成一个SixNy物质，其沉积在基本上与氮化物层的蚀刻平衡的氮化物层上。

10. 发明授权

US6054328A Method for cleaning the surface of a dielectric 失效
标题翻译：清洁电介质表面的方法
公开(公告)号：US6054328A
公开(公告)日：2000-04-25
申请号：US761166
申请日：1996-12-06
申请人： Peter R. Duncombe , David E. Kotecki , Robert B. Laibowitz , Wesley Natzle , Chienfan Yu
发明人： Peter R. Duncombe , David E. Kotecki , Robert B. Laibowitz , Wesley Natzle , Chienfan Yu
IPC分类号： H01L21/02 , H01L21/306 , H01L21/311 , H01L21/316 , H01L21/00
CPC分类号： H01L21/31122 , H01L21/31691 , H01L21/02052 , H01L21/31111 , H01L28/55
摘要： This invention relates to a method for improving the chemical and electrical performance characteristics of a high dielectric constant material. The method comprises the steps of first obtaining a barium containing high dielectric constant material, the material having an upper surface and then modifying the surface chemistry of said upper surface by interacting said upper surface with a gas reactant in a closed environment. In a variant of the method, the gas reactant preferentially reacting with upper surface as compared to the bulk.
摘要翻译：本发明涉及一种改善高介电常数材料的化学和电学性能特性的方法。该方法包括以下步骤：首先获得含钡高介电常数材料，该材料具有上表面，然后通过在封闭环境中与气体反应物相互作用来改变所述上表面的表面化学性质。在该方法的变体中，气体反应物与体积相比优先与上表面反应。

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