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1. 发明授权

US06956292B2 Bumping process to increase bump height and to create a more robust bump structure 有权
标题翻译：凸起过程增加凸块高度并创建更坚固的凸块结构
公开(公告)号：US06956292B2
公开(公告)日：2005-10-18
申请号：US10613694
申请日：2003-07-03
申请人： Yang-Tung Fan , Cheng-Yu Chu , Fu-Jier Fan , Shih-Jane Lin , Chiou-Shian Peng , Yen-Ming Chen , Kuo-Wei Lin
发明人： Yang-Tung Fan , Cheng-Yu Chu , Fu-Jier Fan , Shih-Jane Lin , Chiou-Shian Peng , Yen-Ming Chen , Kuo-Wei Lin
IPC分类号： H01L21/60 , H01L23/48
CPC分类号： H01L24/11 , H01L2224/03912 , H01L2224/0401 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05171 , H01L2224/05572 , H01L2224/05644 , H01L2224/05655 , H01L2224/1147 , H01L2224/1191 , H01L2224/13099 , H01L2224/45144 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/014 , H01L2924/04941 , H01L2924/10253 , H01L2924/14 , H01L2924/00 , H01L2224/05552 , H01L2924/00014 , H01L2924/013
摘要： A new process is provided which is an extension and improvement of present processing for the creation of a solder bump. After the layers of Under Bump Metal and a layer of solder metal have been created in patterned and etched format and overlying the contact pad, following a conventional processing sequence, a layer of polyimide is deposited. The solder flow is performed using the thickness of the deposited layer of polyimide to control the height of the column underneath the reflown solder.
摘要翻译：提供了一种新的工艺，其是用于产生焊料凸块的当前处理的延伸和改进。在图形化和蚀刻形式下形成了凹凸金属层和焊料金属层之后，按照传统的处理顺序，沉积了一层聚酰亚胺。使用聚酰亚胺沉积层的厚度来进行焊料流动，以控制在重熔焊料下面的柱的高度。

2. 发明授权

US06586323B1 Method for dual-layer polyimide processing on bumping technology 有权
标题翻译：碰撞技术双层聚酰亚胺加工方法
公开(公告)号：US06586323B1
公开(公告)日：2003-07-01
申请号：US09664417
申请日：2000-09-18
申请人： Fu-Jier Fan , Cheng-Yu Chu , Kuo Wei Lin , Shih-Jang Lin , Yang-Tung Fan , Chiou-Shian Peng
发明人： Fu-Jier Fan , Cheng-Yu Chu , Kuo Wei Lin , Shih-Jang Lin , Yang-Tung Fan , Chiou-Shian Peng
IPC分类号： H01L2144
CPC分类号： H01L24/11 , H01L23/3192 , H01L24/05 , H01L24/13 , H01L2224/0401 , H01L2224/05022 , H01L2224/05572 , H01L2224/13099 , H01L2224/131 , H01L2924/0001 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/14 , H01L2924/19042 , H01L2924/00014 , H01L2224/05552
摘要： A new method and processing sequence is provided for the formation of solder bumps that are in contact with underlying aluminum contact pads. A patterned layer of negative photoresist is interposed between a patterned layer of PE Si3N4 and a patterned layer of polyamide insulator. The patterned negative photoresist partially overlays the aluminum contact pad and prevents contact between the layer of polyamide insulator and the aluminum contact pad. By forming this barrier no moisture that is contained in the polyamide insulator can come in contact with the aluminum contact pad, therefore no corrosion in the surface of the aluminum contact pad can occur.
摘要翻译：提供了一种新的方法和处理顺序，用于形成与下面的铝接触焊盘接触的焊料凸块。在图案化的PE Si 3 N 4层和聚酰胺绝缘体的图案化层之间插入负型光致抗蚀剂的图案层。图案化的负光致抗蚀剂部分覆盖铝接触垫，并防止聚酰胺绝缘体层与铝接触垫之间的接触。通过形成该屏障，聚酰胺绝缘体中所含的水分不能与铝接触垫接触，因此铝接触垫的表面中不会发生腐蚀。

3. 发明授权

US06242331B1 Method to reduce device contact resistance using a hydrogen peroxide treatment 有权
标题翻译：使用过氧化氢处理降低器件接触电阻的方法
公开(公告)号：US06242331B1
公开(公告)日：2001-06-05
申请号：US09467129
申请日：1999-12-20
申请人： Cheng-Yu Chu , Te-Fu Tseng , Chai-Der Chang , Chi-Hung Liao
发明人： Cheng-Yu Chu , Te-Fu Tseng , Chai-Der Chang , Chi-Hung Liao
IPC分类号： H01L213205
CPC分类号： H01L21/76804 , H01L21/31111 , H01L21/31116 , H01L21/76814
摘要： A method for developing a semiconductor device low resistance electrical contact is described. In this process a gate oxide layer followed by a polysilicon layer is deposited on the semiconductor substrate in proximity to the device contact area. It is subsequently patterned with photoresist and etched to produce the desired gate structure. This is followed by a deposited layer of silicon dioxide or silicon nitride (SIN) which is appropriately patterned and etched to form gate isolation spacers. Then a nominal 300 Å layer of silicon nitride (SIN) is deposited followed by a layer of tetraethyl orthosilicate (TEOS) or borophosphosilicate glass (BPSG). The contact area is defined by photolithography, and the passivation layers are etched either by a dry etch such as a RIE process, or a combination of a wet BOE process followed by a dry etch, to form the metal contact holes. Prior to sputtering the contact metal, the contact area is cleaned with a 30 second dip in a BOE solution, followed by a Hydrogen Peroxide (H2O2) dip. This H2O2 cleaning step enables lower device contact resistance for the P+ contact areas.
摘要翻译：描述了一种用于开发半导体器件低电阻电接触的方法。在该过程中，在半导体衬底上沉积接近器件接触区的栅极氧化层，随后是多晶硅层。随后用光致抗蚀剂图案化并蚀刻以产生所需的栅极结构。之后是二氧化硅或氮化硅（SIN）的沉积层，其被适当地图案化和蚀刻以形成栅极隔离间隔物。然后沉积标称的300Å氮化硅层（SIN），然后沉积原硅酸四乙酯（TEOS）或硼磷硅酸盐玻璃（BPSG）。通过光刻法定义接触区域，并且通过诸如RIE工艺的干法蚀刻或者湿法BOE工艺的组合然后进行干蚀刻蚀刻钝化层，以形成金属接触孔。在溅射接触金属之前，接触面积在BOE溶液中用30秒浸渍，然后用过氧化氢（H 2 O 2）浸渍进行清洗。该H 2 O 2清洁步骤可以降低P +接触区域的器件接触电阻。

4. 发明授权

US07816169B2 Colors only process to reduce package yield loss 有权
标题翻译：颜色只能减少包装产量损失
公开(公告)号：US07816169B2
公开(公告)日：2010-10-19
申请号：US12347468
申请日：2008-12-31
申请人： Yang-Tung Fan , Chiou-Shian Peng , Cheng-Yu Chu , Shih-Jane Lin , Yen-Ming Chen , Fu-Jier Fan , Kuo-Wei Li
发明人： Yang-Tung Fan , Chiou-Shian Peng , Cheng-Yu Chu , Shih-Jane Lin , Yen-Ming Chen , Fu-Jier Fan , Kuo-Wei Li
IPC分类号： H01L21/00
CPC分类号： H01L27/14685 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/14645 , H01L31/02162 , H01L31/02327
摘要： Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film of specified index of refraction and physical properties which optimize light collection to the photodiode without additional conventional microlenses. The optically flat top surface serves to encapsulate and protect the imager from chemical and thermal cleaning treatment damage, minimizes topographical underlayer variations which would aberrate or cause reflection losses of images formed on non-planar surfaces, and, obviates residual particle inclusions induced during dicing and packaging. A CCD imager is formed by photolithographically patterning a planar-array of photodiodes on a semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, and, color filters are formed thereon. A transparent encapsulant is deposited to planarize the color filter layer and completes the solid-state color image-forming device without conventional convex microlenses.
摘要翻译：公开了一种有序的微电子制造顺序，其中滤色器通过直角沉积直接形成在CCD，CID或CMOS成像装置的光电检测器阵列上以形成凹入像素表面，并且覆盖有高透光率平面化膜指定的折射率和物理性质，其优化光收集到光电二极管而不需要额外的常规微透镜。光学平坦的顶表面用于封装和保护成像器免受化学和热清洁处理损伤，最小化形成的底层变化，其将形成在非平面表面上的图像的像差或引起反射损失，并且消除在切割期间引起的残留颗粒夹杂物，打包。通过在半导体衬底上光刻地构图光电二极管平面阵列来形成CCD成像器。光电二极管阵列设置有金属遮光罩，钝化，并且在其上形成滤色器。沉积透明密封剂以平坦化滤色器层并完成固态彩色图像形成装置，而不需要常规的凸起的微透镜。

5. 发明授权

US07485906B2 Colors only process to reduce package yield loss 有权
标题翻译：颜色只能减少包装产量损失
公开(公告)号：US07485906B2
公开(公告)日：2009-02-03
申请号：US11642225
申请日：2006-12-20
申请人： Yang-Tung Fan , Chiou-Shian Peng , Cheng-Yu Chu , Shih-Jane Lin , Yen-Ming Chen , Fu-Jier Fan , Kuo-Wei Lin
发明人： Yang-Tung Fan , Chiou-Shian Peng , Cheng-Yu Chu , Shih-Jane Lin , Yen-Ming Chen , Fu-Jier Fan , Kuo-Wei Lin
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L27/14685 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/14645 , H01L31/02162 , H01L31/02327
摘要： Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film of specified index of refraction and physical properties which optimize light collection to the photodiode without additional conventional microlenses. The optically flat top surface serves to encapsulate and protect the imager from chemical and thermal cleaning treatment damage, minimizes topographical underlayer variations which would aberrate or cause reflection losses of images formed on non-planar surfaces, and, obviates residual particle inclusions induced during dicing and packaging. A CCD imager is formed by photolithographically patterning a planar-array of photodiodes on a semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, and, color filters are formed thereon. A transparent encapsulant is deposited to planarize the color filter layer and completes the solid-state color image-forming device without conventional convex microlenses.
摘要翻译：公开了一种有序的微电子制造顺序，其中滤色器通过直角沉积直接形成在CCD，CID或CMOS成像装置的光电检测器阵列上以形成凹入像素表面，并且覆盖有高透光率平面化膜指定的折射率和物理性质，其优化光收集到光电二极管而不需要额外的常规微透镜。光学平坦的顶表面用于封装和保护成像器免受化学和热清洁处理损伤，最小化形成的底层变化，其将形成在非平面表面上的图像的像差或引起反射损失，并且消除在切割期间引起的残留颗粒夹杂物，打包。通过在半导体衬底上光刻地构图光电二极管平面阵列来形成CCD成像器。光电二极管阵列设置有金属遮光罩，钝化，并且在其上形成滤色器。沉积透明密封剂以平坦化滤色器层并完成固态彩色图像形成装置，而不需要常规的凸起的微透镜。

6. 发明申请

US20060110842A1 Method and apparatus for preventing metal/silicon spiking in MEMS devices 审中-公开
标题翻译：用于防止MEMS器件中金属/硅尖峰的方法和装置
公开(公告)号：US20060110842A1
公开(公告)日：2006-05-25
申请号：US10996234
申请日：2004-11-23
申请人： Yuh-Hwa Chang , Fei-Yun Chen , Jiann-Tyng Tzeng , Cheng-Yu Chu , Chun-Kai Peng , Chih-Chieh Yeh , Chih-Heng Po , Dah-Chuen Ho
发明人： Yuh-Hwa Chang , Fei-Yun Chen , Jiann-Tyng Tzeng , Cheng-Yu Chu , Chun-Kai Peng , Chih-Chieh Yeh , Chih-Heng Po , Dah-Chuen Ho
IPC分类号： H01L21/00 , H01L31/0203
CPC分类号： B81C1/00253 , B81C2201/0178 , B81C2201/053
摘要： The disclosure relates to a method and apparatus for preventing extrusion or spiking of a metal atom from a metallization layer to other layers of a silicon wafer. In one embodiment, the method includes forming a silicon-on-ship device with a MEMS component on the substrate. The MEMS component may include one or more metal or metallic alloys. To prevent spiking from the MEMS component, the sides thereof can be coated with one ore more spacer or barrier layers. In one embodiment, oxygen plasma and thermal oxidation methods are used to deposit spacers. In another embodiment, an oxide layer is deposited over the wafer, covering the substrate and the MEMS component. Selective etching or anisotropic etching can be used to remove the oxide layer from certain regions of the MEMS and the substrate while covering the sidewalls. An amorphous silicon layer can then be deposited to cover the MEMS device.
摘要翻译：本公开涉及一种用于防止金属原子从金属化层挤出或尖峰到硅晶片其它层的方法和装置。在一个实施例中，该方法包括在衬底上形成具有MEMS部件的在船上的硅装置。 MEMS组件可以包括一种或多种金属或金属合金。为了防止从MEMS部件尖尖，其侧面可以涂覆一个或多个间隔物或阻挡层。在一个实施例中，使用氧等离子体和热氧化方法来沉积间隔物。在另一个实施例中，氧化物层沉积在晶片上，覆盖衬底和MEMS部件。可以使用选择性蚀刻或各向异性蚀刻从覆盖侧壁的MEMS和衬底的某些区域去除氧化物层。然后可以沉积非晶硅层以覆盖MEMS器件。

7. 发明授权

US06468704B1 Method for improved photomask alignment after epitaxial process through 90° orientation change 有权
标题翻译：在通过90°取向变化的外延工艺后改进光掩模对准的方法
公开(公告)号：US06468704B1
公开(公告)日：2002-10-22
申请号：US09835027
申请日：2001-04-16
申请人： Chi-Hung Liao , Yih-Ann Lin , Sheng-Liang Pan , Cheng-Yu Chu , Kuo-Liang Lu , Yu Hsi Wang
发明人： Chi-Hung Liao , Yih-Ann Lin , Sheng-Liang Pan , Cheng-Yu Chu , Kuo-Liang Lu , Yu Hsi Wang
IPC分类号： G03F900
CPC分类号： G03F9/7046 , G03F9/7076 , H01L23/544 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要： A method for alignment to an alignment mark array within a patterned electronic material layer, formed on a substrate employed in a microelectronics fabrication, with improved registration accuracy of a subsequent step-and-repeat photomask pattern. There is first provided a substrate upon which is formed a patterned microelectronics layer containing an alignment mark array. There is then formed over the substrate and patterned layer, covering over the alignment marks, a subsequent layer or layers which may be of opaque material. In order to align properly a patterned photomask for patterning the overlying layer by means of conventional photolithography, the alignment mark array is located by first scanning with a laser light source contained within a step-and-repeat apparatus containing the patterned photomask and detecting the optical radiation signal scattered from the alignment mark array. The accuracy of location may be enhanced by rotating the orientation of the alignment mark array with respect to the direction of scanning with the laser light source by 90 degrees to render the subsequent orientation orthogonal to the first orientation, and then repeating the scanning operation. The altered nature of the back-scattered light signal from the orthogonal scanning direction provides additional information for improving the precision of location and alignment.
摘要翻译：一种用于对准图案化电子材料层内的对准标记阵列的方法，其形成在微电子制造中使用的衬底上，具有改进的后续步进重复光掩模图案的配准精度。首先设置有基板，在其上形成包含对准标记阵列的图案化微电子层。然后在衬底和图案化层上形成覆盖对准标记的后续层或层，其可以是不透明材料。为了适当地对准用于通过常规光刻法图案化上覆层的图案化光掩模，通过首先用包含在包含图案化光掩模的步进重复设备中的激光源进行扫描来定位对准标记阵列，并且检测光学从对准标记阵列散射的辐射信号。可以通过将对准标记阵列的方向相对于激光光源的扫描方向旋转90度来使得随后的方向与第一方位正交，然后重复扫描操作来提高位置的精度。来自正交扫描方向的反向散射光信号的改变性质提供了用于提高位置和对准精度的附加信息。

8. 发明授权

US06426283B1 Method for bumping and backlapping a semiconductor wafer 有权
标题翻译：用于凸起和重叠半导体晶片的方法
公开(公告)号：US06426283B1
公开(公告)日：2002-07-30
申请号：US09727832
申请日：2000-12-01
申请人： Yen-Ming Chen , Kuo-Wei Lin , Cheng-Yu Chu , Fu-Jier Fan , Yang-Tung Fan , Chiou-Shian Peng , Shih-Jane Lin
发明人： Yen-Ming Chen , Kuo-Wei Lin , Cheng-Yu Chu , Fu-Jier Fan , Yang-Tung Fan , Chiou-Shian Peng , Shih-Jane Lin
IPC分类号： H01L2144
CPC分类号： H01L24/11 , H01L2224/05001 , H01L2224/05022 , H01L2224/05023 , H01L2224/05027 , H01L2224/0508 , H01L2224/05568 , H01L2224/05572 , H01L2224/1147 , H01L2224/13099 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2224/05647 , H01L2924/00014 , H01L2224/05655 , H01L2224/05124 , H01L2224/05166 , H01L2224/05171
摘要： A method for bumping and backlapping a semiconductor wafer that has a multiplicity of solder bumps formed on an active surface of the wafer is disclosed. In the method, a preprocessed wafer that has a multiplicity of bond pads formed on a top surface is first provided, a under-bump-metallurgy (UBM) layer is then sputter deposited on top of the wafer surface, followed by the lamination of a dry film resist layer on top of the UBM layer. The dry film resist layer is then patterned with a multiplicity of openings exposing the multiplicity of bond pads, followed by the deposition of a solder material into the multiplicity of openings to form the solder bump's. A protective tape is then adhesively bonded to the top of the dry film resist layer before the wafer is positioned into a backlapping apparatus for removing of a preselected thickness from the backside of the wafer. After the completion of the backside lapping process, the protective tape and the dry film resist layer are stripped away sequentially and the solder bumps are reflown into solder balls. The present invention novel method effectively prevents any damages to. the solder balls during the backlapping process since the solder bumps are well protected by the dry film resist layer during such process.
摘要翻译：公开了一种在晶片的有效表面上形成有多个焊料凸起的半导体晶片的凸起和反覆的方法。在该方法中，首先提供具有形成在顶表面上的多个接合焊盘的预处理晶片，然后溅射沉积凸块下冶金（UBM）层，然后溅射沉积在晶片表面上，然后层压 UBM层顶部的干膜抗蚀剂层。然后将干膜抗蚀剂层用暴露多个接合焊盘的多个开口图案化，随后将焊料材料沉积到多个开口中以形成焊料凸块。然后将保护带粘合到干膜抗蚀剂层的顶部，然后将晶片定位到用于从晶片的背面除去预选厚度的重叠装置。在完成背面研磨处理之后，依次剥离保护带和干膜抗蚀剂层，并将焊料凸点重新焊接到焊球中。本发明新颖的方法有效地防止了任何损害。由于焊料凸块在这种工艺期间被干膜抗蚀剂层良好地保护，所以在重叠过程期间的焊球。

9. 发明授权

US06338976B1 Method for forming optoelectronic microelectronic fabrication with attenuated bond pad corrosion 有权
标题翻译：用于形成光电子微电子制造的方法，具有减弱的键合层腐蚀
公开(公告)号：US06338976B1
公开(公告)日：2002-01-15
申请号：US09489462
申请日：2000-01-21
申请人： Chieh-Chuan Huang , Cheng-Yu Chu , Shun-Liang Hsu
发明人： Chieh-Chuan Huang , Cheng-Yu Chu , Shun-Liang Hsu
IPC分类号： H01L2100
CPC分类号： H01L27/14683 , H01L24/02 , H01L27/14621 , H01L27/14685 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01049 , H01L2924/01051 , H01L2924/01082 , H01L2924/05042 , H01L2924/12043 , H01L2924/14 , H01L2924/15787 , H01L2924/3025 , H01L2924/00
摘要： Within a method for fabricating an microelectronic fabrication there is first provided a substrate employed within an optoelectronic microelectronic fabrication, where the substrate comprises an optoelectronic microelectronic device which is in electrical communication with a bond pad formed over the substrate. There is then processed, when fabricating the substrate to form the optoelectronic microelectronic fabrication, the substrate in the absence of optoelectronically transducable radiation, in order to attenuate corrosion of the bond pad. The method is particularly useful for forming a color filter sensor image array optoelectronic microelectronic fabrication comprising multiple photoresist based patterned colored filter layers.
摘要翻译：在用于制造微电子制造的方法中，首先提供在光电子微电子制造中使用的衬底，其中衬底包括与形成在衬底上的接合焊盘电连通的光电微电子器件。然后在制造衬底以形成光电子微电子制造时，在不存在光电转换辐射的情况下处理衬底，以便衰减焊盘的腐蚀。该方法对于形成包括多个基于光刻胶的图案化彩色滤光层的滤色器传感器图像阵列光电子微电子制造特别有用。

10. 发明授权

US06958546B2 Method for dual-layer polyimide processing on bumping technology 失效
标题翻译：碰撞技术双层聚酰亚胺加工方法
公开(公告)号：US06958546B2
公开(公告)日：2005-10-25
申请号：US10437373
申请日：2003-05-13
申请人： Fu-Jier Fan , Cheng-Yu Chu , Kuo Wei Lin , Shih-Jang Lin , Yang-Tung Fran , Chiou-Shian Peng
发明人： Fu-Jier Fan , Cheng-Yu Chu , Kuo Wei Lin , Shih-Jang Lin , Yang-Tung Fran , Chiou-Shian Peng
IPC分类号： H01L21/60 , H01L23/485 , H01L23/48
CPC分类号： H01L24/11 , H01L23/3192 , H01L24/05 , H01L24/13 , H01L2224/0401 , H01L2224/05022 , H01L2224/05572 , H01L2224/13099 , H01L2224/131 , H01L2924/0001 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/14 , H01L2924/19042 , H01L2924/00014 , H01L2224/05552
摘要： A new method and processing sequence is provided for the formation of solder bumps that are in contact with underlying aluminum contact pads. A patterned layer of negative photoresist is interposed between a patterned layer of PE Si3N4 and a patterned layer of polyamide insulator. The patterned negative photoresist partially overlays the aluminum contact pad and prevents contact between the layer of polyamide insulator and the aluminum contact pad. By forming this barrier no moisture that is contained in the polyamide insulator can come in contact with the aluminum contact pad, therefore no corrosion in the surface of the aluminum contact pad can occur.
摘要翻译：提供了一种新的方法和处理顺序，用于形成与下面的铝接触焊盘接触的焊料凸块。负型光致抗蚀剂的图案化层插入在PE 3 N 4 N 4的图案化层和聚酰胺绝缘体的图案化层之间。图案化的负光致抗蚀剂部分覆盖铝接触垫，并防止聚酰胺绝缘体层与铝接触垫之间的接触。通过形成该屏障，聚酰胺绝缘体中所含的水分不能与铝接触垫接触，因此铝接触垫的表面中不会发生腐蚀。

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