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1. 发明授权

US09930789B2 Flexible printed circuit cable with multi-layer interconnection and method of forming the same 有权
公开(公告)号：US09930789B2
公开(公告)日：2018-03-27
申请号：US12758555
申请日：2010-04-12
申请人： Chau-Chin Low
发明人： Chau-Chin Low
IPC分类号： H05K3/40 , H05K1/18
CPC分类号： H05K3/4038 , H05K1/189 , H05K3/4053 , H05K2201/0305 , Y10T29/49124
摘要： The steps of forming a multi-layer flexible printed circuit cable (flex circuit) with an electrical interconnection between independent conductive layers. In accordance with various embodiments, a partial aperture is formed in the flex circuit that extends through a first conductive layer and an intervening insulative layer to an underlying surface of a second conductive layer that spans the partial aperture. A solder material is reflowed within the partial aperture to electrically interconnect the first and second conductive layers.

2. 发明申请

US20110247862A1 Flexible Printed Circuit Cable With Multi-Layer Interconnection 有权
标题翻译：具有多层互连的柔性印刷电路电缆
公开(公告)号：US20110247862A1
公开(公告)日：2011-10-13
申请号：US12758555
申请日：2010-04-12
申请人： Chau-Chin Low
发明人： Chau-Chin Low
IPC分类号： H01R12/08 , H05K3/00
CPC分类号： H05K3/4038 , H05K1/189 , H05K3/4053 , H05K2201/0305 , Y10T29/49124
摘要： A multi-layer flexible printed circuit cable (flex circuit) with an electrical interconnection between independent conductive layers, and a method for forming the same. In accordance with various embodiments, a partial aperture is formed in the flex circuit that extends through a first conductive layer and an intervening insulative layer to an underlying surface of a second conductive layer that spans the partial aperture. A solder material is reflowed within the partial aperture to electrically interconnect the first and second conductive layers.
摘要翻译：具有独立导电层之间的电互连的多层柔性印刷电路电缆（柔性电路）及其形成方法。根据各种实施例，在柔性电路中形成部分孔径，其延伸穿过第一导电层和中间绝缘层到跨越部分孔径的第二导电层的下表面。焊料材料在部分孔径内回流以电互连第一和第二导电层。

3. 发明申请

US20050212144A1 Stacked die for inclusion in standard package technology 审中-公开
标题翻译：堆叠模具包含在标准封装技术中
公开(公告)号：US20050212144A1
公开(公告)日：2005-09-29
申请号：US10809720
申请日：2004-03-25
申请人： William Rugg , Robert Warren , Chau-Chin Low
发明人： William Rugg , Robert Warren , Chau-Chin Low
IPC分类号： H01L25/065 , H01L25/18 , H01L29/40
CPC分类号： H01L25/0657 , H01L25/0652 , H01L25/18 , H01L2224/48145 , H01L2225/06506 , H01L2225/06527 , H01L2225/06562 , H01L2924/14 , H01L2924/00012
摘要： Disclosed is a method and apparatus for stacking dice including multi-chip packaging with additional non stacked dice. The stacked dice have at least one electrical connection located on a single surface and oriented in the same direction when stacked. These dice are stacked, offset and coupled electrically. In an embodiment, the stacked dice have a buffer function, such as an SDRAM device, and are included in a multi-chip package (MCP) with an additional die including a channel function and a controller function thereon. The dice are packaged in a single package for placement on a printed circuit board for use in a storage device such as a disc drive.
摘要翻译：公开了一种用于堆叠包括多芯片封装的骰子的附加非堆叠骰子的方法和装置。堆叠的骰子具有位于单个表面上的至少一个电连接并且在堆叠时朝向相同的方向。这些骰子堆叠，偏移和电耦合。在一个实施例中，堆叠的骰子具有诸如SDRAM装置的缓冲功能，并且被包括在具有附加管芯的多芯片封装（MCP）中，该芯片包括通道功能和其上的控制器功能。骰子被封装在单个包装中以放置在印刷电路板上用于诸如盘驱动器的存储装置中。

4. 发明授权

US06849480B1 Surface mount IC stacking method and device 有权
标题翻译：表面贴装IC堆垛方法及装置
公开(公告)号：US06849480B1
公开(公告)日：2005-02-01
申请号：US09427226
申请日：1999-10-26
申请人： Chau Chin Low , Oscar Woo , Michael R. Fabry , Terry A. Junge , Tiang Fee Yin , Choon An Aw , Jonathan E. Olson
发明人： Chau Chin Low , Oscar Woo , Michael R. Fabry , Terry A. Junge , Tiang Fee Yin , Choon An Aw , Jonathan E. Olson
IPC分类号： H01L21/98 , H01L25/10 , H05K1/14 , H05K1/18 , H05K3/34 , H01L21/44 , H01L21/28 , H01L21/3205 , H01L21/48 , H01L21/50
CPC分类号： H01L25/50 , H01L25/105 , H01L2224/48091 , H01L2224/48227 , H01L2225/1005 , H01L2225/1029 , H01L2225/107 , H01L2225/1094 , H01L2924/1627 , H05K1/141 , H05K1/182 , H05K3/3442 , H05K2201/10515 , H05K2201/10689 , H05K2201/2036 , H05K2203/0173 , H01L2924/00014
摘要： Packaged surface mount (SMT) chips having matched top contacts and bottom contacts are stacked. Chip features are selected to provide the desired connectivity between chip layers with a greater ease of manufacture. In one embodiment, additional spacing and routing layers are optionally provided between layers. In another, chips are differentiated by optionally providing different conductor and/or nonvolatile cell configurations. In yet another, a minority of a substrate's contacts are configured for aligning with a dielectric region of a spacing layer or substrate to create very low capacitance signal paths between stacked chips.
摘要翻译：堆叠具有匹配的顶部触点和底部触点的封装表面贴装（SMT）芯片。选择芯片特征以在芯片层之间提供期望的连接性，并且更容易制造。在一个实施例中，可选地在层之间提供附加间隔和布线层。另一方面，通过可选地提供不同的导体和/或非易失性电池配置来区分芯片。另一方面，少数衬底的触点被配置为与间隔层或衬底的电介质区域对准，以在堆叠的芯片之间产生非常低的电容信号路径。

5. 发明授权

US5783370A Panelized printed circuit cables for high volume printed circuit cable manufacturing 失效
标题翻译：用于大容量印刷电路电缆制造的面板印刷电路电缆
公开(公告)号：US5783370A
公开(公告)日：1998-07-21
申请号：US685705
申请日：1996-07-24
申请人： John Michael Groom , Chau Chin Low
发明人： John Michael Groom , Chau Chin Low
IPC分类号： H05K1/11 , H05K3/00 , H05K3/06 , H05K3/28 , G03C5/00 , H05K3/30 , H05K7/02
CPC分类号： H05K3/0097 , H05K3/281 , H05K1/118 , H05K2203/0165 , H05K3/0052 , H05K3/064 , Y10S269/903 , Y10T29/4913 , Y10T29/49139
摘要： An assembly for high volume production of printed circuit cables consisting of: a plurality of printed circuit cables 10 cut from a polyimide base sheet 30 coated with a layer of copper and further coated with a photo-imaging material layer, wherein copper layer and photo-imaging material layer are photo-etched away at certain locations, a cover layer 34 applied on top of said printed circuit cables 10, cover layer 34 extending laterally from printed circuit cables 10, and forming tabs 16 at a plurality of locations, and a panel 20 having a plurality of apertures 15 cut therein, apertures 15 each dimensioned to receive a printed circuit cable 10 therein, and tabs 16 being connected to panel 20. A worknest 50 having certain areas 52 raised to different heights, worknest 50 adapted to be positioned under and provide support to the plurality of printed circuit cables 10. A cutting device 60 being adapted to cut tabs 16 thereby enabling printed circuit cables 10 to be removed from panel 20.
摘要翻译：一种用于大批量生产印刷电路电缆的组件，包括：从涂覆有一层铜的聚酰亚胺基片30切割并进一步涂覆有光成像材料层的多条印刷电路电缆10，其中铜层和光电导体层成像材料层在某些位置被光蚀刻掉，涂覆在所述印刷电路电缆10的顶部上的覆盖层34，从印刷电路电缆10横向延伸的覆盖层34，以及在多个位置处形成突出部16， 20具有切割在其中的多个孔15，孔15的尺寸被设计成在其中容纳印刷电路电缆10，并且突片16连接到面板20.具有某些区域52升高到不同高度的工件50，工件50适于被定位在多个印刷电路电缆10之下并提供支撑。切割装置60适于切割突舌16，从而使印刷电路电缆10能够从面板20移除。

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