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1. 发明申请

US20110082785A1 Content delivery network service provider (CDNSP)-managed content delivery network (CDN) for network service provider (NSP) 有权
标题翻译：内容传送网络服务提供商（CDNSP） - 网络服务提供商（NSP）的管理内容传送网络（CDN）
公开(公告)号：US20110082785A1
公开(公告)日：2011-04-07
申请号：US12951091
申请日：2010-11-22
申请人： Timothy N. Weller , Charles E. Leiserson
发明人： Timothy N. Weller , Charles E. Leiserson
IPC分类号： G06F15/16 , G06Q40/00
CPC分类号： H04L67/101 , G06Q40/04 , G06Q40/12 , H04L63/0272 , H04L65/4084 , H04L67/1002 , H04L67/1014
摘要： A CDN service provider shares its CDN infrastructure with a network to enable a network service provider (NSP) to offer a private-labeled network content delivery network (NCDN or “private CDN”) to participating content providers. The CDNSP preferably provides the hardware, software and services required to build, deploy, operate and manage the CDN for the NCDN customer. Thus, the NCDN customer has access to and can make available to participating content providers one or more of the content delivery services (e.g., HTTP delivery, streaming media delivery, application delivery, and the like) available from the global CDN without having to provide the large capital investment, R&D expense and labor necessary to successfully deploy and operate the network itself. Rather, the global CDN service provider simply operates the private CDN for the network as a managed service.
摘要翻译： CDN服务提供商通过网络共享其CDN基础设施，以使网络服务提供商（NSP）能够向参与的内容提供商提供私有标签的网络内容传送网络（NCDN或“私人CDN”）。 CDNSP最好提供构建，部署，操作和管理NCDN客户的CDN所需的硬件，软件和服务。因此，NCDN客户可以访问并且可以向参与的内容提供商提供从全球CDN可获得的一个或多个内容递送服务（例如，HTTP传送，流媒体传送，应用传送等），而不必提供成本部署和运营网络本身所需的大量资本投入，研发费用和劳动力。相反，全球CDN服务提供商只需将网络的专用CDN作为托管服务运行。

2. 发明申请

US20080244588A1 Computing the processor desires of jobs in an adaptively parallel scheduling environment 有权
标题翻译：在自适应并行调度环境中计算处理器对作业的期望
公开(公告)号：US20080244588A1
公开(公告)日：2008-10-02
申请号：US11729176
申请日：2007-03-28
申请人： Charles E. Leiserson , Kunal Agrawal , Wen-Jing Hsu , Yuxiong He
发明人： Charles E. Leiserson , Kunal Agrawal , Wen-Jing Hsu , Yuxiong He
IPC分类号： G06F9/46
CPC分类号： G06F9/4881 , G06F2209/483 , Y02D10/24
摘要： The present invention describes a system and method for scheduling jobs on a multiprocessor system. The invention includes schedulers for use in both work-sharing and work-stealing environments. Each system utilizes a task scheduler using historical usage information, in conjunction with a job scheduler to achieve its results. In one embodiment, the task scheduler measures the time spent on various activities, in conjunction with its previous processor allocation or previous desire, to determine an indication of its current processor desire. In another embodiment of the present invention, the task scheduler measures the resources used by the job on various activities. Based on these measurements, the task scheduler determines the efficiency of the job and an indication of its current processor desire. In another embodiment, the task scheduler measures the resources consumed executing the job and determines its efficiency and an indication of its current processor desire.
摘要翻译：本发明描述了一种用于在多处理器系统上调度作业的系统和方法。本发明包括用于工作共享和工作窃取环境中的调度器。每个系统利用使用历史使用信息的任务调度器与作业调度程序结合以实现其结果。在一个实施例中，任务调度器结合其先前的处理器分配或先前期望来测量花费在各种活动上的时间，以确定其当前处理器愿望的指示。在本发明的另一个实施例中，任务调度器测量作业在各种活动中使用的资源。基于这些测量，任务调度器确定作业的效率和其当前处理器愿望的指示。在另一个实施例中，任务调度器测量执行该作业所消耗的资源并确定其效率以及其当前处理器欲望的指示。

3. 发明授权

US07398359B1 System and method for performing memory operations in a computing system 有权
标题翻译：用于在计算系统中执行存储器操作的系统和方法
公开(公告)号：US07398359B1
公开(公告)日：2008-07-08
申请号：US10836932
申请日：2004-04-30
申请人： Steven C. Miller , Martin M. Deneroff , Curt F. Schimmel , Larry Rudolph , Charles E. Leiserson , Bradley C. Kuszmaul , Krste Asanovic
发明人： Steven C. Miller , Martin M. Deneroff , Curt F. Schimmel , Larry Rudolph , Charles E. Leiserson , Bradley C. Kuszmaul , Krste Asanovic
IPC分类号： G06F12/00
CPC分类号： G06F12/0815 , G06F9/3004 , G06F9/30087 , G06F12/0831
摘要： A processor may operate in one of a plurality of operating states. In a Normal operating state, the processor is not involved with a memory transaction. Upon receipt of a transaction instruction to access a memory location, the processor transitions to a Transaction operating state. In the Transaction operating state, the processor performs changes to a cache line and data associated with the memory location. While in the Transaction operating state, any changes to the data and the cache line is not visible to other processors in the computing system. These changes become visible upon the processor entering a Commit operating state in response to receipt of a commit instruction. After changes become visible, the processor returns to the Normal operating state. If an abort event occurs prior to receipt of the commit instruction, the processor transitions to an Abort operating state where any changes to the data and cache line are discarded.
摘要翻译：处理器可以以多个操作状态中的一个操作。在正常操作状态下，处理器不涉及存储器事务。在接收到访问存储器位置的事务指令时，处理器转换到事务操作状态。在事务操作状态下，处理器执行对高速缓存行的更改和与存储器位置相关联的数据。在事务操作状态下，数据和高速缓存行的任何更改对于计算系统中的其他处理器是不可见的。响应于接收到提交指令，处理器进入提交操作状态时，这些更改变得可见。更改变为可见后，处理器返回到正常运行状态。如果在接收提交指令之前发生中止事件，则处理器转换到中止操作状态，其中对数据和高速缓存行的任何改变被丢弃。

4. 发明授权

US5390298A Parallel computer system including arrangement for quickly draining messages from message router 失效
标题翻译：并行计算机系统，包括用于从消息路由器快速排出消息的布置
公开(公告)号：US5390298A
公开(公告)日：1995-02-14
申请号：US183217
申请日：1994-01-14
申请人： Bradley C. Kuszmaul , Charles E. Leiserson , Shaw-Wen Yang , Carl R. Feynman , W. Daniel Hillis , David Wells , Cynthia J. Spiller
发明人： Bradley C. Kuszmaul , Charles E. Leiserson , Shaw-Wen Yang , Carl R. Feynman , W. Daniel Hillis , David Wells , Cynthia J. Spiller
IPC分类号： G06F15/16 , G06F11/00 , G06F11/08 , G06F11/22 , G06F15/173 , G06F15/80 , G06F13/00
CPC分类号： G06F15/17381 , G06F11/08 , G06F11/22 , G06F11/324 , G06F15/17343 , H04L45/48 , H04L49/35 , H04L49/555 , G06F2201/88
摘要： A computer including a processor array and a routing network. Processors in the processor array generate messages for transfer to over the routing network, each message including a path identifier portion identifying a path from a source, message processor to a destination processor. The routing network comprises a plurality of interconnected router nodes, at least some of said router nodes being connected to the processors to receive messages therefrom and transmit messages thereto. Each router node operates in a plurality of modes. In a first mode, the router nodes couple received messages to a router node connected thereto in accordance with the path identifier portion to thereby transfer each respective message along the path identified in its path identifier portion. In a second mode, the router node couple received messages to predetermined ones of the router nodes or processors connected thereto, the predetermined ones of said router nodes or processors being selected to facilitate transfer of a message to a nearby processor to facilitate the rapid emptying of the routing network of messages. A control element controls the router nodes to enable them to operate in the first mode or second mode generally contemporaneously.
摘要翻译：包括处理器阵列和路由网络的计算机。处理器阵列中的处理器产生用于通过路由网络传送的消息，每个消息包括标识从源，消息处理器到目的地处理器的路径的路径标识符部分。路由网络包括多个互连的路由器节点，所述路由器节点中的至少一些连接到处理器以从其接收消息并向其发送消息。每个路由器节点以多种模式操作。在第一模式中，路由器节点根据路径标识符部分将接收到的消息耦合到与其连接的路由器节点，从而沿着其路径标识符部分中标识的路径传送每个相应的消息。在第二模式中，路由器节点将接收到的消息耦合到连接到其上的路由器节点或处理器中的预定路由器节点，所选择的所述路由器节点或处理器中的预定路由器节点或处理器便于将消息传送到附近的处理器，以便于快速排空消息的路由网络。控制元件控制路由器节点，使得它们能够在第一模式或第二模式下同时运行。

5. 发明授权

US4922246A Message merging device 失效
标题翻译：消息合并设备
公开(公告)号：US4922246A
公开(公告)日：1990-05-01
申请号：US934830
申请日：1986-11-25
申请人： Thomas H. Cormen , Charles E. Leiserson
发明人： Thomas H. Cormen , Charles E. Leiserson
IPC分类号： H04L12/56 , H04Q3/52
CPC分类号： H04Q3/521 , H04L49/254 , H04L49/25 , H04L49/40 , H04L49/557
摘要： A technique for controlling the routing of valid messages, such as digital data in bit-serial form, for example, wherein such messages are supplied to a selected number of input terminals and circuitry is provided to make such valid messages available at selected ones of a plurality of output terminals which preferably are concentrated as adjacent ones of the output terminals. An overall concentrator system can use successive stages of devices having n+m input and n+m output terminals each device employing a plurality of gates which include one or more pulldown circuits, each pulldown circuit having no more than a fixed number of transistors in series, which number is independent of n and m. Such devices can be implemented by nMOS or domino CMOS integrated circuits so that the transistors are formed in a regular pattern of relatively high density at reasonable cost.
摘要翻译：用于控制诸如比特串行形式的数字数据的有效消息的路由的技术，例如，其中这样的消息被提供给所选数量的输入终端，并且提供电路以使这样的有效消息在多个输出端子优选地被集中为相邻的输出端子。总体集中器系统可以使用具有n + m个输入端和n + m个输出端子的连续级的器件，每个器件采用包括一个或多个下拉电路的多个栅极，每个下拉电路不超过固定数量的串联晶体管，这个数字与n和m无关。这样的器件可以由nMOS或多米诺CMOS集成电路来实现，使得晶体管以合理的成本形成为具有相对高密度的规则图案。

6. 发明授权

US08725861B2 Content delivery network service provider (CDNSP)-managed content delivery network (CDN) for network service provider (NSP) 有权
标题翻译：内容传送网络服务提供商（CDNSP） - 网络服务提供商（NSP）的管理内容传送网络（CDN）
公开(公告)号：US08725861B2
公开(公告)日：2014-05-13
申请号：US13361366
申请日：2012-01-30
申请人： Timothy N. Weller , Charles E. Leiserson
发明人： Timothy N. Weller , Charles E. Leiserson
IPC分类号： G06F15/173
CPC分类号： H04L67/101 , G06Q40/04 , G06Q40/12 , H04L63/0272 , H04L65/4084 , H04L67/1002 , H04L67/1014
摘要： A CDN service provider shares its CDN infrastructure with a network to enable a network service provider (NSP) to offer a private-labeled network content delivery network (NCDN or “private CDN”) to participating content providers. The CDNSP preferably provides the hardware, software and services required to build, deploy, operate and manage the CDN for the NCDN customer. Thus, the NCDN customer has access to and can make available to participating content providers one or more of the content delivery services (e.g., HTTP delivery, streaming media delivery, application delivery, and the like) available from the global CDN without having to provide the large capital investment, R&D expense and labor necessary to successfully deploy and operate the network itself. Rather, the global CDN service provider simply operates the private CDN for the network as a managed service.
摘要翻译： CDN服务提供商通过网络共享其CDN基础设施，以使网络服务提供商（NSP）能够向参与的内容提供商提供私有标签的网络内容传送网络（NCDN或“私人CDN”）。 CDNSP最好提供构建，部署，操作和管理NCDN客户的CDN所需的硬件，软件和服务。因此，NCDN客户可以访问并且可以向参与的内容提供商提供从全球CDN可获得的一个或多个内容递送服务（例如，HTTP传送，流媒体传送，应用传送等），而不必提供成本部署和运营网络本身所需的大量资本投入，研发费用和劳动力。相反，全球CDN服务提供商只需将网络的专用CDN作为托管服务运行。

7. 发明授权

US08510741B2 Computing the processor desires of jobs in an adaptively parallel scheduling environment 有权
标题翻译：在自适应并行调度环境中计算处理器对作业的期望
公开(公告)号：US08510741B2
公开(公告)日：2013-08-13
申请号：US11729176
申请日：2007-03-28
申请人： Charles E. Leiserson , Kunal Agrawal , Wen-Jing Hsu , Yuxiong He
发明人： Charles E. Leiserson , Kunal Agrawal , Wen-Jing Hsu , Yuxiong He
IPC分类号： G06F9/46 , G06F15/173
CPC分类号： G06F9/4881 , G06F2209/483 , Y02D10/24
摘要： The present invention describes a system and method for scheduling jobs on a multiprocessor system. The invention includes schedulers for use in both work-sharing and work-stealing environments. Each system utilizes a task scheduler using historical usage information, in conjunction with a job scheduler to achieve its results. In one embodiment, the task scheduler measures the time spent on various activities, in conjunction with its previous processor allocation or previous desire, to determine an indication of its current processor desire. In another embodiment of the present invention, the task scheduler measures the resources used by the job on various activities. Based on these measurements, the task scheduler determines the efficiency of the job and an indication of its current processor desire. In another embodiment, the task scheduler measures the resources consumed executing the job and determines its efficiency and an indication of its current processor desire.
摘要翻译：本发明描述了一种用于在多处理器系统上调度作业的系统和方法。本发明包括用于工作共享和工作窃取环境中的调度器。每个系统利用使用历史使用信息的任务调度器与作业调度程序结合以实现其结果。在一个实施例中，任务调度器结合其先前的处理器分配或先前期望来测量花费在各种活动上的时间，以确定其当前处理器愿望的指示。在本发明的另一个实施例中，任务调度器测量作业在各种活动中使用的资源。基于这些测量，任务调度器确定作业的效率和其当前处理器愿望的指示。在另一个实施例中，任务调度器测量执行该作业所消耗的资源并确定其效率以及其当前处理器欲望的指示。

8. 发明授权

US07925839B1 System and method for performing memory operations in a computing system 有权
标题翻译：用于在计算系统中执行存储器操作的系统和方法
公开(公告)号：US07925839B1
公开(公告)日：2011-04-12
申请号：US12168689
申请日：2008-07-07
申请人： Steven C. Miller , Martin M. Deneroff , Curt F. Schimmel , Larry Rudolph , Charles E. Leiserson , Bradley C. Kuszmaul , Krste Asanovic
发明人： Steven C. Miller , Martin M. Deneroff , Curt F. Schimmel , Larry Rudolph , Charles E. Leiserson , Bradley C. Kuszmaul , Krste Asanovic
IPC分类号： G06F12/00
CPC分类号： G06F12/0815 , G06F9/3004 , G06F9/30087 , G06F12/0831
摘要： A processor may operate in one of a plurality of operating states. In a Normal operating state, the processor is not involved with a memory transaction. Upon receipt of a transaction instruction to access a memory location, the processor transitions to a Transaction operating state. In the Transaction operating state, the processor performs changes to a cache line and data associated with the memory location. While in the Transaction operating state, any changes to the data and the cache line is not visible to other processors in the computing system. These changes become visible upon the processor entering a Commit operating state in response to receipt of a commit instruction. After changes become visible, the processor returns to the Normal operating state. If an abort event occurs prior to receipt of the commit instruction, the processor transitions to an Abort operating state where any changes to the data and cache line are discarded.
摘要翻译：处理器可以以多个操作状态中的一个操作。在正常操作状态下，处理器不涉及存储器事务。在接收到访问存储器位置的事务指令时，处理器转换到事务操作状态。在事务操作状态中，处理器执行对高速缓存线的更改和与存储器位置相关联的数据。在事务操作状态下，数据和高速缓存行的任何更改对于计算系统中的其他处理器是不可见的。响应于接收到提交指令，处理器进入提交操作状态时，这些更改变为可见。更改变为可见后，处理器返回到正常运行状态。如果在接收提交指令之前发生中止事件，则处理器转换到中止操作状态，其中对数据和高速缓存行的任何改变被丢弃。

9. 发明授权

US5680550A Digital computer for determining a combined tag value from tag values selectively incremented and decremented reflecting the number of messages transmitted and not received 失效
标题翻译：用于从标签值确定组合标签值的数字计算机选择性地递增和减少，反映发送和未接收的消息的数量
公开(公告)号：US5680550A
公开(公告)日：1997-10-21
申请号：US388031
申请日：1995-02-13
申请人： Bradley C. Kuszmaul , Charles E. Leiserson , Shaw-Wen Yang , Carl R. Feynman , W. Daniel Hillis , David C. Douglas
发明人： Bradley C. Kuszmaul , Charles E. Leiserson , Shaw-Wen Yang , Carl R. Feynman , W. Daniel Hillis , David C. Douglas
IPC分类号： G06F15/16 , G06F11/00 , G06F11/08 , G06F11/22 , G06F15/173 , G06F15/80 , G06F13/00 , G06F3/00
CPC分类号： G06F15/17381 , G06F11/08 , G06F11/22 , G06F11/324 , G06F15/17343 , H04L45/48 , H04L49/35 , H04L49/555 , G06F2201/88
摘要： A digital computer includes a plurality of processing elements, a command processor, a diagnostic processor and a communications network. The processing elements each performs data processing and data communications operations in connection with commands. The processing elements also performing diagnostic operations in response to diagnostic operation requests and providing diagnostic results in response thereto. The command processor generates commands for the processing elements, and also performs diagnostic operations in response to diagnostic operation requests and providing diagnostic results in response thereto. The diagnostic processor generates diagnostic requests. The communication network includes three elements, including a data router, a control network and a diagnostic network. The data router is connected to the processing elements for facilitating the transfer of data among them during a data communications operation. The control network is connected to the processing elements and the command processor for transferring commands from the command processor to the processing elements. The diagnostic network connected to the processing elements, the command processor and the diagnostic processor for transferring diagnostic requests from the diagnostic processor to the processing elements and the command processor and for transferring diagnostic results from the processing elements and the command processor to the diagnostic processor.
摘要翻译：数字计算机包括多个处理元件，命令处理器，诊断处理器和通信网络。处理元件各自执行与命令相关的数据处理和数据通信操作。处理元件还响应诊断操作请求执行诊断操作，并响应于此提供诊断结果。命令处理器为处理元件生成命令，并且还响应诊断操作请求执行诊断操作并响应于此提供诊断结果。诊断处理器产生诊断请求。通信网络包括三个元件，包括数据路由器，控制网络和诊断网络。数据路由器连接到处理元件，以便在数据通信操作期间便于它们之间的数据传输。控制网络连接到处理元件和命令处理器，用于将命令从命令处理器传送到处理元件。连接到处理元件的诊断网络，命令处理器和诊断处理器，用于将诊断请求从诊断处理器传送到处理元件和命令处理器，并将诊断结果从处理元件和命令处理器传送到诊断处理器。

10. 发明授权

US5590283A Parallel computer system with physically separate tree networks for data and control messages 失效
标题翻译：并行计算机系统，具有用于数据和控制消息的物理分离的树形网络
公开(公告)号：US5590283A
公开(公告)日：1996-12-31
申请号：US380854
申请日：1995-01-27
申请人： W. Daniel Hillis , David C. Douglas , Charles E. Leiserson , Bradley C. Kuszmaul , Mahesh N. Ganmukhi , Jeffrey V. Hill , Monica C. Wong-Chan
发明人： W. Daniel Hillis , David C. Douglas , Charles E. Leiserson , Bradley C. Kuszmaul , Mahesh N. Ganmukhi , Jeffrey V. Hill , Monica C. Wong-Chan
IPC分类号： G06F15/16 , G06F11/00 , G06F11/08 , G06F11/22 , G06F15/173 , G06F15/80 , G06F15/163
CPC分类号： G06F15/17381 , G06F11/08 , G06F11/22 , G06F11/324 , G06F15/17343 , H04L45/48 , H04L49/35 , H04L49/555 , G06F2201/88
摘要： A digital computer comprises a plurality of processing elements, a communications router, and a control network. Each processing element performs data processing operations in connection with commands, at least some of the processing elements performing the data processing operations in connection with the commands in messages they receive over the control network. Each processing element also generates and receives data transfer messages, each including an address portion containing an address, for transfer to another processing element as identified by the address. At least one of the processing elements further generates the control network messages for transfer over the communications router. The communications router comprises router nodes interconnected in the form of a "fat-tree," and the control network comprises control network nodes interconnected in the form of a tree, with the processing elements being connected at the leaf nodes of the respective communications router and control network.
摘要翻译：数字计算机包括多个处理元件，通信路由器和控制网络。每个处理单元执行与命令有关的数据处理操作，至少一些处理单元通过控制网络接收的消息中的命令进行数据处理操作。每个处理元件还产生和接收数据传送消息，每个数据传送消息包括包含地址的地址部分，用于传送到由该地址识别的另一个处理元件。处理元件中的至少一个进一步生成用于通过通信路由器传送的控制网络消息。通信路由器包括以“胖树”形式互连的路由器节点，并且控制网络包括以树形式互连的控制网络节点，处理元件连接在相应通信路由器的叶节点处，控制网络。

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