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1. 发明申请

US20130163335A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME 有权
标题翻译：半导体存储器件及其操作方法
公开(公告)号：US20130163335A1
公开(公告)日：2013-06-27
申请号：US13601882
申请日：2012-08-31
申请人： Byung Ryul KIM , Duck Ju KIM
发明人： Byung Ryul KIM , Duck Ju KIM
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C16/0483 , G11C16/06 , G11C16/3436
摘要： A semiconductor memory device is operated by, inter alia, sequentially inputting program data to page buffers coupled to selected pages of at least four planes in order to program selected memory cells included in the selected pages; performing a program operation on each of the four planes; performing a program verify operation on each of the four planes; and inputting new program data for next pages to the page buffers coupled to the next pages, after determining the selected pages of at least two of the four planes have passed the program verify operation, while performing the program operations and the program verify operations on the two remaining planes.
摘要翻译：尤其是通过将程序数据顺序地输入到耦合到至少四个平面的选定页面的页缓冲器以便对包括在所选页中的所选择的存储单元进行编程来操作半导体存储器件; 在四个平面中的每一个上执行程序操作; 在四个平面中的每一个上执行程序验证操作; 并且在确定所述四个平面中的至少两个平面中的所选择的页面已经通过了程序验证操作之后，在对所述页面缓冲器执行所述程序操作和所述程序验证操作的同时，将用于下一页的新程序数据输入到耦合到所述下一页的页缓冲器剩下的两架飞机。

2. 发明授权

US08296499B2 Flash memory device and program method thereof 有权
标题翻译：闪存装置及其编程方法
公开(公告)号：US08296499B2
公开(公告)日：2012-10-23
申请号：US11950303
申请日：2007-12-04
申请人： You-Sung Kim , Byung-Ryul Kim
发明人： You-Sung Kim , Byung-Ryul Kim
IPC分类号： G06F12/00
CPC分类号： G11C16/10 , G11C2216/14
摘要： A flash memory device includes a memory cell array, a peri circuit unit, an I/O controller, and a controller. The memory cell array includes a plurality of memory cells respectively connected to a plurality of bit line pairs and a plurality word lines. The peri circuit unit is configured to program data into the memory cell array or read data stored in the memory cell array in response to a command input through a control bus. The I/O controller is configured to receive data for programming and supply the data to the peri circuit unit in response to a command provided through a data input/output (I/O) bus. The controller is configured to control the I/O controller to perform a voltage setup operation for a program while the data for program is received.
摘要翻译：闪存器件包括存储单元阵列，周边电路单元，I / O控制器和控制器。存储单元阵列包括分别连接到多个位线对和多个字线的多个存储单元。周边电路单元被配置为响应于通过控制总线输入的命令，将数据编程到存储单元阵列中或读取存储在存储单元阵列中的数据。 I / O控制器被配置为接收用于编程的数据，并响应于通过数据输入/输出（I / O）总线提供的命令将数据提供给周边电路单元。控制器被配置为控制I / O控制器，以便在接收到用于节目的数据时对节目执行电压设置操作。

3. 发明授权

US08050103B2 Method of programming nonvolatile memory device 有权
标题翻译：非易失性存储器件编程方法
公开(公告)号：US08050103B2
公开(公告)日：2011-11-01
申请号：US12361195
申请日：2009-01-28
申请人： You Sung Kim , Byung Ryul Kim
发明人： You Sung Kim , Byung Ryul Kim
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C16/0483 , G11C2211/5641
摘要： In one aspect of the method of programming a nonvolatile memory device, memory cells selected for a program are determined to belong to a first memory cell group or a second memory cell group based on address information and a program command. According to this determination, to-be-programmed data are input based on information about the number of set data bits, and programming and verification are performed.
摘要翻译：在非易失性存储器件编程方法的一个方面中，基于地址信息和程序命令，将为程序选择的存储单元确定为属于第一存储单元组或第二存储单元组。根据该判断，根据关于设定数据位数的信息来输入被编程数据，进行编程和验证。

4. 发明申请

US20100302881A1 VOLTAGE GENERATION CIRCUIT AND NONVOLATILE MEMORY DEVICE USING THE SAME 失效
标题翻译：使用该电路的电压发生电路和非易失性存储器件
公开(公告)号：US20100302881A1
公开(公告)日：2010-12-02
申请号：US12650639
申请日：2009-12-31
申请人： Byung Ryul KIM , Duck Ju Kim , You Sung Kim , Se Chun Park
发明人： Byung Ryul KIM , Duck Ju Kim , You Sung Kim , Se Chun Park
IPC分类号： G11C7/22 , H03K5/003
CPC分类号： G11C5/147 , G11C16/24 , G11C16/26 , G11C16/30
摘要： A voltage generation circuit comprises a voltage generation control unit configured to output one of a first voltage level determination signal having a fixed data value and a second voltage level determination signal having a varying data value in response to a selection signal, and a voltage generation unit configured to generate a voltage having a single pulse form or a voltage having a pulse form whose rising edge portion rises in incremental voltage steps in response to the voltage level determination signal outputted from the voltage generation control unit.
摘要翻译：电压产生电路包括：电压产生控制单元，被配置为响应于选择信号输出具有固定数据值的第一电压电平确定信号和具有变化的数据值的第二电压电平确定信号;以及电压产生单元被配置为响应于从电压产生控制单元输出的电压电平确定信号产生具有单脉冲形式的电压或具有脉冲形式的电压，其上升沿部分以增量电压步长上升。

5. 发明授权

US07715232B2 Method of determining a flag state of a non-volatile memory device 有权
标题翻译：确定非易失性存储器件的标志状态的方法
公开(公告)号：US07715232B2
公开(公告)日：2010-05-11
申请号：US12138287
申请日：2008-06-12
申请人： Byung Ryul Kim , Duck Ju Kim , You Sung Kim , Sam Kyu Won
发明人： Byung Ryul Kim , Duck Ju Kim , You Sung Kim , Sam Kyu Won
IPC分类号： G11C11/34
CPC分类号： G11C16/26
摘要： In a method of determining a flag state of a non-volatile memory device, an arithmetic logic unit of a microcontroller is employed without an additional circuit. The method includes providing n flag state information about n flag cells, resetting an entire flag state information value, sequentially reading first to n flag state information, increasing the entire flag state information value depending on a read result of the first to n flag state information, and determining a flag state by comparing the entire flag state information value and a critical value.
摘要翻译：在确定非易失性存储器件的标志状态的方法中，使用微控制器的算术逻辑单元而没有附加电路。该方法包括提供关于n个标志单元的n个标志状态信息，重置整个标志状态信息值，依次读取n个标志状态信息，根据第一至第n标志状态信息的读取结果增加整个标志状态信息值并且通过比较整个标志状态信息值和临界值来确定标志状态。

6. 发明授权

US08611155B2 Semiconductor memory device and program methods thereof 失效
标题翻译：半导体存储器件及其编程方法
公开(公告)号：US08611155B2
公开(公告)日：2013-12-17
申请号：US13341382
申请日：2011-12-30
申请人： Byung Ryul Kim , Duck Ju Kim , You Sung Kim
发明人： Byung Ryul Kim , Duck Ju Kim , You Sung Kim
IPC分类号： G11C11/34
CPC分类号： G11C16/3454 , G11C11/5628 , G11C16/10
摘要： Programming a semiconductor memory device includes: performing a program loop using a blind program operation until the selected cell threshold voltages reach a first verification level; upon detecting a cell having the threshold voltage reaching the first verification level, verifying whether a cell having the threshold voltage reached a second verification level higher than the first verification level; upon verifying a cell having the threshold voltage reaching the second verification level, continuously performing program loops on cells having the first verification level as a target level and on cells having the second verification level as a target level; and upon verifying no cell having the threshold voltage reaching the second verification level, performing a program loop on memory cells having a target level higher than the first verification level, after programming the memory cells having the first verification level as the target level.
摘要翻译：编程半导体存储器件包括：使用盲目程序操作执行程序循环，直到所选择的单元阈值电压达到第一验证水平; 一旦检测到阈值电压达到第一验证电平的单元，则验证具有阈值电压的单元是否达到高于第一验证电平的第二验证电平; 在验证具有阈值电压达到第二验证电平的单元的情况下，对具有第一验证电平的单元作为目标电平，以及具有第二验证电平的单元作为目标电平连续执行程序循环; 并且在验证没有阈值电压达到第二验证电平的单元时，在将具有第一验证电平的存储单元编程为目标电平之后，对具有高于第一验证电平的目标电平的存储单元执行程序循环。

7. 发明申请

US20130128661A1 MEMORY AND METHOD FOR OPERATING THE SAME 有权
标题翻译：存储器及其操作方法
公开(公告)号：US20130128661A1
公开(公告)日：2013-05-23
申请号：US13607900
申请日：2012-09-10
申请人： Cheul-Hee KOO , Byung-Ryul KIM , Byoung-Young KIM
发明人： Cheul-Hee KOO , Byung-Ryul KIM , Byoung-Young KIM
IPC分类号： G11C16/24 , G11C16/04
CPC分类号： G11C16/0483 , G11C16/24 , G11C16/26 , G11C16/3418
摘要： A memory includes a first memory cell, a bit line corresponding to the first memory cell, at least one second memory cell adjacent to the first memory cell, and a page buffer configured to read data of the first memory cell by precharging the bit line to a voltage level which is decided in response to data of the at least one second memory cell.
摘要翻译：存储器包括第一存储器单元，对应于第一存储器单元的位线，与第一存储器单元相邻的至少一个第二存储器单元，以及页缓冲器，配置为通过将位线预充电来读取第一存储单元的数据响应于至少一个第二存储器单元的数据而决定的电压电平。

8. 发明申请

US20120170373A1 SEMICONDUCTOR MEMORY DEVICE AND PROGRAM METHODS THEREOF 失效
标题翻译：半导体存储器件及其程序方法
公开(公告)号：US20120170373A1
公开(公告)日：2012-07-05
申请号：US13341382
申请日：2011-12-30
申请人： Byung Ryul KIM , Duck Ju KIM , You Sung KIM
发明人： Byung Ryul KIM , Duck Ju KIM , You Sung KIM
IPC分类号： G11C16/10 , G11C16/06
CPC分类号： G11C16/3454 , G11C11/5628 , G11C16/10
摘要： Programming a semiconductor memory device includes: performing a program loop using a blind program operation until the selected cell threshold voltages reach a first verification level; upon detecting a cell having the threshold voltage reaching the first verification level, verifying whether a cell having the threshold voltage reached a second verification level higher than the first verification level; upon verifying a cell having the threshold voltage reaching the second verification level, continuously performing program loops on cells having the first verification level as a target level and on cells having the second verification level as a target level; and upon verifying no cell having the threshold voltage reaching the second verification level, performing a program loop on memory cells having a target level higher than the first verification level, after programming the memory cells having the first verification level as the target level.
摘要翻译：编程半导体存储器件包括：使用盲目程序操作执行程序循环，直到所选择的单元阈值电压达到第一验证水平; 一旦检测到阈值电压达到第一验证电平的单元，则验证具有阈值电压的单元是否达到高于第一验证电平的第二验证电平; 在验证具有阈值电压达到第二验证电平的单元的情况下，对具有第一验证电平的单元作为目标电平，以及具有第二验证电平的单元作为目标电平连续执行程序循环; 并且在验证没有阈值电压达到第二验证电平的单元时，在将具有第一验证电平的存储单元编程为目标电平之后，对具有高于第一验证电平的目标电平的存储单元执行程序循环。

9. 发明授权

US08045393B2 Program method of nonvolatile memory device 失效
标题翻译：非易失性存储器件的编程方法
公开(公告)号：US08045393B2
公开(公告)日：2011-10-25
申请号：US12347583
申请日：2008-12-31
申请人： Byung Ryul Kim , Jun Seop Chung , Duck Ju Kim
发明人： Byung Ryul Kim , Jun Seop Chung , Duck Ju Kim
IPC分类号： G11C11/34 , G11C16/06
CPC分类号： G11C16/10 , G11C16/3454 , G11C2216/14
摘要： According to an aspect of a program method of a nonvolatile memory device, a first program operation for programming a first data stored in a first latch may be performed and a cache program signal may be input for inputting a second data to be programmed subsequently. When the cache program signal is input, a determination is made as to whether a first program verify operation is being performed, and if so, the verify operation is stopped, the second data is input, and the first program verify operation is restarted.
摘要翻译：根据非易失性存储装置的编程方法的一个方面，可以执行用于对存储在第一锁存器中的第一数据进行编程的第一编程操作，并且可以输入高速缓存程序信号，以输入随后要编程的第二数据。当输入高速缓存程序信号时，确定是否正在执行第一程序验证操作，如果是，则停止验证操作，输入第二数据，并重新启动第一程序验证操作。

10. 发明申请

US20090296478A1 METHOD OF PROGRAMMING NONVOLATILE MEMORY DEVICE 有权
标题翻译：编程非易失性存储器件的方法
公开(公告)号：US20090296478A1
公开(公告)日：2009-12-03
申请号：US12361195
申请日：2009-01-28
申请人： You Sung KIM , Byung Ryul Kim
发明人： You Sung KIM , Byung Ryul Kim
IPC分类号： G11C16/06
CPC分类号： G11C11/5628 , G11C16/0483 , G11C2211/5641
摘要： In one aspect of the method of programming a nonvolatile memory device, memory cells selected for a program are determined to belong to a first memory cell group or a second memory cell group based on address information and a program command. According to this determination, to-be-programmed data are input based on information about the number of set data bits, and programming and verification are performed.
摘要翻译：在非易失性存储器件编程方法的一个方面中，基于地址信息和程序命令，将为程序选择的存储单元确定为属于第一存储单元组或第二存储单元组。根据该判断，根据关于设定数据位数的信息来输入被编程数据，进行编程和验证。

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