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1. 发明授权

US06873221B2 Multilayer balun with high process tolerance 失效
标题翻译：多层平衡 - 不平衡变换器，工艺容差高
公开(公告)号：US06873221B2
公开(公告)日：2005-03-29
申请号：US10428175
申请日：2003-04-30
申请人： Rodolfo Lucero , Anthony M. Pavio
发明人： Rodolfo Lucero , Anthony M. Pavio
IPC分类号： H01P5/10
CPC分类号： H01P5/10
摘要： An exemplary system and method for minimizing degradation effects attributed to misalignment in the production of multilayer balun devices is disclosed as comprising inter alia any combination of coupled line folding that effectively provides a degenerate or otherwise reducible representation of line segment components wherein at least about half of the line segments (by, for example, linear distance or by line volume) are substantially orthogonal to the remaining half.
摘要翻译：公开了用于最小化归因于多层巴伦装置的生产中的未对准的劣化效应的示例性系统和方法，其特别包括耦合线折叠的任何组合，其有效地提供线段成分的简并或可缩减表示，其中至少约一半线段（例如，通过线性距离或线路体积）基本上与剩下的一半正交。

2. 发明授权

US06664935B1 Broad band impedance matching device with coupled transmission lines 失效
标题翻译：具有耦合传输线的宽带阻抗匹配装置
公开(公告)号：US06664935B1
公开(公告)日：2003-12-16
申请号：US10208961
申请日：2002-07-31
申请人： William John Thompson , Anthony M. Pavio , Lei Zhao , John C. Estes
发明人： William John Thompson , Anthony M. Pavio , Lei Zhao , John C. Estes
IPC分类号： H01Q150
CPC分类号： H01P5/02
摘要： A broadband impedance matching integrated circuit apparatus comprising an alternating current ground plane, a direct current ground plane positioned proximate to the alternating current ground plane, a first conductive transmission line positioned a distance from the alternating current and direct current ground planes, a dielectric material layer with a thickness positioned on the first conductive transmission line, a second conductive transmission line positioned on the dielectric material layer wherein the first and second conductive transmission lines are electrically interconnected to behave as an electromagnetically coupled tapped autotransformer.
摘要翻译：一种宽带阻抗匹配集成电路装置，包括交流接地平面，邻近交流接地平面定位的直流接地平面，距离交流和直流接地平面一定距离的第一导电传输线，电介质材料层其厚度位于第一导电传输线上，位于介电材料层上的第二导电传输线，其中第一和第二导电传输线电互连以表现为电磁耦合抽头自耦变压器。

3. 发明授权

US5773887A High frequency semiconductor component 失效
标题翻译：高频半导体元件
公开(公告)号：US5773887A
公开(公告)日：1998-06-30
申请号：US879453
申请日：1997-06-20
申请人： Anthony M. Pavio , William M. Vassar
发明人： Anthony M. Pavio , William M. Vassar
IPC分类号： H01L23/66 , H01L23/34 , H01L29/80 , H01L31/112
CPC分类号： H01L23/66 , H01L2924/0002 , H01L2924/3011
摘要： A high frequency semiconductor component (10) includes a first substrate (12) having a first surface (13) opposite a second surface (14), a first electrically conductive layer (16) supported by the first surface (13) of the first substrate (12), a second electrically conductive layer (17) supported by the second surface (14) of the first substrate (12) wherein the second electrically conductive layer (17) is electrically coupled to the first electrically conductive layer (16), a second substrate (19) having a first surface (20) and a second surface (21), a third electrically conductive layer (22) supported by the first surface (20) of the second substrate (19), and an electrically insulating layer (23) between the second and third electrically conductive layers (17, 22) wherein the second and third electrically conductive layers (17, 22) are electrically coupled together through the electrically insulating layer (23).
摘要翻译：高频半导体元件（10）包括具有与第二表面（14）相对的第一表面（13）的第一衬底（12），由第一衬底的第一表面（13）支撑的第一导电层（16）（12），由所述第一基板（12）的第二表面（14）支撑的第二导电层（17），其中所述第二导电层（17）电耦合到所述第一导电层（16），所述第二导电层具有第一表面（20）和第二表面（21）的第二基底（19），由第二基底（19）的第一表面（20）支撑的第三导电层（22）和电绝缘层第二和第三导电层（17,22）之间的第二和第三导电层（17,22），其中第二和第三导电层（17,22）通过电绝缘层（23）电耦合在一起。

4. 发明授权

US4768000A Monolithic double balanced single sideband modulator 失效
标题翻译：单片双平衡单边带调制器
公开(公告)号：US4768000A
公开(公告)日：1988-08-30
申请号：US37770
申请日：1987-04-13
申请人： Anthony M. Pavio, Jr. , Scott D. Thompson
发明人： Anthony M. Pavio, Jr. , Scott D. Thompson
IPC分类号： H03C1/52 , H03C1/60 , H03D7/14 , H03C1/42
CPC分类号： H03C1/60 , H03C2200/0058 , H03C2200/007
摘要： A modulator comprising two differential FET pairs, each pair having a current generator feeding the source electrodes thereof, a voltage source being coupled between the drain electrodes of each pair and the current generator. A low frequency signal is applied to one of the gate electrodes of each pair, ninety degrees out of phase with each other and a high frequency signal is applied to the other of the gate electrodes of each pair, ninety degrees out of phase with each other. The result is that all of the generated frequencies except one side band is cancelled at the drain electrodes of the pairs. The particular side band recovered is determined by the direction of the ninety degree phase shift between the signals.

5. 发明授权

US06433640B1 Methods and apparatus for amplifying a telecommunication signal 有权
标题翻译：用于放大电信信号的方法和装置
公开(公告)号：US06433640B1
公开(公告)日：2002-08-13
申请号：US09865266
申请日：2001-05-25
申请人： Anthony M. Pavio , Lei Zhao
发明人： Anthony M. Pavio , Lei Zhao
IPC分类号： H03F368
CPC分类号： H03F3/607
摘要： Methods and apparatus (40) of amplifying a telecommunication signal (41) are provided in accordance with the present invention. The apparatus (40) comprises an input transmission line (48) configured to receive the telecommunication signal (41), an output transmission line (50) configured to provide an amplified output of the telecommunication signal (41) and N amplifier sections (42, 44, 45, 46) having a transistor (52) connected to the input transmission line (48) and the output transmission line (50). The apparatus (40) further comprises a waveform controller (84) connected to the transistor 52 and also configured to identify a signal level of the telecommunication signal 41. The waveform controller 84 is further configured to generate an independent biasing voltage for the transistor 52 such that the at least one of the N amplifier sections (42, 44, 45, 46) is configured for active operation and non-active operation based at least in part upon an evaluation of the signal level and an output power of the apparatus is reduced without a substantial degradation in an efficiency of the apparatus.
摘要翻译：根据本发明提供放大电信信号（41）的方法和设备（40）。装置（40）包括被配置为接收电信信号（41）的输入传输线（48），被配置为提供电信信号（41）的放大输出和N个放大器部分（42）的输出传输线（50） 44,45,46）具有连接到输入传输线（48）和输出传输线（50）的晶体管（52）。装置（40）还包括连接到晶体管52的波形控制器（84），并且还被配置为识别电信信号41的信号电平。波形控制器84还被配置为产生晶体管52的独立偏置电压， N个放大器部分（42,44,45,46）中的至少一个被配置用于至少部分地基于信号电平的评估和装置的输出功率的有源操作和非有效操作而不会显着降低设备的效率。

6. 发明授权

US06377125B1 Distributed amplifier having separately biased sections 有权
标题翻译：具有单独偏置部分的分布式放大器
公开(公告)号：US06377125B1
公开(公告)日：2002-04-23
申请号：US09809377
申请日：2001-03-15
申请人： Anthony M. Pavio , Lei Zhao
发明人： Anthony M. Pavio , Lei Zhao
IPC分类号： H03F360
CPC分类号： H03F3/607
摘要： A distributed amplifier (40) and a method (100) of operating the distributed amplifier (40) are provided in accordance with the present invention. The distributed amplifier (40) comprises an input transmission line (48), an output transmission line (50) and N amplifier sections (42,44,46) having a transistor (52) connected to the input transmission line (48) and the output transmission line (50). The distributed amplifier (40) also comprises N independent biasing sources (82,84,86) configured to provide N independent biasing voltages for each transistor (52) of the N amplifier sections (42,44,46) for active operation, wherein the distributed amplifier (40) is configured such that when a first independent biasing voltage of said N independent biasing voltages is modified for a first transistor of a first section of the N amplifier sections, the first transistor of the first section of the N amplifier sections is configured for a non-active operation and an output power of the distributed amplifier (40) is reduced without a substantial degradation in an efficiency of the distributed amplifier (40).
摘要翻译：根据本发明，提供分布式放大器（40）和操作分布式放大器（40）的方法（100）。分布式放大器（40）包括输入传输线（48），输出传输线（50）和具有连接到输入传输线（48）的晶体管（52）的N个放大器部分（42,44,46）输出传输线（50）。分布式放大器（40）还包括N个独立偏置源（82,84,86），其被配置为为N个放大器部分（42,44,46）的每个晶体管（52）提供N个独立的偏置电压用于主动操作，其中分布式放大器（40）被配置为使得当对于N个放大器部分的第一部分的第一晶体管修改所述N个独立偏置电压的第一独立偏置电压时，N个放大器部分的第一部分的第一晶体管是配置为非活动操作，并且分布式放大器（40）的输出功率被降低，而分布式放大器（40）的效率没有显着劣化。

7. 发明授权

US4751744A Monolithic distributed mixer 失效
标题翻译：单片分布式混频器
公开(公告)号：US4751744A
公开(公告)日：1988-06-14
申请号：US737770
申请日：1985-05-28
申请人： Anthony M. Pavio, Jr.
发明人： Anthony M. Pavio, Jr.
IPC分类号： H03D7/00 , H03D7/12 , H03D9/06 , H04B1/28 , H04B1/26
CPC分类号： H03D9/0675 , H03D2200/0007 , H03D2200/0076 , H03D7/125
摘要： A monolithic distributed mixer includes a plurality of dual gate field effect transistors (FETs) and first and second corresponding pluralities of T shaped constant K-filters connected respectively to first and second gates of the dual gate FETs for delaying in time the LO and RF voltages applied thereto whereby the phase shift is the same at each filter and the phase difference between the LO and RF at each FET is equal. Thus, the IF energy developed at each drain is in phase. The plurality of dual gate FETs have their drains commonly connected for summing the IF outputs thereof to provide a flat response throughout the bandwidth which is limited only by the cutoff voltages of the FETs or first and second pluralities of K-filters which act as low pass filters.
摘要翻译：单片分布式混频器包括多个双栅极场效应晶体管（FET）以及分别连接到双栅极FET的第一和第二栅极的第一和第二对应多个T形常数K滤波器，用于在时间上延迟LO和RF电压每个滤波器上的相移相同，并且每个FET处的LO和RF之间的相位差相等。因此，在每个漏极处产生的IF能量是同相的。多个双栅极FET通常连接其漏极，用于对其IF输出求和，以提供整个带宽中的平坦响应，该带宽仅受限于FET或第一和第二多个K滤波器的截止电压的限制，这些K滤波器作为低通过滤器。

8. 发明授权

US06971162B2 Localized enhancement of multilayer substrate thickness for high Q RF components 失效
标题翻译：用于高Q RF组件的多层衬底厚度的局部增强
公开(公告)号：US06971162B2
公开(公告)日：2005-12-06
申请号：US10437721
申请日：2003-05-13
申请人： John C. Estes , Rodolfo Lucero , Anthony M. Pavio
发明人： John C. Estes , Rodolfo Lucero , Anthony M. Pavio
IPC分类号： H01P1/203 , H03H9/02 , H03H9/05 , H05K1/02 , H05K1/16 , H05K1/18 , H05K3/30
CPC分类号： H03H9/0557 , H01P1/203 , H03H9/02913 , H05K1/0218 , H05K1/0237 , H05K1/0243 , H05K1/16 , H05K1/181 , H05K1/185 , H05K2201/09618 , H05K2201/09972 , H05K2201/10371 , Y10T29/4913 , Y10T29/49137 , Y10T29/49146 , Y10T29/49165 , Y10T29/53174 , Y10T29/53178
摘要： An exemplary system and method for providing differential adjustment of the height of a multilayer substrate in localized areas for improved Q-factor performance of RF devices is disclosed as comprising inter alia: a multilayer substrate (200); an RF component (210) embedded in the substrate (200); a surface mounted component (220); and an RF shield (260) disposed next to the surface mounted component (220), wherein the height of the shield (260) does not extend substantially beyond the height of the surface mounted component (220). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize Q, RF performance and/or material characteristics. Exemplary embodiments of the present invention representatively provide for high-performance, high-quality RF devices that may be readily incorporated with existing technologies for the improvement of frequency response, device package form factors, weights and/or other manufacturing, device or material performance metrics.
摘要翻译：公开了一种用于在局部区域中对多层基板的高度进行差分调整以提高RF器件的Q因子性能的示例性系统和方法，其特别包括：多层衬底（200）; 嵌入在所述基板（200）中的RF部件（210）; 表面安装部件（220）; 以及靠近所述表面安装部件（220）设置的RF屏蔽件（260），其中所述屏蔽件（260）的高度基本上不超过所述表面安装部件（220）的高度。公开的特征和规范可以被不同地控制，配置，适配或以其他方式任意地修改，以进一步改善或者优化Q，RF性能和/或材料特性。本发明的示例性实施例代表性地提供了可以容易地与用于改进频率响应，设备包装形状因子，重量和/或其他制造，设备或材料性能度量的现有技术结合的高性能，高质量的RF设备。

9. 发明授权

US06803836B2 Multilayer ceramic package transmission line probe 失效
标题翻译：多层陶瓷封装传输线探头
公开(公告)号：US06803836B2
公开(公告)日：2004-10-12
申请号：US10256304
申请日：2002-09-27
申请人： John C. Estes , Rudolfo Lucero , Anthony M. Pavio
发明人： John C. Estes , Rudolfo Lucero , Anthony M. Pavio
IPC分类号： H01P502
CPC分类号： B32B18/00 , C04B2237/32 , C04B2237/592 , C04B2237/595 , C04B2237/62 , C04B2237/68 , C04B2237/704 , H01P3/088 , Y10T428/24917 , Y10T428/24926
摘要： A multilayer ceramic structure (30) includes a first ceramic layer (32), a second ceramic layer (34) adjacent to the first ceramic layer, and a transmission line (38) formed between the first and second ceramic layers. The transmission line includes first and second portions (44, 46) having a first width, third and fourth portions (47, 48) formed between the first and second portions and having a second width that is narrower than the first width, and a fifth portion (49) formed between the third and fourth portions. A probe (40), comprising a conductively filled via, is attached at one end to the fifth portion, the probe passing through the second ceramic layer for providing a test point (42). The structure compensates for return loss induced by the probe.
摘要翻译：多层陶瓷结构（30）包括第一陶瓷层（32），与第一陶瓷层相邻的第二陶瓷层（34）和形成在第一和第二陶瓷层之间的传输线（38）。传输线包括具有第一宽度的第一和第二部分（44,46），形成在第一和第二部分之间的第三和第四部分（47,48）具有比第一宽度窄的第二宽度，以及第五部分形成在第三和第四部分之间的部分（49）。包括导电填充通孔的探针（40）在一端连接到第五部分，探针通过第二陶瓷层以提供测试点（42）。该结构补偿了探头引起的回波损耗。

10. 发明授权

US5025232A Monolithic multilayer planar transmission line 失效
标题翻译：单片多层平面传输线
公开(公告)号：US5025232A
公开(公告)日：1991-06-18
申请号：US429679
申请日：1989-10-31
申请人： Anthony M. Pavio
发明人： Anthony M. Pavio
IPC分类号： H01P5/10
CPC分类号： H01P5/10
摘要： A multilayer planar transmission line (10) can be fabricated as a monolithic structure with series/shunt-connected components for integration in an MMIC device. The multilayer planar transmission line (10) includes a first transmission line structure (TL1) formed by a top conductor (14) and an interlevel conductor (16) separated by an interlevel dielectric (18). This structure is formed on one planar surface of a substrate (12), and a ground plane reference (20) is formed on the opposing surface, yielding second and third transmission line structures (TL2, TL3) formed by the groundplane reference and, respectively, the interlevel conductor (16) and the top conductor (14). The interlevel dielectric layer (18) is significantly thinner than the substrate dielectric, so that the first transmission line (TL1) is tightly coupled, and substantially unaffected by parasitics between the bottom of the interlevel conductor (16) and the groundplane reference (20). In an exemplary embodiment, a monolithic multilayer planar transmission line network is configured as a Marchand-type balun (30). A top conductor (34) is configured in two continuous sections (Z1 and Z2), and an interlevel conductor (36) is configured in two separate sections (ZS1) and ZS2), separated by a balance point gap (BP). This configuration forms series transmission lines (Z1 and Z2) shunt-connected to a second pair of series transmission lines (ZS1 and ZS2). With the appropriate configuration of the top and interlevel conductors (34, 36), impedance values can be established to yield a balanced signal output at the balance point gap (BP).
摘要翻译：多层平面传输线（10）可以制造为具有用于集成在MMIC器件中的串联/分流连接部件的单片结构。多层平面传输线（10）包括由顶部导体（14）和由层间电介质（18）分开的层间导体（16）形成的第一传输线结构（TL1）。该结构形成在基板（12）的一个平面上，并且在相对表面上形成接地平面基准（20），产生由接地面基准形成的第二和第三传输线结构（TL2，TL3），层间导体（16）和顶部导体（14）。层间电介质层（18）比衬底电介质薄得多，使得第一传输线（TL1）紧密耦合，并且基本上不受层间导体（16）的底部与接地面参考（20）之间的寄生效应的影响，。在示例性实施例中，单片多层平面传输线网络被配置为Marchand型平衡 - 不平衡变换器（30）。顶部导体（34）配置在两个连续的部分（Z1和Z2）中，并且层间导体（36）配置在由平衡点间隙（BP）分开的两个分开的部分（ZS1）和ZS2中。该配置形成分流连接到第二对串联传输线（ZS1和ZS2）的串联传输线（Z1和Z2）。通过顶部和层间导体（34,36）的适当配置，可建立阻抗值以产生在平衡点间隙（BP）处的平衡信号输出。

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