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    • 1. 发明授权
    • Programmable memory matrix employing voltage-variable resistors
    • 采用电压可变电阻的可编程存储矩阵
    • US5070383A
    • 1991-12-03
    • US295274
    • 1989-01-10
    • Alexander B. SinarLevy GerzbergYosef Y. ShachamIlan A. BlechEric R. Sirkin
    • Alexander B. SinarLevy GerzbergYosef Y. ShachamIlan A. BlechEric R. Sirkin
    • H01L23/525H01L27/102
    • H01L27/1021H01L23/5252H01L2924/0002Y10S257/91Y10S257/926
    • A memory matrix comprises a plurality of word lines, a plurality of bit lines, and a stacked diode and voltage-variable resistor structure interconnecting bit lines to word lines. The stacked diode and voltage-variable resistor structure includes a doped region in a semiconductor substrate defining a work line, a doped polycrystalline silicon layer over said word line and forming a p-n junction therewith, and an amorphized region in the doped polycrystalline silicon layer having increased resistance over the non-amorphized portion of the doped polycrystalline silicon layer. A contact is made to the amorphized polycrystalline silicon material which preferably includes a titanium-tungsten barrier layer and an aluminum layer over the barrier layer. To improve the breakdown voltage of the diode structure, a region of opposite conductivity type is formed in the word line under the doped polycrystalline silicon layer either by out-diffusion of dopants from the polycrystalline silicon layer or by the implantation of dopant ions through the polycrystalline silicon layer into the word line.
    • 存储矩阵包括多个字线,多个位线以及将位线互连到字线的堆叠二极管和电压可变电阻器结构。 层叠二极管和可变电压结构包括在限定工作线的半导体衬底中的掺杂区域,在所述字线上方形成掺杂多晶硅层并与其形成pn结,掺杂多晶硅层中的非晶化区域具有增加的 掺杂多晶硅层非非晶化部分的电阻。 对非晶化多晶硅材料进行接触,其优选在阻挡层上包括钛 - 钨阻挡层和铝层。 为了提高二极管结构的击穿电压,在掺杂多晶硅层下面的字线中形成相反导电类型的区域,通过掺杂剂从多晶硅层的扩散或通过掺杂剂离子注入多晶硅 硅层进入字线。