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1. 发明授权

US5240497A Alkaline free electroless deposition 失效
标题翻译：无碱无电沉积
公开(公告)号：US5240497A
公开(公告)日：1993-08-31
申请号：US773188
申请日：1991-10-08
申请人： Yosef Y. Shacham , Roman Bielski
发明人： Yosef Y. Shacham , Roman Bielski
IPC分类号： C23C18/34 , C23C18/40 , H01L21/288 , H05K3/24
CPC分类号： C23C18/34 , C23C18/40 , H01L21/288 , H05K3/244
摘要： Alkali-free layers of pure metals such as copper, nickel and cobalt were deposited on noble metal or noble metal sensitized substrates by electroless deposition using pure quaternary ammonium hydroxides or quaternary phosphonium hydroxides to generate the hydroxyl ion (OH.sup.-) needed to produce electrons for the metal reduction.Using the new alkaline-free electroless compositions, uniform, continuous and reproducible metal layers were selectively deposited with excellent electrical properties. With the improved compositions and process, nanosize copper lines having widths in the range of 100 to 500 nm were prepared.
摘要翻译：纯金属如铜，镍和钴的无碱层通过无电沉积沉积在贵金属或贵金属敏化基底上，使用纯的季铵氢氧化物或季铵氢氧化物以产生产生电子所需的羟基离子（OH-）金属还原。使用新的无碱化学镀组合物，选择性地沉积均匀，连续和可再现的金属层，具有优异的电性能。通过改进的组合物和方法，制备宽度在100至500nm范围内的纳米尺寸铜线。

2. 发明授权

US4882611A Double layer voltage-programmable device and method of manufacturing same 失效
标题翻译：双层电压可编程器件及其制造方法
公开(公告)号：US4882611A
公开(公告)日：1989-11-21
申请号：US222653
申请日：1988-07-21
申请人： Ilan A. Blech , Levy Gerzberg , Yosef Y. Shacham , Alexander Sinar , Eric R. Sirkin
发明人： Ilan A. Blech , Levy Gerzberg , Yosef Y. Shacham , Alexander Sinar , Eric R. Sirkin
IPC分类号： H01L45/00
CPC分类号： H01L45/165 , H01L45/10 , H01L45/1233 , H01L45/148
摘要： A voltage-programmable device in which the programming voltage V.sub.p and the "off" resistance R.sub.i are separately controlled. The device includes a body of semiconductor material having a doped region therein, and an amorphized layer in the doped region and abutting a surface, and a surface layer in the amorphized layer with the surface layer having a resistivity higher than the resistivity of the amorphized layer prior ot programming of the device. The surface layer has a miniscule thickness (on the order of 50-150 Angstroms) and does not affect the programming of the device. Moreover, the final resistance of the programmed device is not significantly affected by the presence of the first layer. The amorphized layer is formed by ion implantation, and the or by oxygen plasma treatment.
摘要翻译：编程电压Vp和“截止”电阻Ri分别被控制的电压可编程装置。该器件包括其中具有掺杂区域的半导体材料体和掺杂区域中的非晶化层并邻接表面，并且非晶化层中的表面层具有比非晶化层的电阻率高的表面层以前的设备编程。表面层具有微小的厚度（大约50-150埃），并且不影响器件的编程。此外，编程设备的最终电阻不受第一层的存在的显着影响。非晶化层通过离子注入形成，或通过氧等离子体处理形成。

3. 发明授权

US4845045A Method of fabricating electrically-programmable element in a semiconductor integrated circuit using a doped plug to extend the depth of a doped region 失效
标题翻译：使用掺杂的插塞在半导体集成电路中制造电可编程元件以延长掺杂区域的深度的方法
公开(公告)号：US4845045A
公开(公告)日：1989-07-04
申请号：US245115
申请日：1988-09-15
申请人： Yosef Y. Shacham , Alexander B. Sinar , Eric R. Sirkin , Ilan A. Blech
发明人： Yosef Y. Shacham , Alexander B. Sinar , Eric R. Sirkin , Ilan A. Blech
IPC分类号： H01L21/761 , H01L21/768
CPC分类号： H01L21/761 , H01L21/76886
摘要： An electrically programmable element is fabricated in a P-N junction isolated region of a semiconductor body by first extending the depth of the region in the body by introducing dopants through the region into the body by ion implantation or by diffusion and drive-in, and thereafter forming an amorphotized layer in the first region overlying the extended portion. The increased depth of the first region provided by the second region prevents damage to the P-N junction between the semiconductor body and the first region during formation of the amorphotized layer.
摘要翻译：在半导体主体的PN结隔离区域中制造电可编程元件，首先通过离子注入或通过扩散和驱入将该区域中的掺杂剂引入到体内，然后形成在第一区域中覆盖延伸部分的放射体层。由第二区域提供的第一区域的增加的深度防止在形成放射敏化层期间损坏半导体本体与第一区域之间的P-N结。

4. 发明授权

US5070383A Programmable memory matrix employing voltage-variable resistors 失效
标题翻译：采用电压可变电阻的可编程存储矩阵
公开(公告)号：US5070383A
公开(公告)日：1991-12-03
申请号：US295274
申请日：1989-01-10
申请人： Alexander B. Sinar , Levy Gerzberg , Yosef Y. Shacham , Ilan A. Blech , Eric R. Sirkin
发明人： Alexander B. Sinar , Levy Gerzberg , Yosef Y. Shacham , Ilan A. Blech , Eric R. Sirkin
IPC分类号： H01L23/525 , H01L27/102
CPC分类号： H01L27/1021 , H01L23/5252 , H01L2924/0002 , Y10S257/91 , Y10S257/926
摘要： A memory matrix comprises a plurality of word lines, a plurality of bit lines, and a stacked diode and voltage-variable resistor structure interconnecting bit lines to word lines. The stacked diode and voltage-variable resistor structure includes a doped region in a semiconductor substrate defining a work line, a doped polycrystalline silicon layer over said word line and forming a p-n junction therewith, and an amorphized region in the doped polycrystalline silicon layer having increased resistance over the non-amorphized portion of the doped polycrystalline silicon layer. A contact is made to the amorphized polycrystalline silicon material which preferably includes a titanium-tungsten barrier layer and an aluminum layer over the barrier layer. To improve the breakdown voltage of the diode structure, a region of opposite conductivity type is formed in the word line under the doped polycrystalline silicon layer either by out-diffusion of dopants from the polycrystalline silicon layer or by the implantation of dopant ions through the polycrystalline silicon layer into the word line.
摘要翻译：存储矩阵包括多个字线，多个位线以及将位线互连到字线的堆叠二极管和电压可变电阻器结构。层叠二极管和可变电压结构包括在限定工作线的半导体衬底中的掺杂区域，在所述字线上方形成掺杂多晶硅层并与其形成pn结，掺杂多晶硅层中的非晶化区域具有增加的掺杂多晶硅层非非晶化部分的电阻。对非晶化多晶硅材料进行接触，其优选在阻挡层上包括钛 - 钨阻挡层和铝层。为了提高二极管结构的击穿电压，在掺杂多晶硅层下面的字线中形成相反导电类型的区域，通过掺杂剂从多晶硅层的扩散或通过掺杂剂离子注入多晶硅硅层进入字线。

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