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1. 发明授权

US5708300A Semiconductor device having contoured package body profile 失效
标题翻译：半导体器件具有轮廓的封装体轮廓
公开(公告)号：US5708300A
公开(公告)日：1998-01-13
申请号：US523664
申请日：1995-09-05
申请人： Alan H. Woosley , Everitt W. Mace
发明人： Alan H. Woosley , Everitt W. Mace
IPC分类号： H01L21/60 , H01L21/56 , H01L23/28 , H01L23/31 , H01L23/04
CPC分类号： H01L24/85 , H01L23/3121 , H01L2224/16225 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/85 , H01L24/48 , H01L2924/00014 , H01L2924/01004 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/014 , H01L2924/14 , H01L2924/1433 , H01L2924/181 , H01L2924/1815
摘要： An overmolded semiconductor device (30, 50) has a contoured package body profile instead of a conventional flat package body surface for uniform filling during the molding process. A cross-section of the semiconductor device reveals a substantially uniform thickness of plastic (36 and 38) covering the carrier substrate (14) and overmolding the semiconductor die (12). Alternatively, a thicker layer of plastic (58) overmolds the semiconductor die (12') than the layer of plastic (56) covering the carrier substrate (14'). The contoured package body profile is designed to allow a uniform flow front progression of molding compound during the molding process to eliminate voids in the package body by providing the same resistive pressure to the molding compound flow front during filling.
摘要翻译：包覆成型的半导体器件（30,50）具有轮廓的封装主体轮廓，而不是传统的扁平封装体表面，用于在模制过程中均匀填充。半导体器件的横截面显示覆盖载体衬底（14）并包覆模制半导体管芯（12）的塑料（36和38）的基本均匀的厚度。或者，与覆盖载体基板（14'）的塑料层（56）相比，较厚的塑料层（58）包覆模制半导体管芯（12'）。轮廓包装体轮廓被设计成允许在模制过程中模制化合物的均匀流动前进，以通过在填充期间向模塑料流动前端提供相同的阻力压力来消除包装体中的空隙。

2. 发明授权

US5656549A Method of packaging a semiconductor device 失效
标题翻译：封装半导体器件的方法
公开(公告)号：US5656549A
公开(公告)日：1997-08-12
申请号：US699288
申请日：1996-08-19
申请人： Alan H. Woosley , Harold A. Downey, Jr. , Everitt W. Mace
发明人： Alan H. Woosley , Harold A. Downey, Jr. , Everitt W. Mace
IPC分类号： B29C45/14 , H01L21/00 , H01L21/56 , H01L21/60
CPC分类号： B29C45/14655 , H01L21/565 , B29C2045/14098 , H01L2224/48091
摘要： A method of packaging a semiconductor device includes providing a chase (11) with a cavity (12). The cavity (12) has a cavity sidewall (13). A substrate (19) is provided having a substrate sidewall (20) wherein the substrate (19) is positioned in the cavity (12). A space or gap (21) is formed between the substrate sidewall (20) and the cavity sidewall (13). To insulate the gap (21) from mold compound (27), a barrier layer (22) is placed adjacent to the chase (11) and adjacent to the substrate (19) wherein the barrier layer (22) overlays a portion of the space or gap (21). Mold compound (27) is injected over the barrier layer (22), over the portion of the space or gap (21), and toward the substrate (19). The barrier layer (22) is used to prohibit the mold compound (27) from contacting the substrate sidewall (20) and the cavity sidewall (13) when the substrate (19) is being encapsulated.
摘要翻译：封装半导体器件的方法包括提供具有空腔（12）的追逐（11）。空腔（12）具有空腔侧壁（13）。提供了具有衬底侧壁（20）的衬底（19），其中衬底（19）位于空腔（12）中。在基板侧壁（20）和空腔侧壁（13）之间形成空间或间隙（21）。为了将间隙（21）与模制化合物（27）隔离，阻挡层（22）被放置成与追逐件（11）相邻并且靠近基板（19），其中阻挡层（22）覆盖空间的一部分或间隙（21）。模塑料（27）在空隙或间隙（21）的一部分上并朝向基板（19）的上方在阻挡层（22）上注入。当封装衬底（19）时，阻挡层（22）用于禁止模制化合物（27）接触衬底侧壁（20）和空腔侧壁（13）。

3. 发明授权

US06998952B2 Inductive device including bond wires 有权
标题翻译：感应装置包括接合线
公开(公告)号：US06998952B2
公开(公告)日：2006-02-14
申请号：US10729531
申请日：2003-12-05
申请人： Yaping Zhou , Susan H. Downey , Sheila F. Chopin , Tu-Anh Tran , Alan H. Woosley , Peter R. Harper , Perry H. Pelley, III
发明人： Yaping Zhou , Susan H. Downey , Sheila F. Chopin , Tu-Anh Tran , Alan H. Woosley , Peter R. Harper , Perry H. Pelley, III
IPC分类号： H01F27/06 , H01F5/00
CPC分类号： H01F17/0033 , H01F41/046 , H01L23/5227 , H01L23/645 , H01L24/45 , H01L24/48 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/4813 , H01L2924/00014 , H01L2924/01079 , H01L2924/09701 , H01L2924/14 , H01L2924/30107 , H01L2924/3025 , Y10T29/4902 , H01L2224/45015 , H01L2924/207
摘要： An inductive device (105) is formed above a substrate (225) having a conductive coil formed around a core (109). The coil comprises segments formed from a first plurality of bond wires (113) and a second plurality of bond wires (111). The first plurality of bond wires (113) extends between the core (109) and the substrate (225). Each of the first plurality of bond wires is coupled to two of a plurality of wire bond pads (117, 116). The second plurality of bond wires (111) extends over the core (109) and is coupled between two of the plurality of wire bond pads (117, 119). A shield (141) includes a portion that is positioned between the core (109) and the substrate (225).
摘要翻译：在具有围绕芯（109）形成的导电线圈的衬底（225）上方形成感应器件（105）。线圈包括由第一多个接合线（113）和第二多个接合线（111）形成的线段。第一多个接合线（113）在芯（109）和衬底（225）之间延伸。第一多个接合线中的每一个耦合到多个引线接合焊盘（117,116）中的两个。所述第二多个接合线（111）在所述芯（109）上方延伸并耦合在所述多个引线接合焊盘（117,119）中的两个之间。屏蔽（141）包括位于芯（109）和衬底（225）之间的部分。

4. 发明授权

US5517056A Molded carrier ring leadframe having a particular resin injecting area design for gate removal and semiconductor device employing the same 失效
标题翻译：具有用于栅极去除的特定树脂注入区域设计的模制载体环引线框架和使用其的半导体器件
公开(公告)号：US5517056A
公开(公告)日：1996-05-14
申请号：US129503
申请日：1993-09-30
申请人： Charles G. Bigler , Alan H. Woosley , Michael B. McShane
发明人： Charles G. Bigler , Alan H. Woosley , Michael B. McShane
IPC分类号： H01L23/28 , H01L21/56 , H01L23/495 , H01L23/50 , H01L23/02
CPC分类号： H01L21/565 , H01L23/49541 , H01L2224/49171 , H01L24/49 , H01L2924/00014 , H01L2924/01039 , H01L2924/01078
摘要： A leadframe (30) having a novel resin injecting area (44) is disclosed to facilitate and control the removal of a molded gate (18) prior to excising a semiconductor device(70) from a carrier ring (14). The carrier ring has a corner which is on a diagonal with a corner of the package body (12) to form the resin injecting area. The resin injecting area of the leadframe has a hole (48) and an extension bar (50) extending from the hole to connect to a tie bar (36), which supports a die pad (32), inside the package body. The hole in the leadframe is designed for retaining a molded gate. The extension bar is designed to make the removal of a portion of a molded gate easier and more controllable. The semiconductor device can be shipped in the carrier ring with a portion of the molded gate already removed.
摘要翻译：公开了一种具有新型树脂注入区域（44）的引线框架（30），用于在将半导体器件（70）从载体环（14）切除之前有助于和控制模制浇口（18）的移除。承载环具有与包装体（12）的角部对角地形成树脂注入区域的角部。引线框架的树脂注入区域具有从孔延伸的孔（48）和延伸杆（50），以连接到在包装体内部支撑管芯焊盘（32）的连接杆（36）。引线框中的孔用于保持模制浇口。延伸杆被设计成使得模制门的一部分的移除更容易和更可控。半导体器件可以在已经去除模制栅极的一部分的载体环中运输。

5. 发明授权

US5344600A Method for encapsulating semiconductor devices with package bodies 失效
标题翻译：用封装体封装半导体器件的方法
公开(公告)号：US5344600A
公开(公告)日：1994-09-06
申请号：US931459
申请日：1992-08-21
申请人： Michael B. McShane , Alan H. Woosley , Francis Primeaux
发明人： Michael B. McShane , Alan H. Woosley , Francis Primeaux
IPC分类号： B29C45/14 , H01L21/56 , B29C45/10
CPC分类号： H01L21/565 , B29C45/14655 , H01L2224/48091 , H01L2224/48247
摘要： A method of encapsulating a semiconductor device permits use of the same mold for various package types. In one form, a mold (34 and 36) has a first cavity (50) in which a first insert (52 and 53) is positioned, the first insert defining a length and a width of a package body which is to be formed in the mold. The first insert in the first cavity also defines a second cavity (54) in which a second insert (56 and 57) is positioned, the second insert defining a thickness of the package body. Plastic is inserted into the mold to form the package body. To form other package types, one or more inserts are replaced instead of using a different mold. In another embodiment, the inserts are adjustable. For example, rather than having to change inserts to form a package with a different thickness, the inserts are adjusted by, for instance, a screw mechanism (66) within the mold or by the addition or removal of shims (60).
摘要翻译：封装半导体器件的方法允许使用相同的模具用于各种封装类型。在一种形式中，模具（34和36）具有第一空腔（50），第一插入件（52和53）定位在其中，第一插入件限定要形成的封装主体的长度和宽度模具。在第一腔中的第一插入件还限定第二腔（54），第二腔（54）定位有第二插入件（56和57），第二插入件限定包装体的厚度。将塑料插入模具中以形成包装体。为了形成其他包装类型，替换一个或多个插入件而不是使用不同的模具。在另一个实施例中，插入件是可调节的。例如，不需要改变插入件以形成具有不同厚度的包装件，而是通过例如模具内的螺钉机构（66）或通过添加或移除垫片（60）来调节插入件。

6. 发明授权

US5233222A Semiconductor device having window-frame flag with tapered edge in opening 失效
标题翻译：半导体器件具有开口处具有锥形边缘的窗框标志
公开(公告)号：US5233222A
公开(公告)日：1993-08-03
申请号：US919442
申请日：1992-07-27
申请人： Frank Djennas , Alan H. Woosley
发明人： Frank Djennas , Alan H. Woosley
IPC分类号： H01L23/28 , H01L21/56 , H01L23/495 , H01L23/50
CPC分类号： H01L21/565 , H01L23/49503 , H01L2224/48091 , H01L2224/48247 , H01L24/48 , H01L2924/00014 , H01L2924/14 , H01L2924/181
摘要： A semiconductor device (30) utilizes a lead frame (32) having a window-frame flag (36). An opening (44) within the flag creates an interior edge (46) which is tapered, preferably to an angle .phi. that is between 55.degree. and 65.degree.. The tapered interior edge reduces boundary-layer separation of a resin molding compound during formation of a resin package body (42). Thus, voids in the resin packaging material near the interior edge of the flag are less likely to be formed.

7. 发明授权

US07105383B2 Packaged semiconductor with coated leads and method therefore 有权
标题翻译：具有涂层引线的封装半导体及方法
公开(公告)号：US07105383B2
公开(公告)日：2006-09-12
申请号：US10230743
申请日：2002-08-29
申请人： Nhat D. Vo , Alan H. Woosley
发明人： Nhat D. Vo , Alan H. Woosley
IPC分类号： H01L21/50
CPC分类号： H01L23/49586 , H01L24/48 , H01L2224/05599 , H01L2224/45099 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/85399 , H01L2924/00014 , H01L2924/01046 , H01L2924/01079 , H01L2924/181 , H05K3/3426 , Y02P70/613 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor die is housed in a package body. Leads, which are electrically coupled to the semiconductor die, extend from the package body and are for connecting to a printed circuit board or other device. The leads are coated with a material that protects the leads from oxidation. The coating is compatible with solder techniques that are commonly used to attach packaged semiconductors to a printed circuit board. In some examples, the coating is removable, after drying, at temperatures below one hundred eighty degrees Celsius. This allows for solder processes, which are typically at least 180° C., to remove the coating thereby exposing the leads, which has been protected from oxidation, so that it can be soldered to the printed circuit board. In some examples, the coating material includes an organic material. In some examples, the coating material is an organic solderability preservative (OSP).
摘要翻译：半导体管芯被容纳在封装体中。电耦合到半导体管芯的引线从封装体延伸并且用于连接到印刷电路板或其它器件。引线涂有保护引线免受氧化的材料。该涂层与通常用于将封装半导体连接到印刷电路板的焊接技术相容。在一些实例中，涂层在干燥后可在不到108摄氏度的温度下去除。这允许通常至少180℃的焊接工艺去除涂层，从而暴露已被防止氧化的引线，使得其可以焊接到印刷电路板。在一些实例中，涂层材料包括有机材料。在一些实例中，涂层材料是有机可焊性防腐剂（OSP）。

8. 发明授权

US4434360A Optical sensing device for reading bar code or the like 失效
标题翻译：用于读取条形码的光学感测装置等
公开(公告)号：US4434360A
公开(公告)日：1984-02-28
申请号：US532815
申请日：1983-09-15
申请人： Alan H. Woosley , Billy R. Masten
发明人： Alan H. Woosley , Billy R. Masten
IPC分类号： G06K7/10
CPC分类号： G06K7/10762
摘要： A single optical fiber is placed at or near the nadir of the curvilinear section of the optical surface of a light emitting device. The LED element illuminates the bar code characters on the surface of the object being read, and the reflected light is transmitted up the optical fiber to a sensory means or the like. The elements are encased in an optical plastic medium for strength and durability, and resistance to environmental extremes.
摘要翻译：单个光纤放置在发光器件的光学表面的曲线部分的最低点处或附近。 LED元件照亮正在读取的物体的表面上的条形码字符，并且将反射光向上传输到感光装置等。元件被封装在光学塑料介质中，用于强度和耐久性，并且耐环境极限。

9. 发明授权

US07015585B2 Packaged integrated circuit having wire bonds and method therefor 有权
标题翻译：具有引线键合的封装集成电路及其方法
公开(公告)号：US07015585B2
公开(公告)日：2006-03-21
申请号：US10323296
申请日：2002-12-18
申请人： Susan H. Downey , Sheila F. Chopin , Peter R. Harper , Sohrab Safai , Tu-Anh Tran , Alan H. Woosley
发明人： Susan H. Downey , Sheila F. Chopin , Peter R. Harper , Sohrab Safai , Tu-Anh Tran , Alan H. Woosley
IPC分类号： H01L23/48
CPC分类号： H01L23/49838 , H01L24/48 , H01L24/49 , H01L2224/32227 , H01L2224/45015 , H01L2224/48091 , H01L2224/48227 , H01L2224/48235 , H01L2224/4917 , H01L2224/49171 , H01L2224/73265 , H01L2224/92247 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01047 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2224/45099 , H01L2924/20752 , H01L2924/00 , H01L2924/00012
摘要： An integrated circuit is packaged using a package substrate that has a bottom side with a regular array of connection points and a top side with the integrated circuit on it. The package substrate also has vias that are present to provide electrical connection between the top and bottom sides. The vias have a via capture pad that is used to directly receive a wire bond. Thus, the wires from the integrated circuit to the top side directly contact the vias at their capture pads. In such a connection there is then no need for a trace from location where the wire is bonded on the top side to the via. This saves cost. Further this makes the package substrate useful for more than one type of integrated circuit.
摘要翻译：使用封装基板封装集成电路，该封装基板的底侧具有规则的连接点阵列，顶部具有集成电路。封装衬底还具有存在以提供顶侧和底侧之间的电连接的通孔。通孔具有用于直接接收引线键的通孔捕获垫。因此，从集成电路到顶侧的电线直接接触其捕获垫处的通孔。在这样的连接中，不需要从导线在顶侧上粘合到通孔的位置的迹线。这节省了成本。此外，这使得封装衬底可用于多于一种类型的集成电路。

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