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    • 1. 发明授权
    • Semiconductor storage device including a memory cell structure
    • 包括存储单元结构的半导体存储装置
    • US08592887B2
    • 2013-11-26
    • US13332905
    • 2011-12-21
    • Daina InoueHidenobu NagashimaAkira Yotsumoto
    • Daina InoueHidenobu NagashimaAkira Yotsumoto
    • H01L29/788
    • H01L27/11524H01L21/764
    • A semiconductor storage device includes an interlayer insulating film provided between select gate electrodes, a first fill material extending along upper portions of memory cell gate electrodes so as to cover air gaps residing between the memory cell gate electrodes, the first fill material extending along sidewalls of the select gate electrodes and sidewalls of the interlayer insulating film so as to define a recess above the first fill material extending along the sidewalls of the select gate electrodes and the sidewalls of the interlayer insulating film, a second fill material filling the recess above the first fill material, and a plurality of contacts formed through the interlayer insulating film, the contacts physically contacting each of device areas formed in a semiconductor substrate.
    • 半导体存储装置包括设置在选择栅电极之间的层间绝缘膜,沿着存储单元栅电极的上部延伸的第一填充材料,以覆盖位于存储单元栅电极之间的空气间隙,第一填充材料沿着 所述选择栅极电极和所述层间绝缘膜的侧壁,以便限定沿所述选择栅电极的侧壁和所述层间绝缘膜的侧壁延伸的所述第一填充材料上方的凹部,填充所述第一填充材料上方的所述凹部的第二填充材料 填充材料和通过层间绝缘膜形成的多个触点,触点物理接触形成在半导体衬底中的每个器件区域。
    • 2. 发明申请
    • SEMICONDUCTOR STORAGE DEVICE AND METHOD FOR MANUFACTURING THE SAME
    • 半导体存储器件及其制造方法
    • US20120241838A1
    • 2012-09-27
    • US13422547
    • 2012-03-16
    • Hidenobu NAGASHIMAAkira YOTSUMOTO
    • Hidenobu NAGASHIMAAkira YOTSUMOTO
    • H01L29/788H01L21/768
    • H01L27/11524H01L21/76801H01L21/7682H01L21/76897
    • According to one embodiment, a semiconductor storage device includes: a plurality of word lines that are formed at predetermined intervals in a first direction on the element region; a select gate transistor that is arranged in each of both sides of the word lines and has a width in the first direction wider than the word line; a first air gap that is positioned between the word lines; and a second air gap that is formed on a side wall portion opposite to a side of the word line of the select gate transistor. Further, according to one embodiment, the semiconductor storage device is provided in which an oxide film is formed on a surface of a substrate between the select gate transistors that are adjacent to each other, and a cross-sectional surface in a direction perpendicular to the first direction under the oxide film has a convex shape.
    • 根据一个实施例,半导体存储装置包括:在元件区域上沿第一方向以预定间隔形成的多个字线; 选择栅极晶体管,其布置在字线的两侧中的每一侧中,并且在第一方向上的宽度比字线宽; 位于字线之间的第一气隙; 以及形成在与选择栅极晶体管的字线的一侧相对的侧壁部分上的第二气隙。 此外,根据一个实施例,提供了一种半导体存储装置,其中在彼此相邻的选择栅极晶体管之间的衬底的表面上形成氧化物膜,并且在垂直于所述栅极晶体管的方向上的横截面 氧化膜下的第一方向具有凸形。
    • 3. 发明申请
    • SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
    • 半导体存储器件及其制造方法
    • US20120256263A1
    • 2012-10-11
    • US13332905
    • 2011-12-21
    • Daina INOUEHidenobu NagashimaAkira Yotsumoto
    • Daina INOUEHidenobu NagashimaAkira Yotsumoto
    • H01L27/088H01L21/336
    • H01L27/11524H01L21/764
    • A semiconductor storage device includes an interlayer insulating film provided between select gate electrodes, a first fill material extending along upper portions of memory cell gate electrodes so as to cover air gaps residing between the memory cell gate electrodes, the first fill material extending along sidewalls of the select gate electrodes and sidewalls of the interlayer insulating film so as to define a recess above the first fill material extending along the sidewalls of the select gate electrodes and the sidewalls of the interlayer insulating film, a second fill material filling the recess above the first fill material, and a plurality of contacts formed through the interlayer insulating film, the contacts physically contacting each of device areas formed in a semiconductor substrate.
    • 半导体存储装置包括设置在选择栅电极之间的层间绝缘膜,沿着存储单元栅电极的上部延伸的第一填充材料,以覆盖位于存储单元栅电极之间的空气间隙,第一填充材料沿着 所述选择栅极电极和所述层间绝缘膜的侧壁,以便限定沿所述选择栅电极的侧壁和所述层间绝缘膜的侧壁延伸的所述第一填充材料上方的凹部,填充所述第一填充材料上方的所述凹部的第二填充材料 填充材料和通过层间绝缘膜形成的多个触点,触点物理接触形成在半导体衬底中的每个器件区域。