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    • 5. 发明申请
    • SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
    • 半导体器件及其控制方法
    • US20130155774A1
    • 2013-06-20
    • US13610368
    • 2012-09-11
    • Akira OGAWAMasaru YANO
    • Akira OGAWAMasaru YANO
    • G11C16/28
    • H01L27/1052G11C16/0466G11C16/28Y10T29/41
    • The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit connected to a core cell provided in a nonvolatile memory cell array, a second current-voltage conversion circuit connected to a reference cell through a reference cell data line, a sense amplifier sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
    • 本发明提供一种半导体存储器及其控制方法,所述半导体器件包括连接到设置在非易失性存储单元阵列中的核心单元的第一电流 - 电压转换电路,连接到参考单元的第二电流 - 电压转换电路 参考单元数据线,感测来自第一电流 - 电压转换电路的输出和来自第二电流 - 电压转换电路的输出的读出放大器,将参考单元数据线上的电压电平与预定电压电平进行比较的比较电路 以及如果在对所述参考单元数据线预充电期间所述参考单元数据线处的电压电平低于所述预定电压电平,则对所述参考单元数据线充电的充电电路。 根据本发明,可以缩短参考单元数据线的预充电周期,并且可以缩短数据读取时间。
    • 6. 发明申请
    • NAIL CORRECTING DEVICE AND MEDICAL SET FOR NAIL CORRECTION
    • 指甲矫正装置和医疗套装用于指甲矫正
    • US20120197172A1
    • 2012-08-02
    • US13361178
    • 2012-01-30
    • Akira OGAWA
    • Akira OGAWA
    • A61F5/00
    • A61F5/11A61K31/00
    • A device includes: a cylindrical body formed of an elastic material; and a slit formed along a longitudinal direction of the cylindrical body from one end to an opposite end of the cylindrical body, a distal end of a nail being inserted to be held in the slit. The cylindrical body includes: plural pairs of holding teeth plurally divided in the longitudinal direction of the cylindrical body by dividing grooves formed from the slit along a circumferential direction of the cylindrical body such that the holding teeth of each pair are opposed to each other across the slit to hold the distal end of the nail; and coupling pieces configured to couple adjacent ones of the holding teeth on an opposite side of the slit.
    • 一种装置包括:由弹性材料形成的圆筒体; 以及沿筒体的长度方向从圆柱体的一端到另一端形成的狭缝,将钉子的前端插入以保持在狭缝中。 圆柱体包括:多个保持齿沿着圆柱体的圆周方向沿圆周方向分隔成多个沿圆柱体的纵向方向分割的多个保持齿,使得每对的保持齿彼此相对 狭缝夹住指甲的远端; 以及联接件,其构造成在狭缝的相对侧上将相邻的保持齿联接。
    • 7. 发明授权
    • Semiconductor device and control method of the same
    • 半导体器件及其控制方法相同
    • US07978523B2
    • 2011-07-12
    • US12512741
    • 2009-07-30
    • Akira OgawaMasaru Yano
    • Akira OgawaMasaru Yano
    • G11C16/06
    • H01L27/1052G11C16/0466G11C16/28Y10T29/41
    • The present invention provides a semiconductor memory and a control method therefore, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12) provided in a nonvolatile memory cell array (10), a second current-voltage conversion circuit (26) connected to a reference cell (22) through a reference cell data line (24), a sense amplifier (18) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit (28) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit (30) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
    • 因此,本发明提供一种半导体存储器和控制方法,所述半导体器件包括连接到设置在非易失性存储单元阵列(10)中的核心单元(12)的第一电流 - 电压转换电路(16),第二电流 - 电压转换电路(26),通过参考单元数据线(24)连接到参考单元(22);感测放大器(18),感测来自第一电流 - 电压转换电路的输出和来自第二电流电压 转换电路,将参考单元数据线上的电压电平与预定电压电平进行比较的比较电路(28)以及对参考单元数据线充电的充电电路(30),如果参考单元数据线上的电压电平为 在预充电参考单元数据线期间低于预定电压电平。 根据本发明,可以缩短参考单元数据线的预充电周期,并且可以缩短数据读取时间。
    • 9. 发明申请
    • SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
    • 半导体器件及其控制方法
    • US20090290425A1
    • 2009-11-26
    • US12512741
    • 2009-07-30
    • Akira OgawaMasaru Yano
    • Akira OgawaMasaru Yano
    • G11C16/06G11C7/06
    • H01L27/1052G11C16/0466G11C16/28Y10T29/41
    • The present invention provides a semiconductor memory and a control method therefore, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12) provided in a nonvolatile memory cell array (10), a second current-voltage conversion circuit (26) connected to a reference cell (22) through a reference cell data line (24), a sense amplifier (18) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit (28) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit (30) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
    • 因此,本发明提供一种半导体存储器和控制方法,所述半导体器件包括连接到设置在非易失性存储单元阵列(10)中的核心单元(12)的第一电流 - 电压转换电路(16),第二电流 - 电压转换电路(26),通过参考单元数据线(24)连接到参考单元(22);感测放大器(18),感测来自第一电流 - 电压转换电路的输出和来自第二电流电压 转换电路,将参考单元数据线上的电压电平与预定电压电平进行比较的比较电路(28)以及对参考单元数据线充电的充电电路(30),如果参考单元数据线上的电压电平为 在预充电参考单元数据线期间低于预定电压电平。 根据本发明,可以缩短参考单元数据线的预充电周期,并且可以缩短数据读取时间。
    • 10. 发明授权
    • Semiconductor device and control method therefor
    • 半导体装置及其控制方法
    • US07596032B2
    • 2009-09-29
    • US11478554
    • 2006-06-28
    • Akira OgawaMasaru Yano
    • Akira OgawaMasaru Yano
    • G11C16/06
    • H01L27/1052G11C16/0466G11C16/28Y10T29/41
    • The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12) provided in a nonvolatile memory cell array (10), a second current-voltage conversion circuit (26) connected to a reference cell (22) through a reference cell data line (24), a sense amplifier (18) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit (28) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit (30) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
    • 本发明提供一种半导体存储器及其控制方法,所述半导体器件包括连接到设置在非易失性存储单元阵列(10)中的核心单元(12)的第一电流 - 电压转换电路(16),第二电流 - 电压转换电路(26),通过参考单元数据线(24)连接到参考单元(22);感测放大器(18),感测来自第一电流 - 电压转换电路的输出和来自第二电流电压 转换电路,将参考单元数据线上的电压电平与预定电压电平进行比较的比较电路(28)以及对参考单元数据线充电的充电电路(30),如果参考单元数据线上的电压电平为 在预充电参考单元数据线期间低于预定电压电平。 根据本发明,可以缩短参考单元数据线的预充电周期,并且可以缩短数据读取时间。