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81. 发明申请

US20160028225A1 SURGE PROTECTIVE NETWORK SIGNAL PROCESSING CIRCUIT ASSEMBLY 有权
标题翻译：防护网络信号处理电路总成
公开(公告)号：US20160028225A1
公开(公告)日：2016-01-28
申请号：US14876386
申请日：2015-10-06
申请人： AJOHO ENTERPRISE CO., LTD.
发明人： Chia-Ping MO , You-Chi LIU
IPC分类号： H02H9/04 , H01F27/28 , H01F27/34 , H01F27/24 , H02H7/20 , H02H9/00
CPC分类号： H01F27/28 , H01F27/24 , H01F27/343 , H04L25/0264
摘要： A surge protective network signal processing circuit assembly includes a network chip, a network connector and a processing circuit including a plurality of two-wire channels electrically connected in parallel between the network chip and the network connector and a plurality of signal coupling capacitors respectively mounted in the two-wire channels and electrically connected in parallel and grounded for discharging instantaneous high voltage surges.
摘要翻译：浪涌保护网络信号处理电路组件包括网络芯片，网络连接器和包括并联电连接在网络芯片和网络连接器之间的多个二线通道的处理电路和分别安装在两线通道并联并联并接地，用于放电瞬时高压浪涌。

82. 发明授权

US09214200B2 Methods and apparatus for transmitting data in a phase modulated signal derived from early and late timing signals 有权
标题翻译：用于从早期和晚期定时信号得到的相位调制信号中发送数据的方法和装置
公开(公告)号：US09214200B2
公开(公告)日：2015-12-15
申请号：US13635028
申请日：2011-02-26
申请人： Michael Bucher , John Wilson
发明人： Michael Bucher , John Wilson
IPC分类号： G06F1/04 , G06F1/12 , H04L7/00 , G06F5/06 , G11C7/10 , G06F1/03 , G06F13/42 , G06F1/06 , H04B3/32 , H04L25/02 , G06F13/38
CPC分类号： G11C7/1051 , G06F1/0342 , G06F1/04 , G06F1/06 , G06F13/38 , G06F13/4243 , G11C7/1066 , G11C7/1072 , G11C7/1078 , G11C7/1093 , H04B3/32 , H04L7/0008 , H04L25/026 , H04L25/0264
摘要： A system includes a transmitter circuit and a receiver circuit that are coupled together through transmission lines. The transmitter circuit generates an early timing signal, a nominal timing signal, and a late timing signal. A multiplexer circuit selects between the early and the late timing signals based on a data signal to generate an encoded output signal that encodes the data signal. The nominal timing signal and the encoded output signal are transmitted through the transmission lines to the receiver circuit. The receiver circuit samples the encoded output signal in response to the nominal timing signal to generate even and odd sampled data signals. Complementary timing signals can be transmitted through transmission lines on opposite sides of the encoded output signal to provide crosstalk cancellation.
摘要翻译：一种系统包括通过传输线耦合在一起的发射机电路和接收机电路。发射机电路产生早期定时信号，标称定时信号和延迟定时信号。多路复用器电路基于数据信号在早期和晚期定时信号之间进行选择，以产生对数据信号进行编码的编码输出信号。标称定时信号和编码的输出信号通过传输线传输到接收器电路。接收器电路响应于标称定时信号对编码的输出信号进行采样，以产生偶数和奇数采样数据信号。互补定时信号可以通过编码输出信号相对侧的传输线传输，以提供串扰消除。

83. 发明授权

US09166646B1 Transceiver circuit and method for operating a transceiver circuit 有权
标题翻译：收发电路和操作收发电路的方法
公开(公告)号：US09166646B1
公开(公告)日：2015-10-20
申请号：US14468034
申请日：2014-08-25
申请人： NXP B.V.
发明人： Mattieu Deloge , Arnoud Pieter van der Wel
IPC分类号： H04B1/00 , H04B15/00 , H04B1/40 , H04L12/40
CPC分类号： H04L12/40 , H04B15/04 , H04L12/6418 , H04L25/0264
摘要： Embodiments of transceiver circuits and methods for operating a transceiver circuit are described. In one embodiment, a transceiver circuit includes a feedback loop connected to a bus and a control circuit connected to the bus. The feedback loop includes a tunable low-pass filter. The control circuit is configured to detect a radio frequency (RF) disturbance on the bus and control the bandwidth of the tunable low-pass filter in response to detection of the RF disturbance on the bus. Other embodiments are also described.
摘要翻译：描述了用于操作收发器电路的收发器电路和方法的实施例。在一个实施例中，收发器电路包括连接到总线的反馈回路和连接到总线的控制电路。反馈回路包括可调低通滤波器。控制电路被配置为响应于总线上的RF干扰的检测来检测总线上的射频（RF）干扰并控制可调谐低通滤波器的带宽。还描述了其它实施例。

84. 发明申请

US20150163074A1 POWER-LINE COMMUNICATION COUPLING 有权
标题翻译：电源线通信耦合
公开(公告)号：US20150163074A1
公开(公告)日：2015-06-11
申请号：US14513859
申请日：2014-10-14
申请人： Henry F. Pruett , Vincenzo DiTommaso , Ravindranath Naiknaware , Jorell A. Olson
发明人： Henry F. Pruett , Vincenzo DiTommaso , Ravindranath Naiknaware , Jorell A. Olson
IPC分类号： H04L25/02 , H04B3/54 , H02J4/00
CPC分类号： H02J3/383 , H02J1/00 , H02J4/00 , H04B3/542 , H04L25/0264 , H04L25/0266 , Y02E10/563
摘要： In some embodiments, a system includes a power system coupled to a power bus, and a power line communication (PLC) gateway coupled in series with the power bus. In other embodiments, a system includes first and second power circuits coupled in series with a power bus, and first and second power-line communication circuits coupled in series with the power bus. In additional embodiments, a system includes a power converter coupled to a power bus and having one or more switching frequencies, and a power-line communication circuit coupled to the power bus and having one or more communication frequencies, where at least one of the switching frequencies is substantially greater than at least one of the communication frequencies.
摘要翻译：在一些实施例中，系统包括耦合到电力总线的电力系统以及与电力总线串联耦合的电力线通信（PLC）网关。在其他实施例中，系统包括与电力总线串联耦合的第一和第二电力电路，以及与电力总线串联耦合的第一和第二电力线通信电路。在另外的实施例中，系统包括耦合到电力总线并且具有一个或多个开关频率的功率转换器和耦合到电力总线并具有一个或多个通信频率的电力线通信电路，其中至少一个开关频率基本上大于通信频率中的至少一个。

85. 发明授权

US09054866B2 Multimode DSL line driver 有权
标题翻译：多模DSL线路驱动
公开(公告)号：US09054866B2
公开(公告)日：2015-06-09
申请号：US12107626
申请日：2008-04-22
申请人： Nir Matalon , Sumant Ranganathan
发明人： Nir Matalon , Sumant Ranganathan
IPC分类号： H04M1/00 , H04L5/14 , H04L25/02 , H04L27/26
CPC分类号： H04L5/1438 , H04L25/0264 , H04L25/0272 , H04L27/2601
摘要： A multimode DSL (digital subscriber line) line driver circuit is disclosed. The line driver circuit includes a switch network that enables the line driver circuit to be switched between multiple DSL communication configurations. Upon receipt of a mode control signal, the line driver circuit switches from a first DSL communication configuration to a second communication configuration. A DSL communication signal configured according to the second DSL communication configuration is received at the line driver circuit. The received DSL communication signal is amplified and/or filtered by the line driver circuit. The received DSL communication signal is transmitted from the line driver circuit. In one example implementation, the line driver circuit may be switched from an asymmetric digital subscriber line (ADSL) configuration to a very high speed digital subscriber line (VDSL) configuration, and may be switched from the VDSL configuration to the ADSL configuration.
摘要翻译：公开了一种多模DSL线路驱动电路。线路驱动器电路包括开关网络，其使线路驱动器电路能够在多个DSL通信配置之间切换。在接收到模式控制信号时，线路驱动器电路从第一DSL通信配置切换到第二通信配置。在线路驱动电路接收根据第二DSL通信配置配置的DSL通信信号。所接收的DSL通信信号被线路驱动电路放大和/或滤波。所接收的DSL通信信号从线路驱动电路发送。在一个示例实现中，线路驱动器电路可以从非对称数字用户线（ADSL）配置切换到非常高速的数字用户线（VDSL）配置，并且可以从VDSL配置切换到ADSL配置。

86. 发明授权

US09020028B2 Transmitter circuit, receiver circuit, and transmitting/receiving system 有权
标题翻译：发射机电路，接收机电路和发射/接收系统
公开(公告)号：US09020028B2
公开(公告)日：2015-04-28
申请号：US13844862
申请日：2013-03-16
申请人： SK Hynix Inc.
发明人： Hyun-Woo Lee
IPC分类号： H04B1/06 , H04L27/06 , H04L27/04 , H04L7/02 , H04L7/00 , H04L25/03
CPC分类号： H04L27/066 , H04L7/0008 , H04L7/02 , H04L25/0264 , H04L25/03 , H04L27/04
摘要： A transmitting/receiving system may include a transmission line, a transmitter circuit configured to transmit a clock to the transmission line and to adjust an amplitude of the clock in accordance with a logic level of data, and a receiver circuit configured to receive the clock transferred to the transmission line and to recover the data through detection of the amplitude of the clock.
摘要翻译：发送/接收系统可以包括传输线，发射机电路，被配置为向传输线传输时钟并根据数据的逻辑电平来调整时钟的幅度;以及接收机电路，被配置为接收传送的时钟并且通过检测时钟的幅度来恢复数据。

87. 发明授权

US09019994B2 Single wire signal regeneration transmitting apparatus and method and serially connected single wire signal regeneration transmitting apparatuses 有权
标题翻译：单线信号再生发送装置和方法以及串联连接的单线信号再生发送装置
公开(公告)号：US09019994B2
公开(公告)日：2015-04-28
申请号：US13730382
申请日：2012-12-28
申请人： Macroblock, Inc.
发明人： Shun-Ching Hsieh
IPC分类号： H04L29/02 , H04L5/24 , H04L25/02 , H04L25/24 , H04L25/49 , H04J3/07 , H04L7/04
CPC分类号： H04L29/02 , H04J3/07 , H04L5/24 , H04L25/0264 , H04L25/245 , H04L25/49 , H04L2007/045
摘要： A single wire signal regeneration transmitting apparatus receives a serial packet including a plurality of signal segments, and each of the signal segments includes a data field and a stuff time symbol. Each of the data fields, which is followed by each of the stuff time symbols, includes multiple logic 0/1 signal symbols, with accumulated numbers of the logic 0/1 signal symbols in each of the data fields being the same. The single wire signal regeneration transmitting apparatus is adapted to process the serial packet to sequentially output the signal segments, and after the single wire signal regeneration transmitting apparatus outputs the data field from a previously received signal segment, the single wire signal regeneration transmitting apparatus continues outputting the stuff time symbol until starting to process a next received signal segment received subsequent to a currently received signal segment in the received serial package.
摘要翻译：单线信号再生发送装置接收包括多个信号段的串行分组，并且每个信号段包括数据字段和填充时间符号。每个填充时间符号之后的每个数据字段包括多个逻辑0/1信号符号，每个数据字段中的逻辑0/1信号符号的累加数相同。单线信号再生发送装置适于处理串行分组以顺序地输出信号段，并且在单线信号再生发送装置从先前接收到的信号段输出数据字段之后，单线信号再生发送装置继续输出填充时间符号，直到开始处理在接收的串行包中的当前接收的信号段之后接收的下一个接收信号段。

88. 发明授权

US08971833B2 Electronic device with dynamic drive strength adjustment to mitigate impact of system noise on wireless performance 有权
标题翻译：具有动态驱动强度调整的电子设备，以减轻系统噪声对无线性能的影响
公开(公告)号：US08971833B2
公开(公告)日：2015-03-03
申请号：US12892562
申请日：2010-09-28
申请人： Hassan Lashkari , Gary Thomason , Jaime Tolentino
发明人： Hassan Lashkari , Gary Thomason , Jaime Tolentino
IPC分类号： H04B1/10 , H04L25/02 , H04B1/38 , H01Q11/12 , H04B1/04 , H04M1/00
CPC分类号： H04L25/0264
摘要： Electronic devices such as portable computers may contain circuits that generate radio-frequency noise. The radio-frequency noise may interfere with the operation of sensitive circuitry such as wireless communications circuitry. The circuits that generate the radio-frequency noise may include differential signal drivers that drive signals onto communications lines such as lines in a bus or output interface. A control circuit may power the drivers at an adjustable driver voltage bias level. The amount of noise that is generated by the drivers may vary as a function of the voltage bias level and may produce different amounts of noise at different wireless frequencies. Computer lid position and other factors may also influence the amount of interference that is generated. The control circuit may determine the current operating state of the device and may make voltage bias level adjustments that minimize interference between the drivers and the wireless circuitry.
摘要翻译：诸如便携式计算机的电子设备可能包含产生无线电频率噪声的电路。射频噪声可能会干扰诸如无线通信电路之类的敏感电路的操作。产生射频噪声的电路可能包括将信号驱动到通信线路上的差分信号驱动器，例如总线或输出接口中的线路。控制电路可以以可调节的驱动器电压偏置电平为驱动器供电。由驱动器产生的噪声量可以根据电压偏置电平而变化，并可能在不同的无线频率产生不同数量的噪声。计算机盖位置等因素也可能影响产生的干扰量。控制电路可以确定设备的当前操作状态，并且可以进行最小化驱动器和无线电路之间的干扰的电压偏置电平调整。

89. 发明授权

US08958507B2 Reuse of digital interface for multiple components 有权
标题翻译：复用多个组件的数字接口
公开(公告)号：US08958507B2
公开(公告)日：2015-02-17
申请号：US11845449
申请日：2007-08-27
申请人： Andre Hanke , Bernd Adler
发明人： Andre Hanke , Bernd Adler
IPC分类号： H03D3/24 , H04B7/08 , H04L25/02 , H04L29/08
CPC分类号： H04B7/0822 , H04L25/0264 , H04L25/0292 , H04L67/12
摘要： In one embodiment, a circuit can selectively adjust a current for driving a load. The circuit includes a sensor configured to measure a magnetic field associated with the current and provide a sensor voltage representative thereof. A control circuit is configured to selectively adjust the current as a function of the sensor voltage and a time-varying voltage threshold. Other methods and systems are also disclosed.
摘要翻译：在一个实施例中，电路可以选择性地调节用于驱动负载的电流。电路包括被配置为测量与电流相关联的磁场并提供代表其的传感器电压的传感器。控制电路被配置为根据传感器电压和时变电压阈值来选择性地调节电流。还公开了其它方法和系统。

90. 发明申请

US20150043662A1 CHARGING COMMUNICATION SYSTEM AND CHARGING EQUIPMENT 有权
标题翻译：充电通信系统和充电设备
公开(公告)号：US20150043662A1
公开(公告)日：2015-02-12
申请号：US14386255
申请日：2013-04-01
申请人： Mitsubishi Electric Corporation
发明人： Yuji Igarashi , Takashi Tamada , Yoichi Okubo , Takanori Matsunaga , Kazushi Shirasawa , Hiroyuki Kumazawa
IPC分类号： H04B3/54 , H04L25/02
CPC分类号： H04B3/54 , B60L11/14 , B60L11/18 , B60L11/1816 , B60L11/184 , B60L11/1844 , B60L11/1846 , B60L2240/80 , B60L2270/142 , H01M2/10 , H01M2/1083 , H01M10/44 , H01M2220/20 , H02J7/00 , H02J7/0004 , H02J7/0027 , H02J13/00 , H04L25/0264 , Y02E60/721 , Y02T10/70 , Y02T10/7005 , Y02T10/7055 , Y02T10/7072 , Y02T10/7077 , Y02T90/121 , Y02T90/128 , Y02T90/14 , Y02T90/16 , Y02T90/163 , Y02T90/169 , Y04S10/126 , Y04S30/14
摘要： In a charging communication system in which a charging control device performs communication between an electric vehicle and a charging equipment, the electric vehicle is equipped with a first communication device and a second communication device both configured to communicate with the charging equipment by using the same signal line in the charging cable; and a signal line connection device configured to switch connection/disconnection between the second communication device and the signal line. The charging control device, which controls a battery on the electric vehicle, calculates an amount of change in a signal line voltage between before and after the signal line connection device connects the second communication device to the signal line, and the charging control device causes, when the amount of change does not fall within a predetermined allowable range, the signal line connection device to disconnect the second communication device from the signal line.
摘要翻译：在充电控制装置执行电动车辆与充电设备之间的通信的充电通信系统中，电动车辆配备有第一通信装置和第二通信装置，其被配置为通过使用相同的信号与充电设备通信充电电缆线; 以及信号线连接装置，被配置为切换第二通信装置与信号线之间的连接/断开。控制电动车辆上的电池的充电控制装置计算信号线连接装置将信号线连接装置连接到信号线之前和之后的信号线电压的变化量，并且充电控制装置，当变化量不在预定的允许范围内时，信号线连接装置将第二通信装置与信号线断开。

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