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81. 发明授权

US07737774B2 Electronic circuit with compensation of intrinsic offset of differential pairs 失效
标题翻译：电子电路补偿差分对的固有偏移
公开(公告)号：US07737774B2
公开(公告)日：2010-06-15
申请号：US12097722
申请日：2006-12-12
申请人： François Bore , Sandrine Bruel
发明人： François Bore , Sandrine Bruel
IPC分类号： H03F1/02
CPC分类号： H03F3/45748 , H03F3/456 , H03F2203/45212 , H03F2203/45352 , H03F2203/45482 , H03F2203/45504 , H03F2203/45512 , H03F2203/45514 , H03M1/445
摘要： The invention relates to analog integrated electronic circuits using differential pairs. The proposal is for a method of automatic correction of offset voltage. The inputs (V1, V2) of the differential circuit are short circuited during a calibration phase distinct from the normal usage phase. A capacitor is charged through the difference of the output currents of the branches of the differential pair in this phase. The voltage at the terminals of the capacitor is compared with at least one threshold. During the normal usage phase following the calibration phase, the result of the comparison is kept in memory. In the normal usage phase, a correction is applied depending on the result kept in memory to a current source of a follower stage upstream of the differential pair.
摘要翻译：本发明涉及使用差分对的模拟集成电子电路。该建议是针对偏移电压进行自动校正的方法。在与正常使用阶段不同的校准阶段，差分电路的输入（V1，V2）短路。在该阶段，通过差分对的分支的输出电流的差异对电容器进行充电。将电容器端子处的电压与至少一个阈值进行比较。在校准阶段之后的正常使用阶段，将比较结果保存在存储器中。在正常使用阶段，根据保存在存储器中的结果对差分对上游的跟随器级的电流源进行校正。

82. 发明申请

US20090224805A1 ELECTRONIC CIRCUIT WITH COMPENSATION OF INTRINSIC OFFSET OF DIFFERENTIAL PAIRS 失效
标题翻译：电子线路补偿不平衡对位的内部偏移
公开(公告)号：US20090224805A1
公开(公告)日：2009-09-10
申请号：US12097722
申请日：2006-12-12
申请人： Francois Bore , Sandrine Bruel
发明人： Francois Bore , Sandrine Bruel
IPC分类号： H03K5/22
CPC分类号： H03F3/45748 , H03F3/456 , H03F2203/45212 , H03F2203/45352 , H03F2203/45482 , H03F2203/45504 , H03F2203/45512 , H03F2203/45514 , H03M1/445
摘要： The invention relates to analog integrated electronic circuits using differential pairs. The proposal is for a method of automatic correction of offset voltage. The inputs (V1, V2) of the differential circuit are short circuited during a calibration phase distinct from the normal usage phase. A capacitor is charged through the difference of the output currents of the branches of the differential pair in this phase. The voltage at the terminals of the capacitor is compared with at least one threshold. During the normal usage phase following the calibration phase, the result of the comparison is kept in memory. In the normal usage phase, a correction is applied depending on the result kept in memory to a current source of a follower stage upstream of the differential pair.
摘要翻译：本发明涉及使用差分对的模拟集成电子电路。该建议是针对偏移电压进行自动校正的方法。在与正常使用阶段不同的校准阶段，差分电路的输入（V1，V2）短路。在该阶段，通过差分对的分支的输出电流的差异对电容器进行充电。将电容器端子处的电压与至少一个阈值进行比较。在校准阶段之后的正常使用阶段，将比较结果保存在存储器中。在正常使用阶段，根据保存在存储器中的结果对差分对上游的跟随器级的电流源进行校正。

83. 发明申请

US20090206929A1 OPERATION AMPLIFIER FOR IMPROVING SLEW RATE 有权
标题翻译：操作放大器，用于改善速度
公开(公告)号：US20090206929A1
公开(公告)日：2009-08-20
申请号：US12033269
申请日：2008-02-19
申请人： Ling-Yun Wang , Yaw-Guang Chang
发明人： Ling-Yun Wang , Yaw-Guang Chang
IPC分类号： H03F3/45 , H03F1/14
CPC分类号： H03F3/45183 , H03F1/14 , H03F3/211 , H03F2200/45 , H03F2203/45248 , H03F2203/45514
摘要： An OP amplifier including an input stage and an output stage for improving a slew rate is provided. The input stage receives one of input voltages, and generates an internal voltage according to the received input voltage. The output stage receives and gains the internal voltage, and outputs an output voltage. The output stage includes a first transistor, a plurality of first capacitors and a first switching unit. The first transistor includes a first source/drain terminal coupled to a first voltage, a gate terminal controlled by the internal voltage. The output stage outputs the output voltage according to a voltage at a second source/drain terminal of the first transistor. First terminals of the first capacitors are coupled to the second source/drain terminal of the first transistor. The first switching unit selectively transmits the internal voltage to the second terminal of a corresponding one of the first capacitors.
摘要翻译：提供了包括用于提高转换速率的输入级和输出级的OP放大器。输入级接收输入电压之一，并根据接收到的输入电压产生内部电压。输出级接收内部电压并输出一个输出电压。输出级包括第一晶体管，多个第一电容器和第一开关单元。第一晶体管包括耦合到第一电压的第一源极/漏极端子，由内部电压控制的栅极端子。输出级根据第一晶体管的第二源极/漏极端子处的电压输出输出电压。第一电容器的第一端子耦合到第一晶体管的第二源极/漏极端子。第一开关单元选择性地将内部电压发送到第一电容器中相应一个的第二端子。

84. 发明申请

US20090108942A1 Low noise, low power and high bandwidth capacitive feedback trans-impedance amplifier with differential fet input and bipolar emitter follower feedback 有权
标题翻译：低噪声，低功耗和高带宽电容反馈反阻抗放大器，具有差分fet输入和双极射极跟随器反馈
公开(公告)号：US20090108942A1
公开(公告)日：2009-04-30
申请号：US11980294
申请日：2007-10-30
申请人： Kanon Liu , James F. Asbrock
发明人： Kanon Liu , James F. Asbrock
IPC分类号： H03F3/16
CPC分类号： H03F3/45183 , H03F1/08 , H03F3/082 , H03F3/68 , H03F2203/45514 , H03F2203/45722
摘要： A differential amplifier topology includes circuitry to create a higher bandwidth output using less current than an existing Capacitive Trans-Impedance Amplifier (CTIA) using an all Field Effect Transistor (FET) circuit design. A bipolar npn emitter follower in the circuit topology provides low output impedance and some degree of output inductive peaking, and the CTIA differential output is buffered by the bipolar npn emitter follower in the CTIA feedback loop such as the open-loop high voltage gain is maintained without being affected by output loads.
摘要翻译：差分放大器拓扑包括使用全场效应晶体管（FET）电路设计，使用比现有的电容式跨阻抗放大器（CTIA）更小的电流产生更高带宽输出的电路。电路拓扑中的双极性npn射极跟随器提供低输出阻抗和一定程度的输出感应峰值，并且CTIA差分输出由CTIA反馈环路中的双极性npn发射极跟随器缓冲，例如开路高电压增益保持而不受输出负载的影响。

85. 发明申请

US20090096491A1 DRIVER CIRCUIT, DATA DRIVER, INTEGRATED CIRCUIT DEVICE, AND ELECTRONIC INSTRUMENT 审中-公开
标题翻译：驱动电路，数据驱动器，集成电路设备和电子仪器
公开(公告)号：US20090096491A1
公开(公告)日：2009-04-16
申请号：US12250934
申请日：2008-10-14
申请人： Motoaki NISHIMURA
发明人： Motoaki NISHIMURA
IPC分类号： H03K3/00
CPC分类号： H03K5/249 , G09G3/3688 , G09G2310/027 , H03F3/45475 , H03F2203/45514 , H03F2203/45551
摘要： A driver circuit includes a first capacitor provided between a first node and a reference node, a second capacitor provided between a second node and the reference node, a first switch element provided between the first node and an input node, a second switch element provided between the first node and an analog reference power supply, a third switch element provided between the second node and an output node, a fourth switch element provided between the second node and the analog reference power supply, and a fifth switch element provided between the output node and the reference node. A first capacitor area and a second capacitor area are disposed along a first direction. The first switch element and the second switch element are disposed in a third direction with respect to the first capacitor area and the second capacitor area. The third switch element and the fourth switch element are disposed in the first direction with respect to the first capacitor area and the second capacitor area. A reference node line is provided in a second direction with respect to the first switch element, the second switch element, the third switch element, and the fourth switch element.
摘要翻译：驱动器电路包括设置在第一节点和参考节点之间的第一电容器，设置在第二节点和参考节点之间的第二电容器，设置在第一节点和输入节点之间的第一开关元件，第一节点和模拟参考电源，设置在第二节点和输出节点之间的第三开关元件，设置在第二节点和模拟参考电源之间的第四开关元件，以及设置在输出节点之间的第五开关元件和参考节点。第一电容器区域和第二电容器区域沿第一方向设置。第一开关元件和第二开关元件相对于第一电容器区域和第二电容器区域设置在第三方向上。第三开关元件和第四开关元件相对于第一电容器区域和第二电容器区域设置在第一方向上。参考节点线相对于第一开关元件，第二开关元件，第三开关元件和第四开关元件在第二方向上设置。

86. 发明申请

US20070182482A1 Technique to improve the gain and signal to noise ratio in CMOS switched capacitor amplifiers 有权
标题翻译：提高CMOS开关电容放大器的增益和信噪比的技术
公开(公告)号：US20070182482A1
公开(公告)日：2007-08-09
申请号：US11728537
申请日：2007-03-26
申请人： Leonard Forbes , David Cuthbert
发明人： Leonard Forbes , David Cuthbert
IPC分类号： H03F1/36
CPC分类号： H03F3/005 , H03F1/26 , H03F1/38 , H03F3/45183 , H03F2203/45166 , H03F2203/45224 , H03F2203/45514 , H03F2203/45551 , H03F2203/45674 , H03F2203/45722
摘要： The present invention comprises switched capacitor amplifiers including positive feedback on semiconductor devices, wafers, and systems incorporating same and methods for amplifying signals using positive feedback, while maintaining a stable gain and producing an improved signal-to-noise ratio. One embodiment includes a switched capacitor amplifier comprising a CMOS amplifier, a feed-in switched capacitor, and a feedback switched capacitor. The feed-in switched capacitor couples an input signal to the non-inverting input of the CMOS amplifier. Similarly, the feedback switched capacitor couples the amplifier output to the non-inverting input to create a positive feedback loop. A capacitance of the feedback switched capacitor relative to a capacitance of the feed-in switched capacitor comprises a feedback proportion. This feedback proportion may be configured to maintain a stable gain of the switched capacitor amplifier and increase a signal-to-noise ratio of the switched capacitor amplifier, even with the switched capacitor amplifier in a positive feedback arrangement.
摘要翻译：本发明包括开关电容放大器，其包括对半导体器件的正反馈，晶圆及其结合的系统以及使用正反馈放大信号的方法，同时保持稳定的增益并产生改善的信噪比。一个实施例包括具有CMOS放大器，馈入开关电容器和反馈开关电容器的开关电容放大器。馈入开关电容将输入信号耦合到CMOS放大器的非反相输入。类似地，反馈开关电容器将放大器输出耦合到非反相输入端以产生正反馈回路。反馈开关电容器相对于馈入开关电容器的电容的电容包括反馈比例。该反馈比例可以被配置为保持开关电容放大器的稳定增益，并且即使开关电容放大器处于正反馈布置中，也可提高开关电容放大器的信噪比。

87. 发明授权

US07248105B2 Method and circuit for input offset correction in an amplifier circuit 有权
标题翻译：放大器电路中输入偏移校正的方法和电路
公开(公告)号：US07248105B2
公开(公告)日：2007-07-24
申请号：US11097856
申请日：2005-04-01
申请人： Myron J. Koen
发明人： Myron J. Koen
IPC分类号： H03F1/02
CPC分类号： H03F1/02 , H03F3/45475 , H03F3/45968 , H03F3/45977 , H03F2200/261 , H03F2203/45514
摘要： A method and circuit for eliminating input voltage offset in an amplifier circuit are provided. An exemplary offset correction circuit is configured with DC restoration to eliminate the DC input voltage offset by suitably providing a correction voltage to correct an input voltage offset during operation of the amplifier circuit, without realizing recovery time problems associated with AC coupling. An exemplary offset correction circuit is configured with DC restoration and comprises a timing circuit, a sample and hold circuit, and a feedback circuit to provide a correction voltage signal to correct input voltage offset. The timing circuit is configured to determine a “dead time” and “live time” for operation of the amplifier circuit. During the “dead time” period the sample and hold circuit will sample a differential signal across the DC coupling and provide a feedback signal through feedback circuit to correct input offset voltage. During the “live time” operation of the amplifier circuit, the sample and hold circuit operates to hold the level of correction voltage provided by the feedback circuit to suitably maintain a low input voltage offset.
摘要翻译：提供了用于消除放大器电路中的输入电压偏移的方法和电路。示例性偏移校正电路被配置为具有DC恢复以通过适当地提供校正电压来校正放大器电路的操作期间的输入电压偏移而消除DC输入电压偏移，而不会实现与AC耦合相关联的恢复时间问题。示例性偏移校正电路配置有DC恢复，并且包括定时电路，采样和保持电路以及反馈电路，以提供校正电压信号以校正输入电压偏移。定时电路被配置为确定用于放大器电路的操作的“死区时间”和“实时时间”。在“死区时间”期间，采样和保持电路将通过DC耦合采样差分信号，并通过反馈电路提供反馈信号，以校正输入失调电压。在放大器电路的“实时”操作期间，采样和保持电路操作以保持由反馈电路提供的校正电压的电平以适当地保持低的输入电压偏移。

88. 发明申请

US20060226912A1 Apparatus and method for limiting voltage surge at amplifier start up 审中-公开
标题翻译：放大器启动时限制电压浪涌的装置和方法
公开(公告)号：US20060226912A1
公开(公告)日：2006-10-12
申请号：US11092959
申请日：2005-03-29
申请人： Edwin Suryahusada , Patrick Muggler
发明人： Edwin Suryahusada , Patrick Muggler
IPC分类号： H03F3/04
CPC分类号： H03F3/04 , H03F1/305 , H03F3/45475 , H03F2203/45514
摘要： An apparatus for reducing voltage surge while powering up an amplifier device, the amplifier device charging an input capacitance in at least one input line during the powering up, the charging being subject to a time constant established by the input capacitance in cooperation with an input resistance in the at least one input line, includes: a resistive load switchingly coupled with at least a portion of the input resistance in the at least one input line. The switchingly coupling is effected during at least a portion of the powering up.
摘要翻译：一种用于在为放大器装置供电时减小电压浪涌的装置，所述放大器装置在上电期间对至少一个输入线路中的输入电容充电，充电经受与输入电阻协作的输入电容建立的时间常数在至少一个输入线中包括：电阻负载，与至少一个输入线中的输入电阻的至少一部分切换耦合。交换耦合在至少一部分加电期间进行。

89. 发明申请

US20050046460A1 Amplifier compensation techniques for switched capacitor circuits 失效
标题翻译：开关电容电路的放大器补偿技术
公开(公告)号：US20050046460A1
公开(公告)日：2005-03-03
申请号：US10835401
申请日：2004-04-30
申请人： Sumant Ranganathan
发明人： Sumant Ranganathan
IPC分类号： G06G7/18 , H03F1/34 , H03F3/00 , H03F3/45
CPC分类号： H03F3/005 , H03F1/34 , H03F3/45475 , H03F2200/159 , H03F2203/45514
摘要： A system and method are used to maintain a variance in feedback factors of an amplifier between the first and second phases either below a threshold value or within a specified range. The system includes the amplifier and first through third capacitances. The amplifier is coupled between an input node and an output node that operates during first and second phases of operation. The first capacitance is coupled across the amplifier and between the input node and the output node during the first and second phases of operation. The second capacitance is coupled to the input node during the first phase of operation. The third capacitance is coupled to one of the input and output nodes during one or both of the first and second phases of operation.
摘要翻译：使用系统和方法来维持第一和第二相之间的放大器的反馈因子的差异，或者低于阈值或在指定范围内。该系统包括放大器和第一至第三电容。放大器耦合在输入节点和在第一和第二操作阶段期间操作的输出节点。在操作的第一和第二阶段期间，第一电容跨越放大器并且在输入节点和输出节点之间耦合。第二电容在第一阶段操作期间耦合到输入节点。在操作的第一和第二阶段中的一个或两个期间，第三电容耦合到输入和输出节点中的一个。

90. 发明授权

US06768374B1 Programmable gain amplifier with single stage switched capacitor circuit using bandwidth balancing 有权
标题翻译：可编程增益放大器，采用单级开关电容电路，采用带宽平衡
公开(公告)号：US06768374B1
公开(公告)日：2004-07-27
申请号：US10397122
申请日：2003-03-25
申请人： Bumha Lee
发明人： Bumha Lee
IPC分类号： H03F102
CPC分类号： H03F3/45475 , G11C27/026 , H03F3/005 , H03F2203/45514 , H03G1/0094
摘要： A single stage switched capacitor programmable gain amplifier uses programmable capacitor values to adjust gain factors. The operation of the amplifier is described by a transfer function having two gain factors: (C1/C2) and (C2/C3). The gain factor of C1/C2 applies during the holding phase and the gain factor of C2/C3 applies during the sampling phase. The transfer function is equal to the product of the two gain factors: (C1/C2)×(C2/C3) such that the transfer function is equal to (C1/C3). The intermediate element C2 can be adjusted to maximize bandwidth because C2 is independent of the total transfer gain. Accordingly, the intermediate element C2 is substantially fixed from the holding phase to the following sampling phase such that the bandwidth of the programmable gain amplifier is maximized in the two phases.
摘要翻译：单级开关电容可编程增益放大器使用可编程电容值调整增益系数。通过具有两个增益因子（C1 / C2）和（C2 / C3）的传递函数来描述放大器的操作。 C1 / C2的增益系数在保持阶段适用，C2 / C3的增益系数在采样阶段应用。传递函数等于两个增益因子（C1 / C2）x（C2 / C3）的乘积，使得传递函数等于（C1 / C3）。可以调整中间元件C2以使带宽最大化，因为C2独立于总传输增益。因此，中间元件C2基本上从保持相位固定到随后的采样相位，使得可编程增益放大器的带宽在两相中最大化。

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