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81. 发明授权

US07333116B2 Data processor having unified memory architecture using register to optimize memory access 有权
标题翻译：具有使用寄存器的统一存储器架构的数据处理器来优化存储器访问
公开(公告)号：US07333116B2
公开(公告)日：2008-02-19
申请号：US11182944
申请日：2005-07-18
申请人： Tetsuya Shimomura , Shigeru Matsuo , Koyo Katsura , Tatsuki Inuzuka , Yasuhiro Nakatsuka
发明人： Tetsuya Shimomura , Shigeru Matsuo , Koyo Katsura , Tatsuki Inuzuka , Yasuhiro Nakatsuka
IPC分类号： G09G5/39 , G09G5/36 , G06F13/14 , G06F15/167
CPC分类号： G09G5/001 , G06F13/1673 , G06F13/18 , G09G5/02 , G09G5/363 , G09G5/393 , G09G5/395 , G09G2340/02 , G09G2360/121 , G09G2360/125 , G09G2360/128
摘要： In order to reduce degradation of the processing performance of the data processor due to use of a part of the main memory as a display frame buffer, when an access request to the memory 200 is generated from the CPU 310, the memory controller 400 holds it once, requests the display controller 560 to stop the access to the memory 200 which is in execution, when data to the access executed already is transferred from the memory 200, holds it, and transfers the access request from the CPU bus 310 which is held by the memory 200. When the access from the CPU bus 310 ends, the memory controller 400 restarts the access stopped in the display controller 560 and passes the held data to the display controller 560.
摘要翻译：为了减少由于使用主存储器的一部分作为显示帧缓冲器而导致的数据处理器的处理性能的劣化，当从CPU 310产生对存储器200的访问请求时，存储器控制器400保持一旦请求显示控制器560停止对正在执行的存储器200的访问，当已经从存储器200传送已经执行的访问的数据时，显示控制器560保持它，并且从被保持的CPU总线310传送访问请求由存储器200。当CPU总线310的访问结束时，存储器控制器400重启在显示控制器560中停止的访问，并将保持的数据传送到显示控制器560。

82. 再颁专利

USRE39529E1 Graphic processing apparatus utilizing improved data transfer to reduce memory size 有权
标题翻译：利用改进的数据传输来减少存储器大小的图形处理装置
公开(公告)号：USRE39529E1
公开(公告)日：2007-03-27
申请号：US09536646
申请日：2000-03-28
申请人： Koyo Katsura , Shinichi Kojima , Noriyuki Kurakami
发明人： Koyo Katsura , Shinichi Kojima , Noriyuki Kurakami
IPC分类号： G09G5/39
CPC分类号： G09G5/393
摘要： A Memory Interface and Video Attribute Controller (MIVAC) is inserted between a dynamic RAM (DRAM) capable of a consecutive data read operation, such as the operation associated with the static column mode, page mode, or nibble mode, and a graphic processor to provide a parallel data processing. A serial data transfer is executed on each data bus between the MIVAC and the DRAM, whereas parallel data transfer is conducted between the MIVAC and the graphic processor. As a result, the graphic processor can be configured with a reduced number of DRAMs so that the graphic processor operates without paying attention to the consecutive data read mode of the DRAM.
摘要翻译：存储器接口和视频属性控制器（MIVAC）插入在能够进行连续数据读取操作的动态RAM（DRAM）之间，诸如与静态列模式，页面模式或半字节模式相关联的操作，以及图形处理器提供并行数据处理。在MIVAC和DRAM之间的每个数据总线上执行串行数据传输，而在MIVAC和图形处理器之间进行并行数据传输。结果，图形处理器可以被配置为具有减少数量的DRAM，使得图形处理器在不关注DRAM的连续数据读取模式的情况下操作。

83. 发明授权

US06751605B2 Apparatus for recognizing input character strings by inference 有权
标题翻译：用于通过推理识别输入字符串的装置
公开(公告)号：US06751605B2
公开(公告)日：2004-06-15
申请号：US09789820
申请日：2001-02-22
申请人： Keiko Gunji , Koyo Katsura , Soshiro Kuzunuki , Masaki Miura , Toshimi Yokota
发明人： Keiko Gunji , Koyo Katsura , Soshiro Kuzunuki , Masaki Miura , Toshimi Yokota
IPC分类号： G06F1730
CPC分类号： G06K9/72 , G06K2209/01 , Y10S707/99931 , Y10S707/99933
摘要： A character recognition apparatus for inferring the entire character string solely from a user-input handwritten keyword and displaying the inferred result as a candidate character string. The apparatus of the invention comprises: a word string includes a word hierarchy and for recognizing each of the words within the hierarchy; a character transition probability table a4 storing probabilities of transitions from any one character to another, and those pieces of the word identification information which correspond to combinations of characters resulting from the transitions; and an optimization unit for using the character transition probability table in optimizing candidate character strings obtained by a recognition unit. The word dictionary is searched for a word defined by the word identification information which corresponds to the optimized candidate character string, whereby the searched word is retrieved which applies to the hierarchy information and which has yet to be input.
摘要翻译：一种字符识别装置，用于仅从用户输入的手写关键词中推断出整个字符串，并将推测的结果显示为候选字符串。本发明的装置包括：字串包括字层级，并用于识别每个字在层次结构中存储从任何一个字符到另一个字符的转换概率的字符转换概率表a4，以及对应于由转换产生的字符的组合的那些字识别信息; 以及优化单元，用于在通过识别单元获得的优化候选字符串中使用字符转换概率表。搜索单词词典由对应于优化的候选字符串的单词识别信息定义的单词，由此检索适用于层级信息并且尚未被输入的搜索词。

84. 发明授权

US06697070B1 Graphic processing system 失效
标题翻译：图形处理系统
公开(公告)号：US06697070B1
公开(公告)日：2004-02-24
申请号：US09454590
申请日：1999-12-07
申请人： Koyo Katsura , Shigeru Matsuo , Shigeaki Yoshida , Hiroshi Takeda , Hisashi Kaziwara
发明人： Koyo Katsura , Shigeru Matsuo , Shigeaki Yoshida , Hiroshi Takeda , Hisashi Kaziwara
IPC分类号： G06T1100
CPC分类号： G09G5/26 , G09G5/393
摘要： A graphic processing system has a processor for managing a display area and a character font area both include within an are disposed in the address space. From coded information indicative of a character transferred through a data bus of the system, the processor generates an address at which a character font pattern of the corresponding character has been stored and transfers that character font pattern to a predetermined position on the display area. The graphic processing system realizes high speed development of fonts.
摘要翻译：图形处理系统具有用于管理显示区域的处理器和包括在地址空间内的字符字体区域。从指示通过系统的数据总线传送的字符的编码信息中，处理器生成相应字符的字符字体图案已被存储的地址，并将该字符字体图案转移到显示区域上的预定位置。图形处理系统实现了字体的高速发展。

85. 发明授权

US06377267B1 Graphic processing apparatus and method 失效
标题翻译：图形处理装置及方法
公开(公告)号：US06377267B1
公开(公告)日：2002-04-23
申请号：US09593496
申请日：2000-06-14
申请人： Koyo Katsura , Yasushi Fukunaga , Ryo Fujita , Kazuyoshi Koga , Takehiko Nishida
发明人： Koyo Katsura , Yasushi Fukunaga , Ryo Fujita , Kazuyoshi Koga , Takehiko Nishida
IPC分类号： G06F1300
CPC分类号： G06F3/14 , G09G5/001 , G09G5/363 , G09G5/39 , G09G5/393 , G09G2360/127
摘要： A graphic processing apparatus for generating, displaying or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and data in different column addresses within the designated same row address are successively accessed and buffer means for buffering a series of data between an access by a processor and an access to a memory is provided. A program and image information for display are stored in a main memory. A frame buffer and the main memory are integrally configured simply and small in size.
摘要翻译：一种用于生成，显示或打印字符和图形数据的图形处理装置。使用连续的列访问，其中指定行地址用于访问存储器，并且连续地访问指定的相同行地址内的不同列地址中的数据，以及缓冲装置，用于在处理器的访问和提供对内存的访问。用于显示的程序和图像信息存储在主存储器中。帧缓冲器和主存储器的整体结构简单，体积小。

86. 发明授权

US06222563B1 Graphic processing apparatus and method 失效
标题翻译：图形处理装置及方法
公开(公告)号：US06222563B1
公开(公告)日：2001-04-24
申请号：US09327355
申请日：1999-06-08
申请人： Koyo Katsura , Yasushi Fukunaga , Ryo Fujita , Kazuyoshi Koga , Takehiko Nishida
发明人： Koyo Katsura , Yasushi Fukunaga , Ryo Fujita , Kazuyoshi Koga , Takehiko Nishida
IPC分类号： G06F15167
CPC分类号： G06F3/14 , G09G5/001 , G09G5/363 , G09G5/39 , G09G5/393 , G09G2360/127
摘要： A graphic processing apparatus for generating, displaying or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and data in different column addresses within the designated same row address are successively accessed and buffer means for buffering a series of data between an access by a processor and an access to a memory is provided. A program and image information for display are stored in a main memory. A frame buffer and the main memory are integrally configured simply and small in size.
摘要翻译：一种用于生成，显示或打印字符和图形数据的图形处理装置。使用连续的列访问，其中指定行地址用于访问存储器，并且连续地访问指定的相同行地址内的不同列地址中的数据，以及缓冲装置，用于在处理器的访问和提供对内存的访问。用于显示的程序和图像信息存储在主存储器中。帧缓冲器和主存储器的整体结构简单，体积小。

87. 发明授权

US6097841A Apparatus for recognizing input character strings by inference 失效
标题翻译：用于通过推理识别输入字符串的装置
公开(公告)号：US6097841A
公开(公告)日：2000-08-01
申请号：US859410
申请日：1997-05-20
申请人： Keiko Gunji , Koyo Katsura , Soshiro Kuzunuki , Masaki Miura , Toshimi Yokota
发明人： Keiko Gunji , Koyo Katsura , Soshiro Kuzunuki , Masaki Miura , Toshimi Yokota
IPC分类号： G06K9/72
CPC分类号： G06K9/72 , G06K2209/01 , Y10S707/99931 , Y10S707/99933
摘要： A character recognition apparatus for inferring the entire character string solely from a user-input handwritten keyword and displaying the inferred result as a candidate character string. The apparatus of the invention comprises: a word dictionary storing word identification information and hierarchy information for layering a plurality of words into a hierarchy and for recognizing each of the words within the hierarchy; a character transition probability table a4 storing probabilities of transitions from any one character to another, and those pieces of the word identification information which correspond to combinations of characters resulting from the transitions; and an optimization unit for using the character transition probability table in optimizing candidate character strings obtained by a recognition unit. The word dictionary is searched for a word defined by the word identification information which corresponds to the optimized candidate character string, whereby the searched word is retrieved which applies to the hierarchy information and which has yet to be input.
摘要翻译：一种字符识别装置，用于仅从用户输入的手写关键字中推断整个字符串，并将推测的结果显示为候选字符串。本发明的装置包括：存储字识别信息和层级信息的单词字典，用于将多个单词分层为层次结构，并用于识别层次结构内的每个单词; 存储从任何一个字符到另一个字符的转换概率的字符转换概率表a4，以及对应于由转换产生的字符的组合的那些字识别信息; 以及优化单元，用于在通过识别单元获得的优化候选字符串中使用字符转换概率表。搜索单词词典由对应于优化的候选字符串的单词识别信息定义的单词，由此检索适用于层级信息并且尚未被输入的搜索词。

88. 发明授权

US5717440A Graphic processing having apparatus for outputting FIFO vacant information 失效
标题翻译：具有用于输出FIFO空闲信息的装置的图形处理
公开(公告)号：US5717440A
公开(公告)日：1998-02-10
申请号：US355151
申请日：1994-12-06
申请人： Koyo Katsura , Shigeru Matsuo , Jun Sato , Takashi Sone , Yoshikazu Yokota , Masahiko Kikuchi
发明人： Koyo Katsura , Shigeru Matsuo , Jun Sato , Takashi Sone , Yoshikazu Yokota , Masahiko Kikuchi
IPC分类号： G06T1/20 , G06T11/20 , G09G5/02 , G09G5/393 , G09G5/399 , G09G5/00
CPC分类号： G06T11/203 , G06T1/20 , G09G5/024 , G09G5/393 , G09G5/399
摘要： A graphic processing system including a main memory for storing a program and information correspond to pixels, a main processor for effecting an execution processing of a program transferred from the main memory or from an external device so as to control the system, display/output devices such as a CRT device and a printer for outputting graphic information attained by controlling pixels arranged in a plurality of dimensions, a frame buffer for storing information corresponding to pixels outputted to the display/output devices, and a graphic processor for receiving a command and parameter information transferred from the main memory and/or the main processor, for generating character and graphic data in accordance with a predetermined processing procedure and for performing a transfer control including an execution of a drawing processing to transfer generated data through first and second address buses and first and second data buses to the main memory and/or the frame buffer, respectively. The system includes a bus connection switch circuit to be controlled by the graphic processor to effect a connection control between the first and second address buses and between the first and second data buses so as to enable execution of a drawing processing in the main memory connected to a bus on the main processor side and a data transfer between the main memory and the frame buffer.
摘要翻译：包括用于存储程序的主存储器和对应于像素的信息的图形处理系统，用于执行从主存储器或从外部设备传送的程序的执行处理以便控制系统的主处理器，显示/输出设备例如用于输出通过控制以多个维度排列的像素获得的图形信息的CRT设备和打印机，用于存储对应于输出到显示/输出设备的像素的信息的帧缓冲器，以及用于接收命令和参数的图形处理器从主存储器和/或主处理器传送的信息，用于根据预定的处理过程产生字符和图形数据，并且用于执行包括执行绘图处理的传送控制，以通过第一和第二地址总线传送生成的数据;以及呼叫到主存储器和/或帧缓冲器的第一和第二数据总线真诚地该系统包括由图形处理器控制的总线连接开关电路，以实现第一和第二地址总线之间以及第一和第二数据总线之间的连接控制，以便能够执行与主存储器连接的图形处理主处理器侧的总线和主存储器与帧缓冲器之间的数据传输。

89. 发明授权

US5638095A Graphic pattern processing apparatus having a parallel to serial conversion unit 失效
标题翻译：具有并行到串行转换单元的图形处理装置
公开(公告)号：US5638095A
公开(公告)日：1997-06-10
申请号：US430848
申请日：1995-04-28
申请人： Koyo Katsura , Hideo Maejima , Hisashi Kajiwara
发明人： Koyo Katsura , Hideo Maejima , Hisashi Kajiwara
IPC分类号： G06T1/20 , G06T1/60 , G06T11/20 , G06T17/00 , G09G5/02 , G09G5/20 , G09G5/36 , G09G5/39 , G09G5/393 , G09G5/395 , G09G5/399
CPC分类号： G09G5/395 , G06T1/20 , G06T1/60 , G06T11/203 , G06T17/00 , G09G5/024 , G09G5/20 , G09G5/363 , G09G5/39 , G09G5/393 , G09G5/399 , G09G2360/127 , G09G5/36
摘要： A graphic pattern processing apparatus having a display memory, a data processor, a graphic processor, and a plurality of parallel to serial convertors. The display memory stores graphic data in words, each word has a plurality of pixel data and each pixel data has a plurality of bits. A graphic processor accesses the display memory and processes a plurality of the pixel data in response to instructions received from a data processor. The number of parallel to serial convertors corresponds to the number of bits per pixel and are configured to allow a word from the display memory to be converted into a serial stream of pixel data.
摘要翻译：具有显示存储器，数据处理器，图形处理器和多个并行到串行转换器的图形处理装置。显示存储器以单词存储图形数据，每个单词具有多个像素数据，并且每个像素数据具有多个位。图形处理器响应于从数据处理器接收到的指令，访问显示存储器并处理多个像素数据。并行到串行转换器的数量对应于每像素的位数，并且被配置为允许来自显示存储器的字被转换成像素数据的串行流。

90. 发明授权

US5606338A Display control device 失效
标题翻译：显示控制装置
公开(公告)号：US5606338A
公开(公告)日：1997-02-25
申请号：US309411
申请日：1994-09-20
申请人： Hiroshi Takeda , Shigeaki Yoshida , Koyo Katsura
发明人： Hiroshi Takeda , Shigeaki Yoshida , Koyo Katsura
IPC分类号： G09G5/18 , G09G5/12 , G09G1/08
CPC分类号： G09G5/12
摘要： A CRT (cathode ray tube) controller for controlling one CRT device in an interlace mode has a synchronizing circuit of bi-directional construction, in order to make possible synchronous operation of the CRT controller with other circuits (other CRT controllers or a TV system). When the CRTC is used as a master circuit of a CRT display system, a synchronizing signal is derived from the synchronizing circuit in synchronization with a count signal of a vertical scanning counter and an output of an interlace controller of the CRTC, and is supplied to a synchronizing terminal of the other CRTCs. Scanning counters and a flip-flop for controlling an interlace operation of the other CRTCs are reset to their initial state in synchronization with the synchronizing signal. When the CRTC is used as a slave circuit, scanning counters and a flip-flop of the CRTC are reset to their initial state in synchronization with the external synchronizing signal.
摘要翻译：用于以隔行模式控制一个CRT器件的CRT（阴极射线管）控制器具有双向结构的同步电路，以便使CRT控制器与其他电路（其它CRT控制器或TV系统）可以同步操作，。当CRTC用作CRT显示系统的主电路时，与垂直扫描计数器的计数信号和CRTC的隔行控制器的输出同步地从同步电路导出同步信号，并将其提供给其他CRTC的同步终端。用于控制其他CRTC的隔行扫描的扫描计数器和触发器与同步信号同步地被复位到其初始状态。当CRTC用作从电路时，与外部同步信号同步，将扫描计数器和CRTC的触发器复位到初始状态。

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