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71. 发明申请

US20040257119A1 Signal detection apparatus, signal detection method, signal transmission system, and computer readable program to execute signal transmission 有权
标题翻译：信号检测装置，信号检测方法，信号传输系统以及执行信号传输的计算机可读程序
公开(公告)号：US20040257119A1
公开(公告)日：2004-12-23
申请号：US10896967
申请日：2004-07-23
申请人： Fujitsu Limited
发明人： Hideaki Watanabe , Hiroko Haraguchi
IPC分类号： H03F003/45
CPC分类号： H04L25/0286 , H03F3/45237 , H03F2203/45466 , H03K5/08 , H03K5/19 , H03K5/2481 , H04L25/0272
摘要： In a differential output signal circuit suitable for restraining voltage overshooting/undershooting at differential output terminals due to lags in input signals and realizing stable and fast switching of differential input signals, a first differential pair of PMOS. transistors connected to a first current source and a second differential pair of NMOS transistors connected to a second current source are mutually connected at the differential output terminals, and a capacitor is connected between the connection nodes of the respective differential pairs and current sources. A transitional current path of the capacitor restrains voltage variations during differential input signal switching. Further in a signal detection apparatus suitable for realizing the detection of fast transmitted differential input signals with less current consumption and at low cost, an edge detect signal is supplied against a differential input of or above a prescribed value, and a setting signal is issued when this edge detect signal has been detected a prescribed number of times during a first prescribed length of time while a resetting signal is issued if none is detected during a second prescribed length of time. A signal-detect signal is generated from these setting signal and resetting signal.
摘要翻译：在差分输出信号电路中，由于输入信号的滞后而导致差分输出端子上的电压过冲/欠压，从而实现差分输入信号的稳定和快速切换，即PMOS的第一个差分对。连接到第一电流源的晶体管和连接到第二电流源的NMOS晶体管的第二差分对在差分输出端子处相互连接，并且电容器连接在各个差分对和电流源的连接节点之间。电容器的过渡电流路径抑制差分输入信号切换期间的电压变化。此外，在适于实现具有较少电流消耗和低成本的快速传输的差分输入信号的检测的信号检测装置中，针对规定值的或高于规定值的差分输入提供边缘检测信号，并且当如果在第二规定时间长度内没有检测到复位信号，则在第一规定时间长度内已经检测到该边缘检测信号规定次数。从这些设定信号和复位信号产生信号检测信号。

72. 发明申请

US20040124919A1 Method and system for implementing autonomous automatic gain control in a low noise broadband distribution amplifier 失效
标题翻译：在低噪声宽带分配放大器中实现自主自动增益控制的方法和系统
公开(公告)号：US20040124919A1
公开(公告)日：2004-07-01
申请号：US10658837
申请日：2003-09-10
申请人： Broadcom Corporation
发明人： Adel Fanous , Leonard Dauphinee , Lawrence M. Burns , Donald McMullin
IPC分类号： H03F003/68
CPC分类号： H03F3/45183 , H03F3/45201 , H03F3/45475 , H03F2200/294 , H03F2200/372 , H03F2203/45302 , H03F2203/45311 , H03F2203/45464 , H03F2203/45466 , H03F2203/45638 , H03F2203/45696 , H03G1/0029 , H03G3/3036 , H03G3/3052
摘要： Provided is a system for implementing gain control in an amplification module comprising a first stage amplifier having a number of first stage input and output ports. The first stage amplifier is configured to provide first stage amplification to a received input signal and produce from the amplified input signal a number of output signals. Also included are a number of second stage amplifiers, each having second stage input and output ports, the second stage input ports being respectively coupled to the first stage output ports and being configured to receive the number of output signals. A gain control device is coupled to at least one from the group including the first stage input ports, the first stage output ports, and the second stage output ports. The gain control device is also configured to control a gain of at least one of the first stage amplifier and one or more of the number of second stage amplifiers.
摘要翻译：提供了一种用于在放大模块中实现增益控制的系统，其包括具有多个第一级输入和输出端口的第一级放大器。第一级放大器被配置为向接收的输入信号提供第一级放大，并且从放大的输入信号产生多个输出信号。还包括多个第二级放大器，每个具有第二级输入和输出端口，第二级输入端口分别耦合到第一级输出端口并且被配置为接收多个输出信号。增益控制装置耦合到包括第一级输入端口，第一级输出端口和第二级输出端口的组中的至少一个。增益控制装置还被配置为控制第一级放大器和多个第二级放大器中的至少一个的增益。

73. 发明授权

US06614304B2 Variable gain circuit having external controls and a low supply voltage 有权
标题翻译：具有外部控制和低电源电压的可变增益电路
公开(公告)号：US06614304B2
公开(公告)日：2003-09-02
申请号：US10035241
申请日：2002-01-04
申请人： Norio Shoji , Tatsuya Shirakawa
发明人： Norio Shoji , Tatsuya Shirakawa
IPC分类号： H03F345
CPC分类号： H03G1/0023 , H03F3/45098 , H03F3/45103 , H03F2203/45466 , H03F2203/45471 , H03F2203/45472 , H03F2203/45702
摘要： The present invention relates to a variable gain circuit including: a first transistor and a second transistor each having a control electrode connected to a circuit input terminal; a load connected between a first power supply and a first electrode of at least one of the first transistor and the second transistor; a third transistor and a fourth transistor having second electrodes connected to the first transistor and the second transistor, respectively, and each having a first electrode and a control electrode connected to each other; a first variable current source connected between a second power supply and the second electrodes of the first transistor and the third transistor and having a current value variable according to an external control signal; a second variable current source connected between the second power supply and the second electrodes of the second transistor and the fourth transistor and having a current value variable according to the control signal; a current source connected between the first power supply and a node of the first electrodes and the control electrodes of the third transistor and the fourth transistor; and an impedance component having one end connected to the first electrodes and the control electrodes of the third transistor and the fourth transistor.
摘要翻译：本发明涉及一种可变增益电路，包括：第一晶体管和第二晶体管，每个具有连接到电路输入端的控制电极; 连接在所述第一晶体管和所述第二晶体管中的至少一个的第一电源和第一电极之间的负载; 第三晶体管和第四晶体管，其具有分别连接到第一晶体管和第二晶体管的第二电极，并且每个具有彼此连接的第一电极和控制电极; 连接在第二电源和第一晶体管和第三晶体管的第二电极之间并具有根据外部控制信号而变化的电流值的第一可变电流源; 第二可变电流源，连接在第二电源和第二晶体管的第二电极和第四晶体管之间，并具有根据控制信号而变化的电流值; 连接在第一电源和第一电极的节点与第三晶体管和第四晶体管的控制电极之间的电流源; 以及阻抗分量，其一端连接到第三晶体管和第四晶体管的第一电极和控制电极。

74. 发明授权

US06586996B2 Method and system for producing a drive signal for a current steering amplifier 有权
标题翻译：用于产生用于当前转向放大器的驱动信号的方法和系统
公开(公告)号：US06586996B2
公开(公告)日：2003-07-01
申请号：US10214091
申请日：2002-08-08
申请人： Adel Fanous , Leonard Dauphinee , Lawrence M. Burns , Donald McMullin
发明人： Adel Fanous , Leonard Dauphinee , Lawrence M. Burns , Donald McMullin
IPC分类号： H03F345
CPC分类号： H03F3/45183 , H03F3/45201 , H03F3/45475 , H03F2200/294 , H03F2200/372 , H03F2203/45302 , H03F2203/45311 , H03F2203/45464 , H03F2203/45466 , H03F2203/45638 , H03F2203/45696 , H03G1/0029 , H03G3/3036 , H03G3/3052
摘要： Provided is a method and system for producing a drive signal for a current steering amplifier. An exemplary method comprises receiving a supply voltage signal and a differential input signal as a circuit input. A differential amplifier drive signal is produced in response to the received supply voltage signal, the received differential input signal, and the received differential control signal. The received differential input signal is adjusted to a value where magnitudes of negative and positive components of the differential control signal become equal to one another and are within a predetermined amount of a magnitude of the supply voltage signal.
摘要翻译：提供了一种用于产生用于当前转向放大器的驱动信号的方法和系统。一种示例性方法包括接收电源电压信号和差分输入信号作为电路输入。响应于所接收的电源电压信号，接收的差分输入信号和接收的差分控制信号产生差分放大器驱动信号。接收到的差分输入信号被调整为差分控制信号的负分量和正分量的大小变得彼此相等并且在电源电压信号的大小的预定量内的值。

75. 发明授权

US06566951B1 Low voltage variable gain amplifier having constant common mode DC output 有权
标题翻译：具有恒定共模直流输出的低电压可变增益放大器
公开(公告)号：US06566951B1
公开(公告)日：2003-05-20
申请号：US10033354
申请日：2001-10-25
申请人： Brian E. Merrigan , Asad Ali
发明人： Brian E. Merrigan , Asad Ali
IPC分类号： H03F345
CPC分类号： H03F3/45726 , H03F3/45183 , H03F2203/45466 , H03F2203/45574 , H03F2203/45658 , H03F2203/45666
摘要： A variable gain amplifier includes a differential transconductor, a differential gain stage, a DC compensation circuit and first and second load resistors. The differential transconductor has first and second differential voltage signal inputs and first and second differential current outputs. The differential gain stage selectively steers current from the first and second differential current outputs to first and second variable current outputs, respectively, and to first and second compensation current outputs, respectively, based on a differential gain control input. The first and second load resistors are coupled to the first and second variable current outputs, respectively. The DC compensation circuit combines current in the first and second compensation current outputs to form a DC compensation current and couples the DC compensation current to the first and second load resistors.
摘要翻译：可变增益放大器包括差分跨导器，差分增益级，直流补偿电路以及第一和第二负载电阻器。差分跨导体具有第一和第二差分电压信号输入以及第一和第二差分电流输出。差分增益级分别基于差分增益控制输入选择性地将电流从第一和第二差分电流输出分别引导到第一和第二可变电流输出以及第一和第二补偿电流输出。第一和第二负载电阻分别耦合到第一和第二可变电流输出。 DC补偿电路组合第一和第二补偿电流输出中的电流，以形成直流补偿电流，并将直流补偿电流耦合到第一和第二负载电阻。

76. 发明申请

US20020130718A1 Variable gain circuit 有权
标题翻译：可变增益电路
公开(公告)号：US20020130718A1
公开(公告)日：2002-09-19
申请号：US10035241
申请日：2002-01-04
发明人： Norio Shoji , Tatsuya Shirakawa
IPC分类号： H03F003/45
CPC分类号： H03G1/0023 , H03F3/45098 , H03F3/45103 , H03F2203/45466 , H03F2203/45471 , H03F2203/45472 , H03F2203/45702
摘要： The present invention relates to a variable gain circuit including: a first transistor and a second transistor each having a control electrode connected to a circuit input terminal; a load connected between a first power supply and a first electrode of at least one of the first transistor and the second transistor; a third transistor and a fourth transistor having second electrodes connected to the first transistor and the second transistor, respectively, and each having a first electrode and a control electrode connected to each other; a first variable current source connected between a second power supply and the second electrodes of the first transistor and the third transistor, and having a current value variable according to an external control signal; a second variable current source connected between the second power supply and the second electrodes of the second transistor and the fourth transistor, and having a current value variable according to the control signal; a current source connected between the first power supply and a node of the first electrodes and the control electrodes of the third transistor and the fourth transistor; and an impedance component having one end connected to the first electrodes and the control electrodes of the third transistor and the fourth transistor.
摘要翻译：本发明涉及一种可变增益电路，包括：第一晶体管和第二晶体管，每个具有连接到电路输入端的控制电极; 连接在所述第一晶体管和所述第二晶体管中的至少一个的第一电源和第一电极之间的负载; 第三晶体管和第四晶体管，其具有分别连接到第一晶体管和第二晶体管的第二电极，并且每个具有彼此连接的第一电极和控制电极; 连接在第二电源和第一晶体管和第三晶体管的第二电极之间的第一可变电流源，并且具有根据外部控制信号而变化的电流值; 连接在第二电源和第二晶体管和第四晶体管的第二电极之间的第二可变电流源，并且具有根据控制信号而变化的电流值; 连接在第一电源和第一电极的节点与第三晶体管和第四晶体管的控制电极之间的电流源; 以及阻抗分量，其一端连接到第三晶体管和第四晶体管的第一电极和控制电极。

77. 发明授权

US5909136A Quarter-square multiplier based on the dynamic bias current technique 失效
标题翻译：基于动态偏置电流技术的四分之一平方乘法器
公开(公告)号：US5909136A
公开(公告)日：1999-06-01
申请号：US928452
申请日：1997-09-12
申请人： Katsuji Kimura
发明人： Katsuji Kimura
IPC分类号： G06G7/16 , G06G7/163 , G06G7/164 , H03F3/45
CPC分类号： G06G7/164 , H03F3/45085 , H03F3/45183 , H03F3/4521 , H03F2203/45112 , H03F2203/45366 , H03F2203/45454 , H03F2203/45466 , H03F2203/45471 , H03F2203/45574 , H03F2203/45656
摘要： A four-quadrant multiplier which is constructed from two squaring circuits using the quarter-square technique and is suitable for an integrated circuit (IC) or a large-scale integrated circuit (LSI). Each of the squaring circuits has a pair of differential input terminals, an output terminal and two differential pairs. Each of differential pairs is composed of first and second transistors whose sources or emitters are connected in common, receives a differential input voltage impressed between the differential input terminals. In each differential pair, a constant current source of a predetermined current value and an dynamic bias current source are inserted in parallel between the common sources or the common emitters and the grounding point. The dynamic bias current source is realized by a current mirror circuit which outputs current equal to the drain current or the collector current of the second transistor. Therefore, the tail current of each differential pair is current given by the sum of the output current of the second transistor and the predetermined constant current. The output current of each squaring circuit is represented by the sum of the drain currents or the collector currents of the second transistors of both of the differential pairs.
摘要翻译：一个四象限乘法器，它由使用四分之一平方法的两个平方电路构成，适用于集成电路（IC）或大规模集成电路（LSI）。每个平方电路具有一对差分输入端子，输出端子和两个差分对。每个差分对由其源极或发射极共同连接的第一和第二晶体管组成，接收在差分输入端子之间施加的差分输入电压。在每个差分对中，将预定电流值的恒定电流源和动态偏置电流源并联插入到公共源或公共发射器和接地点之间。动态偏置电流源由电流镜电路实现，电流镜电路输出等于第二晶体管的漏极电流或集电极电流的电流。因此，每个差分对的尾电流是由第二晶体管的输出电流和预定恒定电流之和给出的电流。每个平方电路的输出电流由两个差分对的第二晶体管的漏极电流或集电极电流之和表示。

78. 发明授权

US5872483A Hyperbolic sine and cosine functional circuits, squaring circuit, and OTA consisting of two differential circuits with a dynamic bias current 失效
标题翻译：双曲正弦和余弦功能电路，平方电路和由具有动态偏置电流的两个差分电路组成的OTA
公开(公告)号：US5872483A
公开(公告)日：1999-02-16
申请号：US669855
申请日：1996-06-26
申请人： Katsuji Kimura
发明人： Katsuji Kimura
IPC分类号： G06G7/20 , G06G7/24 , H03F3/45 , G06G7/26
CPC分类号： H03F3/4508 , G06G7/20 , G06G7/24 , H03F3/45071 , H03F3/45076 , H03F3/45085 , H03F3/45179 , H03F3/45183 , H03F2203/45112 , H03F2203/45454 , H03F2203/45466 , H03F2203/45471 , H03F2203/45476 , H03F2203/45574
摘要： In a differential circuit including first and second transistors, a constant current circuit causes a constant current to flow through the first transistor. A variable current circuit causes a variable current to flow through the second transistor. A differential input voltage is given to drive the first and the second transistors and to produce an output signal in the form of an output current which may be either a differential output current across two output electrodes or a variable output current flowing through an output electrode. Each of the first and the second transistors may be bipolar transistors or MOSFET's. A relationship between the differential input voltage and the output signal is specified by a peculiar characteristic dependent on the bipolar transistors or the MOSFET's. Therefore, the differential circuit may be incorporated in an LSI circuit.
摘要翻译：在包括第一和第二晶体管的差分电路中，恒流电路使恒定电流流过第一晶体管。可变电流电路使可变电流流过第二晶体管。给出差分输入电压以驱动第一和第二晶体管并产生输出电流形式的输出信号，该输出电流可以是两个输出电极之间的差分输出电流或流过输出电极的可变输出电流。第一和第二晶体管中的每一个可以是双极晶体管或MOSFET。差分输入电压和输出信号之间的关系由取决于双极晶体管或MOSFET的特殊特性来指定。因此，可以将差分电路并入LSI电路。

79. 发明授权

US5783970A Driver for N-channel VFET output stage of power amplifier 失效
标题翻译：驱动器用于功率放大器的N沟道VFET输出级
公开(公告)号：US5783970A
公开(公告)日：1998-07-21
申请号：US738412
申请日：1996-10-25
申请人： Joseph J. Pleitz
发明人： Joseph J. Pleitz
IPC分类号： H03F1/52 , H03F3/30 , H03F3/45 , H03F3/26
CPC分类号： H03F1/52 , H03F1/523 , H03F3/3001 , H03F3/4508 , H03F3/45085 , H03F3/45502 , H03F3/45511 , H03F2200/153 , H03F2200/516 , H03F2203/45178 , H03F2203/45188 , H03F2203/45274 , H03F2203/45406 , H03F2203/45466 , H03F2203/45526 , H03F2203/45642 , H03F2203/45648 , H03F2203/45652 , H03F2203/45696 , H03F2203/45708
摘要： An input driver stage for an audio power amplifier wherein the amplifier incorporates only N-channel VFETs in the output stage, the invention locks the currents in second stage (via a closed loop) which is directly connected to the VFET output stage thus allowing precise open loop predictive temperature compensated programming of the quiescent operating point of the VFET output stage into an acceptable linear area of operation--without fettering the amplifiers inherent straight forwardness of implementation or the amplifiers excellent signal amplification characteristics.
摘要翻译：用于音频功率放大器的输入驱动级，其中放大器在输出级仅包含N沟道VFET，本发明将电流锁定在第二级（经由闭环），其直接连接到VFET输出级，从而允许精确的开路 VFET输出级的静态工作点的环路预测温度补偿编程成可接受的线性操作区域，而不会使放大器固有直接执行或放大器优异的信号放大特性。

80. 发明授权

US5631608A Driver for N-channel VFET output stage of power amplifier 失效
标题翻译：驱动器用于功率放大器的N沟道VFET输出级
公开(公告)号：US5631608A
公开(公告)日：1997-05-20
申请号：US506412
申请日：1995-07-24
申请人： John J. Pleitz
发明人： John J. Pleitz
IPC分类号： H03F1/52 , H03F3/30 , H03F3/45 , H03F3/26
CPC分类号： H03F3/4508 , H03F1/52 , H03F1/523 , H03F3/3001 , H03F3/45085 , H03F3/45502 , H03F3/45511 , H03F2200/153 , H03F2200/516 , H03F2203/45178 , H03F2203/45188 , H03F2203/45274 , H03F2203/45406 , H03F2203/45466 , H03F2203/45526 , H03F2203/45642 , H03F2203/45648 , H03F2203/45652 , H03F2203/45696 , H03F2203/45708
摘要： An input driver stage for an audio power amplifier wherein the amplifier incorporates only N-channel VFETs in the output stage, the invention locks the currents in second stage (via a closed loop) which is directly connected to the VFET output stage thus allowing precise open loop predictive temperature compensated programming of the quiescent operating point of the VFET output stage into an acceptable linear area of operation--without fettering the amplifiers inherent straight forwardness OF implementation or the amplifiers excellent signal amplification characteristics.
摘要翻译：用于音频功率放大器的输入驱动级，其中放大器在输出级仅包含N沟道VFET，本发明将电流锁定在第二级（经由闭环），其直接连接到VFET输出级，从而允许精确的开路 VFET输出级的静态工作点的环路预测温度补偿编程成可接受的线性操作区域，而不会使放大器固有的直接执行或放大器具有优异的信号放大特性。

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