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    • 71. 发明申请
    • LEAK INSPECTION DEVICE AND LEAK INSPECTION METHOD
    • 泄漏检测装置和泄漏检测方法
    • US20130186182A1
    • 2013-07-25
    • US13876744
    • 2011-09-27
    • Tetsuya Yamaguchi
    • Tetsuya Yamaguchi
    • G01M3/26
    • G01M3/26G01M3/3263
    • A leak inspection device for inspecting leaks from a work by sealing a gas inside the work or sucking the gas therefrom includes: a depressurizing device that reduces the pressure of the gas inside the work; a pressurizing device that pressurizes the gas inside the work; a temperature sensor that detects the temperature of the work; a pressure sensor that detects the pressure of the gas inside the work; and a controller. The controller calculates the saturation vapor pressure at the same temperature as the temperature of the work, controls the depressurizing device to thereby reduce the pressure of the gas inside the work to the saturation vapor pressure, sucks the water vapor that has vaporized inside the work, controls the pressurizing device to thereby seal the gas inside the work and pressurize the gas inside the work until the temperature of the work detected by the temperature sensor reaches a predetermined temperature.
    • 一种泄漏检查装置,用于通过密封工件内部的气体或从其中吸入气体来检查工件的泄漏,包括:减压装置,其降低工件内部的气体的压力; 对工件内的气体进行加压的加压装置; 检测工件温度的温度传感器; 检测工件内的气体的压力的压力传感器; 和控制器。 控制器在与工件温度相同的温度下计算饱和蒸汽压力,控制减压装置,从而将工件内部气体的压力降低到饱和蒸气压,吸收工件内蒸发的水蒸汽, 控制加压装置,从而密封工件内部的气体并加压工件内部的气体,直到温度传感器检测到的工件的温度达到预定的温度。
    • 72. 发明申请
    • SOLID-STATE IMAGE SENSING DEVICE AND METHOD OF MANUFACTURING THE SAME
    • 固态图像感测装置及其制造方法
    • US20110090383A1
    • 2011-04-21
    • US12877654
    • 2010-09-08
    • Tetsuya Yamaguchi
    • Tetsuya Yamaguchi
    • H04N5/335
    • H01L27/14643H01L27/14632H01L27/1464
    • According to one embodiment, a back side illumination solid-state image sensing device which comprises a pixel region where a plurality of pixels each including a photoelectric converter and a signal scanning circuit are arranged on a semiconductor substrate, and in which a light illumination surface is formed on a substrate surface opposite to a surface of the semiconductor substrate on which the signal scanning circuit is formed, includes a silicon oxide film formed on the semiconductor substrate on the light illumination surface side, a p-type amorphous silicon compound layer formed on the silicon oxide film, and a hole storage layer formed by the p-type amorphous silicon compound layer near an interface between the semiconductor substrate on the light illumination surface side and the silicon oxide film.
    • 根据一个实施例,一种背面照明固态图像感测装置,其包括像素区域,其中包括光电转换器和信号扫描电路的多个像素布置在半导体衬底上,并且其中光照明表面是 形成在与形成有信号扫描电路的半导体衬底的表面相反的衬底表面上,包括在光照射面侧形成在半导体衬底上的氧化硅膜,形成在该衬底表面上的p型非晶硅化合物层 氧化硅膜和由p型非晶硅化合物层在光照射面侧的半导体基板之间的界面附近与氧化硅膜形成的空穴存储层。
    • 75. 发明授权
    • Method of designing wiring structure of semiconductor device and wiring structure designed accordingly
    • 设计相应的半导体器件布线结构和布线结构的方法
    • US07823114B2
    • 2010-10-26
    • US12081431
    • 2008-04-16
    • Naoyuki ShigyoTetsuya Yamaguchi
    • Naoyuki ShigyoTetsuya Yamaguchi
    • G06F17/50H03K19/185H01L25/00H01L23/58H01L23/522
    • H01L23/5222H01L2924/0002H01L2924/00
    • A method of designing a wiring structure of an LSI is capable of reducing a capacitance variation ratio ΔC/C or a resistance-by-capacitance variation ratio Δ(RC)/(RC) of the wiring structure. The method sets a process-originated variation ratio (δP) for the wiring structure, a tolerance (ξC) for the capacitance variation ratio (ΔC/C), and a tolerance (ξRC) for the resistance-by-capacitance variation ratio (Δ(RC)/(RC)), evaluates a fringe capacitance ratio (F=CF/CP) according to a fringe capacitance CF and parallel-plate capacitance CP of the wiring structure, and determines the wiring structure so that the fringe capacitance ratio (F) may satisfy the following: For ⁢ ⁢  Δ ⁢ ⁢ C C  ≤ ξ C , ⁢ F ≥ δ P ξ C - 1 ( 1 ) For ⁢ ⁢  Δ ⁡ ( RC ) RC  ≤ ξ RC , ⁢ F ≤ ( 1 - δ P ) ⁢ δ P δ P - ξ RC - 1 ( 2 ) The method employs an equivalent-variations condition defined as |ΔC/C|=|Δ(RC)/(RC)| to determine the shape parameters of each wire of the wiring structure.
    • 设计LSI的布线结构的方法能够降低布线结构的电容变化率&Dgr; C / C或电容 - 电容变化率&(RC)/(RC)。 该方法设置了布线结构的过程起始变化率(δP),电容变化率(&Dgr; C / C)的公差(&xgr; C)和电阻的公差(&xgr RC) 电容变化率(&Dgr;(RC)/(RC))根据布线结构的边缘电容CF和平行板电容CP评估边缘电容比(F = CF / CP),并确定布线结构 使得条纹电容比(F)可以满足以下条件:ForüüDgr; çC≤&x x C,F≥δP&xgr; C-1(1)For唔&Dgr; ⁡(RC)RC骸≤&xgr RC,F≤(1-δP)δPδP - &xgr; RC-1(2)该方法采用等效变量条件定义为|&Dgr; C / C | = |&Dgr;(RC)/(RC)| 以确定布线结构的每根导线的形状参数。