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    • 72. 发明申请
    • Impact tool
    • 冲击工具
    • US20060086513A1
    • 2006-04-27
    • US11254806
    • 2005-10-21
    • Koichi HashimotoHiroyuki TsubakimotoHisashi Oda
    • Koichi HashimotoHiroyuki TsubakimotoHisashi Oda
    • B25D11/00
    • B25D11/064B25D11/062B25D16/00B25D2250/141B25D2250/371Y10T74/18056
    • An impact tool for simultaneously providing a rotational force and an impact force to an object has an output shaft rotated by a motor, hammer for intermittently providing an impact force to the output shaft, hammer holder for movably holding the hammer, and an impact force generator for generating the impact force from an output of the motor. An air chamber is formed between the hammer and the hammer holder such that a volume of the air chamber is variable in response to a position of the hammer relative to the hammer holder. In addition, the hammer receives a bias force generated in a direction toward the output shaft by a biasing device. This bias force effectively increases the impact force in cooperation with an air pressure caused by a volume change of the air chamber.
    • 用于同时向物体提供旋转力和冲击力的冲击工具具有由马达旋转的输出轴,用于间歇地向输出轴提供冲击力的锤,用于可移动地保持锤的锤保持器和冲击力发生器 用于从电动机的输出产生冲击力。 在锤和锤保持器之间形成空气室,使得空气室的体积响应于锤相对于锤保持器的位置是可变的。 此外,锤子通过偏置装置接收在朝向输出轴的方向上产生的偏压力。 与空气室的体积变化引起的空气压力协调,该偏压力有效地增加冲击力。
    • 73. 发明授权
    • Semiconductor device with self-aligned contact and its manufacture
    • 具有自对准触点的半导体器件及其制造
    • US06936510B2
    • 2005-08-30
    • US10388454
    • 2003-03-17
    • Kazuo ItabashiOsamu TsuboiYuji YokoyamaKenichi InoueKoichi HashimotoWataru Futo
    • Kazuo ItabashiOsamu TsuboiYuji YokoyamaKenichi InoueKoichi HashimotoWataru Futo
    • H01L21/02H01L21/60H01L21/8242H01L27/105H01L27/108H01L27/10
    • H01L27/10852H01L21/76897H01L27/105H01L27/10805H01L27/10817H01L28/91
    • A semiconductor memory device comprising: a first insulating film covering the upper and side surfaces of a gate electrode; a second insulating film formed on the substrate covering the first insulating film; a pair of contact holes formed through the second insulating film and reaching the impurity diffusion regions; a conductive plug embedded in one of the contact holes; a third insulating film formed on the second insulating film covering the conductive plug, and having a first aperture on the other contact hole; a bit line formed on the third insulating film and connected to the other impurity diffusion region through the first aperture and the other contact hole; a fourth insulating film covering the upper and side surfaces of the bit line; a second aperture formed through the third insulating film in alignment with the fourth insulating film covering the side surface of the bit line; a storage electrode formed to extend over the bit line, insulated from the bit line by the third and fourth insulating films, and electrically connected to the conductive plug through the second aperture.
    • 一种半导体存储器件,包括:覆盖栅电极的上表面和侧表面的第一绝缘膜; 形成在覆盖所述第一绝缘膜的所述基板上的第二绝缘膜; 形成在所述第二绝缘膜上并到达所述杂质扩散区的一对接触孔; 嵌入在所述接触孔之一中的导电插塞; 第三绝缘膜,形成在覆盖所述导电插塞的所述第二绝缘膜上,并且在所述另一个接触孔上具有第一孔; 形成在第三绝缘膜上并通过第一孔和另一个接触孔连接到另一个杂质扩散区的位线; 覆盖位线的上表面和侧表面的第四绝缘膜; 与覆盖所述位线的侧面的所述第四绝缘膜对准的通过所述第三绝缘膜形成的第二孔; 存储电极,其形成为在所述位线上延伸,通过所述第三和第四绝缘膜与所述位线绝缘,并且通过所述第二孔电连接到所述导电插塞。
    • 74. 发明授权
    • Hybrid stencil printing apparatus, method for controlling hybrid stencil printing apparatus and computer readable recording medium recording program for the same
    • 混合模版印刷装置,用于控制混合模版印刷装置的方法和用于其的计算机可读记录介质记录程序
    • US06871589B2
    • 2005-03-29
    • US10772342
    • 2004-02-06
    • Koichi Hashimoto
    • Koichi Hashimoto
    • B41J2/01B41L13/04B41L13/06B41F15/10B41M1/12
    • B41L13/06
    • A hybrid stencil printing apparatus comprises: a stencil-making/printing unit configured to perforate a stencil sheet corresponding to a desired image, to wind the stencil sheet around an outer peripheral surface of a print drum, and to transfer a printing medium to the print drum with pressure and the printing medium is printed; an other-method image-formation unit configured to print the printing medium transferred on the same transfer passage as the stencil-making/printing unit according to a different printing method from the stencil-making/printing unit; and an image-formation unit selection-unit configured to input an original digital image, to determine a attributes of each image portion of the inputted original digital image, and to allocate each image portion selectively to the stencil-making/printing unit or the other-method image-formation unit based on the determination result.
    • 混合模版印刷设备包括:模版印刷单元,其被配置为对应于期望图像的孔版纸进行穿孔,将所述蜡纸卷绕在印刷鼓的外周表面上,并将印刷介质转印到所述印刷品上 滚筒压力和打印介质打印; 另一方法图像形成单元,被配置为根据与所述模版/印刷单元不同的打印方法将与所述模版/印刷单元相同的传送通道上传送的打印介质打印; 以及图像形成单元选择单元,被配置为输入原始数字图像,以确定输入的原始数字图像的每个图像部分的属性,并且将每个图像部分选择性地分配给模板制作/打印单元或其他 - 方法图像形成单元。
    • 77. 发明授权
    • Enhanced semiconductor integrated circuit device with a memory array and
a peripheral circuit
    • 具有存储器阵列和外围电路的增强型半导体集成电路器件
    • US5850096A
    • 1998-12-15
    • US394347
    • 1995-02-23
    • Tetsuo IzawaHiroshi GotoKoichi Hashimoto
    • Tetsuo IzawaHiroshi GotoKoichi Hashimoto
    • H01L21/768H01L29/00
    • H01L21/76895
    • A method for fabricating a semiconductor integrated circuit includes the steps of providing a conductor film on a substrate, providing an insulator film on the conductor film to form a layered structure, removing the insulator film selectively from a first part thereof corresponding to a conductor pattern to be formed, while remaining the insulator film on a second part thereof corresponding also to a conductor pattern to be formed, patterning the layered structure to form a conductor pattern defined by side walls, providing a side wall insulation to each of the side walls of the conductor pattern, providing a first local interconnect pattern on the first part of the conductor pattern such that the first local interconnect pattern establishes an electrical connection with the conductor pattern at the first part, and providing a second local interconnect pattern on the second part of the conductor pattern such that the second local interconnect pattern bridges across the conductor pattern at the second part, without establishing electrical connection therewith.
    • 一种制造半导体集成电路的方法包括以下步骤:在基板上提供导体膜,在导体膜上提供绝缘膜以形成层状结构,从对应于导体图案的第一部分选择性地去除绝缘膜, 形成,同时在其第二部分上保留绝缘膜,其也对应于要形成的导体图案,图案化层叠结构以形成由侧壁限定的导体图案,为侧壁的每个侧壁提供侧壁绝缘 在导体图案的第一部分上提供第一局部互连图案,使得第一局部互连图案在第一部分建立与导体图案的电连接,并且在第二部分上提供第二局部互连图案 导体图案,使得第二局部互连图案穿过导体图案 在第二部分,没有建立与其的电连接。