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    • 75. 发明授权
    • High speed emulsions exhibiting superior speed-granularity relationships
    • 表现出优异的速度 - 粒度关系的高速乳液
    • US5612176A
    • 1997-03-18
    • US592251
    • 1996-01-26
    • Lyn M. EshelmanDavid H. LevyPaul J. Madigan
    • Lyn M. EshelmanDavid H. LevyPaul J. Madigan
    • G03C1/005G03C1/09G03C1/29G03C1/035
    • G03C1/0051G03C1/09G03C1/29
    • Spectrally sensitized tabular grain emulsions are disclosed exhibiting increased speeds and speed-granularity relationships superior to those of conventional emulsions of the same average grain sizes. The tabular grains have {111} major faces, contain greater than 70 mole percent bromide and from 0.25 to 10 mole percent iodide, based on silver, exhibit an average aspect ratio of greater than 50 and an average equivalent circular diameter of >10 micrometers, account for greater than 90 percent of total grain projected area, and have latent image forming chemical sensitization sites on their surfaces including epitaxially deposited silver halide protrusions of a face centered cubic rock salt crystal lattice structure forming epitaxial junctions with the tabular grains. The protrusions are restricted to those portions of the tabular grains (a) located nearest peripheral edges of and (b) accounting for less than 50 percent of the {111} major faces of the tabular grains, contain a silver chloride concentration at least 10 mole percent higher than that of the tabular grains, and include a higher iodide concentration than those portions of the tabular grains extending between the {111} major faces and forming epitaxial junctions with the protrusions.
    • 公开了光谱敏化的片状颗粒乳剂,显示出比相同平均粒度的常规乳液的速度和速度 - 粒度关系更好。 片状颗粒具有{111}主面,含有大于70摩尔%的溴化物和0.25至10摩尔%的基于银的碘化物,其平均纵横比大于50,平均当量圆直径> 10微米, 占总颗粒投影面积的90%以上,并且在其表面上具有潜像形成化学致敏位点,包括外延沉积的与片状晶粒外延结构的面心立方岩盐晶格结构的卤化银突起。 突出部分限于位于最近外围边缘的片状颗粒(a)的部分,(b)占片状颗粒的{111}主面的少于50%,含有至少10摩尔的氯化银浓度 并且包括比在{111}主面之间延伸的片状颗粒的部分更高的碘化物浓度,并且形成与突起物的外延结。
    • 76. 发明授权
    • Collapsible keyboard
    • 可折叠键盘
    • US5163765A
    • 1992-11-17
    • US846188
    • 1992-03-04
    • David H. Levy
    • David H. Levy
    • B41J5/12G06F3/02H01H13/702
    • B41J5/12G06F3/0221H01H13/702H01H2223/052H01H2229/046
    • A collapsible keyboard for use with portable personal computers is disclosed. A first preferred embodiment of the present invention comprises a keyboard molded from a conductive, elastomeric material and a collapsible frame/circuit board substrate, the substrate having a plurality of electrical contacts to indicate to the computer when a key is pressed. As the keyboard is formed from an elastic material, it can be compressed into a first, closed position of minimum size to facilitate carrying the computer and to minimize the computer's size. In the keyboard's second, expanded position, each of the molded keys overlies a pair of contacts. When a key is pressed while the keyboard is in this second position, an electrical circuit is formed by the key and the contacts, indicating to the computer both that a key has been pressed and which key has been pressed. In another embodiment of the present invention, two pairs of contacts underlie each key, one pair being used when the keyboard is in its first position and the other pair being used when the keyboard is in its second position.
    • 公开了一种用于便携式个人计算机的可折叠键盘。 本发明的第一优选实施例包括由导电弹性体材料和可折叠框架/电路板基板模制的键盘,所述基板具有多个电触头,以在键被按压时向计算机指示。 由于键盘由弹性材料形成,所以可将其压缩到最小尺寸的第一个闭合位置,以方便携带计算机并使计算机的尺寸最小化。 在键盘的第二个扩展位置,每个模制键都覆盖着一对触点。 当键盘处于该第二位置时按下键时,通过键和触点形成电路,向计算机指示已按下键并按下了哪个键。 在本发明的另一实施例中,两对触点位于每个键的下面,当键盘处于其第一位置时使用一对触点,而当键盘处于其第二位置时使用另一对。
    • 79. 发明申请
    • PATTERNED THIN FILM DIELECTRIC STACK FORMATION
    • 图形薄膜电介质堆积形成
    • US20140065830A1
    • 2014-03-06
    • US13600274
    • 2012-08-31
    • Carolyn R. EllingerDavid H. LevyShelby F. Nelson
    • Carolyn R. EllingerDavid H. LevyShelby F. Nelson
    • H01L21/311
    • H01L21/02348C23C16/04C23C16/45525H01L21/02178H01L21/022H01L21/0228H01L21/02299H01L21/02334H01L21/0234H01L29/4908
    • A method of producing a patterned inorganic thin film dielectric stack includes providing a substrate. A first patterned deposition inhibiting material layer is provided on the substrate. A first inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the first deposition inhibiting material layer is not present using an atomic layer deposition process. The first deposition inhibiting and first inorganic thin film dielectric material layers are simultaneously treated after deposition of the first inorganic thin film dielectric material layer. A second patterned deposition inhibiting material layer is provided on the substrate. A second inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the second deposition inhibiting material layer is not present using an atomic layer deposition process. The first and second inorganic thin film dielectric material layers form a patterned inorganic thin film dielectric stack.
    • 制造图案化无机薄膜电介质叠层的方法包括提供基板。 第一图案化沉积抑制材料层设置在基板上。 使用原子层沉积工艺,在不存在第一沉积抑制材料层的基板的区域上选择性地沉积第一无机薄膜电介质材料层。 在沉积第一无机薄膜电介质材料层之后,同时处理第一沉积抑制和第一无机薄膜电介质材料层。 第二图案化的沉积抑制材料层设置在基板上。 使用原子层沉积工艺,在不存在第二沉积抑制材料层的基板的区域上选择性地沉积第二无机薄膜电介质材料层。 第一和第二无机薄膜电介质材料层形成图案化的无机薄膜电介质叠层。
    • 80. 发明申请
    • HIGH PERFORMANCE THIN FILM TRANSISTOR
    • 高性能薄膜晶体管
    • US20140061649A1
    • 2014-03-06
    • US13600323
    • 2012-08-31
    • Shelby F. NelsonCarolyn R. EllingerDavid H. Levy
    • Shelby F. NelsonCarolyn R. EllingerDavid H. Levy
    • H01L29/786
    • H01L29/4908H01L29/66969H01L29/7869
    • A transistor includes a substrate; a gate including a first electrically conductive layer stack on the substrate; and a first inorganic thin film dielectric layer on the substrate with the first inorganic thin film dielectric layer having a first pattern. A second inorganic thin film dielectric layer, having a second pattern, is in contact with the first inorganic thin film dielectric layer. The first inorganic thin film dielectric layer and the second thin film dielectric layer have the same material composition. A third inorganic thin film dielectric layer has a third pattern. A semiconductor layer is in contact with and has the same pattern as the third inorganic thin film dielectric material layer. A source/drain includes a second electrically conductive layer stack.
    • 晶体管包括衬底; 栅极,包括在所述衬底上的第一导电层堆叠; 以及第一无机薄膜电介质层,其具有第一图案的第一无机薄膜电介质层。 具有第二图案的第二无机薄膜电介质层与第一无机薄膜电介质层接触。 第一无机薄膜电介质层和第二薄膜电介质层具有相同的材料组成。 第三无机薄膜电介质层具有第三图案。 半导体层与第三无机薄膜电介质材料层接触并具有相同的图案。 源极/漏极包括第二导电层堆叠。