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1. 发明授权

US09236509B2 Solar cells with patterned antireflective surfaces 有权
标题翻译：具有图案抗反射表面的太阳能电池
公开(公告)号：US09236509B2
公开(公告)日：2016-01-12
申请号：US14260687
申请日：2014-04-24
申请人： David H. Levy , Daniele Margadonna , Dennis Flood , Wendy G. Ahearn , Richard W. Topel, Jr. , Theodore Zubil
发明人： David H. Levy , Daniele Margadonna , Dennis Flood , Wendy G. Ahearn , Richard W. Topel, Jr. , Theodore Zubil
IPC分类号： H01L21/76 , H01L31/0236 , H01L31/068 , H01L31/18
CPC分类号： H01L31/02363 , H01L31/068 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： Systems and methods for producing nanoscale textured low reflectivity surfaces may be utilized to fabricate solar cells. A substrate may be patterned with a resist prior to an etching process that produces a nanoscale texture on the surface of the substrate. Additionally, the substrate may be subjected to a dopant diffusion process. Prior to dopant diffusion, the substrate may be optionally subjected to liquid phase deposition to deposit a material that allows for patterned doping. The order of the nanoscale texture etching and dopant diffusion may be modified as desired to produce post-nano emitters or pre-nano emitters.
摘要翻译：用于生产纳米级织构的低反射率表面的系统和方法可用于制造太阳能电池。可以在蚀刻工艺之前用抗蚀剂图案化衬底，其在衬底的表面上产生纳米尺度的纹理。此外，可以对衬底进行掺杂剂扩散处理。在掺杂剂扩散之前，衬底可以任选地进行液相沉积以沉积允许图案化掺杂的材料。可以根据需要修改纳米尺度纹理蚀刻和掺杂剂扩散的顺序以产生纳米后发射体或预纳米发射体。

2. 发明授权

US08791023B2 Patterned thin film dielectric layer formation 有权
标题翻译：图案化的薄膜介电层形成
公开(公告)号：US08791023B2
公开(公告)日：2014-07-29
申请号：US13600287
申请日：2012-08-31
申请人： Carolyn R. Ellinger , David H. Levy , Shelby F. Nelson
发明人： Carolyn R. Ellinger , David H. Levy , Shelby F. Nelson
IPC分类号： H01L21/311
CPC分类号： H01L31/1884 , H01L21/02178 , H01L21/022 , H01L21/0228 , H01L21/02301 , H01L21/02315 , H01L21/02565 , H01L21/02573 , H01L21/0262 , H01L21/32 , H01L29/42384 , H01L29/4908 , H01L31/0392 , H01L31/03926 , Y02E10/50
摘要： A method of producing an inorganic thin film dielectric material layer includes providing a substrate. A first inorganic thin film dielectric material layer is deposited on the substrate using an atomic layer deposition process. The first inorganic thin film dielectric material layer is treated after its deposition. A patterned deposition inhibiting material layer is provided on the substrate. A second inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the deposition inhibiting material layer is not present using an atomic layer deposition process.
摘要翻译：无机薄膜电介质材料层的制造方法包括提供基板。使用原子层沉积工艺在衬底上沉积第一无机薄膜电介质材料层。第一种无机薄膜介电材料层在沉积后进行处理。在衬底上设置有图案化的沉积抑制材料层。使用原子层沉积工艺，在不存在沉积抑制材料层的基板的区域上选择性地沉积第二无机薄膜电介质材料层。

3. 发明申请

US20140061795A1 THIN FILM TRANSISTOR INCLUDING IMPROVED SEMICONDUCTOR INTERFACE 审中-公开
标题翻译：薄膜晶体管，包括改进的半导体界面
公开(公告)号：US20140061795A1
公开(公告)日：2014-03-06
申请号：US13600302
申请日：2012-08-31
申请人： David H. Levy , Carolyn R. Ellinger , Shelby F. Nelson
发明人： David H. Levy , Carolyn R. Ellinger , Shelby F. Nelson
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L29/42384 , H01L29/4908
摘要： A transistor includes a substrate; a gate including a first electrically conductive layer stack on the substrate; and a first inorganic thin film dielectric layer on the substrate with the first inorganic thin film dielectric layer having a first pattern. A second inorganic thin film dielectric layer has a second pattern. A semiconductor layer is in contact with and has the same pattern as the second inorganic thin film dielectric material layer. A source/drain includes a second electrically conductive layer stack.
摘要翻译：晶体管包括衬底; 栅极，包括在所述衬底上的第一导电层堆叠; 以及第一无机薄膜电介质层，其具有第一图案的第一无机薄膜电介质层。第二无机薄膜电介质层具有第二图案。半导体层与第二无机薄膜介电材料层接触并具有相同的图案。源极/漏极包括第二导电层堆叠。

4. 发明授权

US08420168B2 Delivery device for deposition 有权
标题翻译：用于沉积的输送装置
公开(公告)号：US08420168B2
公开(公告)日：2013-04-16
申请号：US13466507
申请日：2012-05-08
申请人： Roger S. Kerr , David H. Levy , James T. Murray
发明人： Roger S. Kerr , David H. Levy , James T. Murray
IPC分类号： C23C16/455 , C23F1/00 , H01L21/306 , C23C16/06 , C23C16/22
CPC分类号： B05B1/005 , C23C16/45551 , C23C16/45574 , Y10T29/494 , Y10T29/49432 , Y10T29/49826 , Y10T137/0318 , Y10T137/87249
摘要： A delivery device for thin-film material deposition has at least first, second, and third inlet ports for receiving a common supply for a first, a second and a third gaseous material, respectively. Each of the first, second, and third elongated emissive channels allow gaseous fluid communication with one of corresponding first, second, and third inlet ports. The delivery device can be formed from apertured plates, superposed to define a network of interconnecting supply chambers and directing channels for routing each of the gaseous materials from its corresponding inlet port to a corresponding plurality of elongated emissive channels. The delivery device comprises a diffusing channel formed by a relief pattern between facing plates. Also disclosed is a process for thin film deposition. Finally, more generally, a flow diffuser and a corresponding method of diffusing flow is disclosed.
摘要翻译：用于薄膜材料沉积的递送装置具有至少第一，第二和第三入口端口，用于分别接收用于第一，第二和第三气态材料的共同供应。第一，第二和第三细长发射通道中的每一个允许与对应的第一，第二和第三入口端口之一的气态流体连通。输送装置可以由孔板形成，叠加以形成互连供应室的网络，并且引导通道用于将每个气态材料从其相应的入口端口路由到相应的多个细长的发射通道。输送装置包括由相对板之间的浮雕图案形成的扩散通道。还公开了一种用于薄膜沉积的方法。最后，更一般地，公开了一种流扩散器和相应的扩散流的方法。

5. 发明申请

US20130084681A1 PRODUCING A VERTICAL TRANSISTOR INCLUDING REENTRANT PROFILE 有权
标题翻译：生产垂直晶体管，包括重新配置
公开(公告)号：US20130084681A1
公开(公告)日：2013-04-04
申请号：US13248560
申请日：2011-09-29
申请人： Shelby F. Nelson , David H. Levy , Lee W. Tutt
发明人： Shelby F. Nelson , David H. Levy , Lee W. Tutt
IPC分类号： H01L21/336
CPC分类号： H01L29/78642
摘要： Producing a vertical transistor includes providing a substrate including a gate material layer stack with a reentrant profile. A patterned deposition inhibiting material is deposited over a portion of the gate material layer stack and over a portion of the substrate. An electrically insulating material layer is deposited over a portion of the gate material layer stack and over a portion of the substrate using a selective area deposition process in which the electrically insulating material layer is not deposited over the patterned deposition inhibiting material. A semiconductor material layer is deposited over the electrically insulating material layer.
摘要翻译：制造垂直晶体管包括提供包括具有折入轮廓的栅极材料层叠层的衬底。图案化的沉积抑制材料沉积在栅极材料层堆叠的一部分上并在衬底的一部分上方。使用选择性区域沉积工艺在栅极材料层堆叠的一部分上并在衬底的一部分上沉积电绝缘材料层，其中电绝缘材料层不沉积在图案化的沉积抑制材料上。半导体材料层沉积在电绝缘材料层上。

6. 发明申请

US20120231239A1 INTEGRATED COLOR MASK 有权
标题翻译：集成彩色面膜
公开(公告)号：US20120231239A1
公开(公告)日：2012-09-13
申请号：US13474757
申请日：2012-05-18
申请人： Lyn M. Irving , David H. Levy , Mark E. Irving , Carolyn R. Ellinger
发明人： Lyn M. Irving , David H. Levy , Mark E. Irving , Carolyn R. Ellinger
IPC分类号： B32B3/10 , H01L29/78
CPC分类号： H01L27/1288 , G03F7/2016 , G03F7/2018 , G03F7/40 , H01L27/1214 , H01L27/1225 , H01L29/66765 , H01L29/7869 , Y10T428/24851
摘要： The invention relates to a process for forming a structure comprising providing a support, coating one side of said support with a colored mask, coating a layer photopatternable by visible light, and exposing the layer through the colored mask with visible light to photopattern the layer.
摘要翻译：本发明涉及一种用于形成结构的方法，包括提供支撑体，用彩色掩模涂覆所述支撑体的一侧，涂覆可见光的可见光层，以及通过可见光将层暴露于彩色掩模以对该层进行光图案化。

7. 发明授权

US08153352B2 Multicolored mask process for making display circuitry 有权
标题翻译：用于制作显示电路的多彩蒙版工艺
公开(公告)号：US08153352B2
公开(公告)日：2012-04-10
申请号：US11986088
申请日：2007-11-20
申请人： Lyn M. Irving , David H. Levy , Lan B. Thai
发明人： Lyn M. Irving , David H. Levy , Lan B. Thai
IPC分类号： G03F7/20
CPC分类号： H01L27/1288 , G03F7/2022 , H01L27/1214 , H01L27/1225 , H01L27/3244 , H01L29/66765 , H01L29/7869 , H01L2227/323 , Y10T428/24802
摘要： A process for forming a pixel circuit is disclosed comprising: (a) providing a transparent support; (b) forming a multicolor mask having at least four different color patterns; (c) forming integrated electronic components of the pixel circuit having at least four layers of patterned functional material comprising a first conductor, a dielectric, a semiconductor, and a second conductor each layer of patterned functional material corresponding to the four different color patterns of the multicolor mask. The functional material is patterned using a photopattern corresponding to each color pattern.
摘要翻译：公开了一种用于形成像素电路的工艺，包括：（a）提供透明支撑体; （b）形成具有至少四种不同颜色图案的多色蒙版; （c）形成像素电路的集成电子部件，其具有至少四层图案化的功能材料，其包括第一导体，电介质，半导体和第二导体，每层图案化的功能材料层对应于四个不同颜色图案多色面膜使用对应于每个颜色图案的光图案来对功能材料进行图案化。

8. 发明申请

US20120070942A1 PROCESS FOR FORMING THIN FILM ENCAPSULATION LAYERS 有权
标题翻译：形成薄膜包封层的方法
公开(公告)号：US20120070942A1
公开(公告)日：2012-03-22
申请号：US13303513
申请日：2011-11-23
申请人： Elena A. Fedorovskaya , Michael L. Boroson , David H. Levy , John A. Agostinelli
发明人： Elena A. Fedorovskaya , Michael L. Boroson , David H. Levy , John A. Agostinelli
IPC分类号： H01L21/56
CPC分类号： B05D5/00 , C23C16/403 , C23C16/405 , C23C16/45551 , C23C16/45574 , H01L51/5253
摘要： A thin film environmental barrier encapsulation process includes providing an electronic device on a substrate, a first reactant gaseous material, a second reactant gaseous material, an inert gaseous material; and a delivery head through which the reactant gaseous materials and the inert gaseous material are simultaneously directed toward the electronic device and the substrate. One or more of the reactant gaseous materials and the inert gaseous material flows through the delivery head. The flow of the one or more of the reactant gaseous materials and the inert gaseous material generates a pressure to create a gas fluid bearing that maintains a substantially uniform distance between the delivery head and the substrate. Relative motion between the delivery head and the substrate causes the second reactant gaseous material to react with at least a portion of the electronic device and the substrate that has been treated with the first reactant gaseous material.
摘要翻译：薄膜环境屏障封装方法包括在基底上提供电子器件，第一反应物气态材料，第二反应物气态物质，惰性气态物质; 以及输送头，反应物气体材料和惰性气体材料通过该输送头同时朝向电子装置和基板。一种或多种反应物气态物质和惰性气体物质流过输送头。一种或多种反应物气态物质和惰性气体物质的流动产生压力以产生在输送头和基底之间保持基本均匀距离的气体流体轴承。输送头和基底之间的相对运动导致第二反应物气态物质与已经用第一反应物气态物质处理的电子器件和基底的至少一部分反应。

9. 发明授权

US08094806B2 Input devices and their use 有权
标题翻译：输入设备及其使用
公开(公告)号：US08094806B2
公开(公告)日：2012-01-10
申请号：US11744102
申请日：2007-05-03
申请人： David H. Levy
发明人： David H. Levy
IPC分类号： H04M1/00
CPC分类号： G06F3/044 , G06F3/0235 , G06F3/0237 , H01H13/702 , H01H2209/074 , H01H2215/00 , H01H2215/006 , H01H2217/018 , H01H2217/024 , H01H2217/032 , H01H2217/033 , H01H2217/036 , H01H2221/002 , H01H2225/018 , H01H2231/022 , H01H2239/006
摘要： A touch-sensitive input device has an exposed, continuous surface defining a planar area, and a grid of sense elements coextensive with the area of the exposed surface and responsive to engagement of the exposed surface by an operator to establish a position of said engagement of the exposed surface. The exposed surface varies in elevation across its planar area to form a series of tactile features. The exposed, continuous surface is affixed to the grid of sense elements. An electronic circuit is configured to interpret large-scale capacitance variations of the grid as an intended input from the operator in a region identified by the capacitance variation, and to interpret small-scale capacitance variations of the grid as a position of engagement of the exposed surface by the operator.
摘要翻译：触敏输入设备具有限定平面区域的暴露的连续表面，以及与暴露表面的区域共同延伸的感测元件的网格，并且响应于操作者对暴露表面的接合以建立所述接触的位置暴露的表面。暴露的表面在其平面区域的高度上变化以形成一系列触觉特征。暴露的连续表面贴在感应元件的网格上。电子电路被配置为将电网的大规模电容变化解释为在由电容变化识别的区域中来自操作者的预期输入，并且将电网的小规模电容变化解释为暴露的由操作员表面。

10. 发明授权

US07972898B2 Process for making doped zinc oxide 有权
标题翻译：制造掺杂氧化锌的方法
公开(公告)号：US07972898B2
公开(公告)日：2011-07-05
申请号：US11861455
申请日：2007-09-26
申请人： Peter J. Cowdery-Corvan , David H. Levy , Thomas D. Pawlik , Diane C. Freeman , Shelby F. Nelson
发明人： Peter J. Cowdery-Corvan , David H. Levy , Thomas D. Pawlik , Diane C. Freeman , Shelby F. Nelson
IPC分类号： C22B19/00 , C03C17/245
CPC分类号： H01L21/02576 , B33Y80/00 , C23C16/407 , C23C16/45504 , C23C16/45544 , C23C16/45551 , C23C16/45574 , H01L21/02554 , H01L21/02565 , H01L21/0262
摘要： The present invention relates to a process of making a zinc-oxide-based thin film semiconductor, for use in a transistor, comprising thin film deposition onto a substrate comprising providing a plurality of gaseous materials comprising first, second, and third gaseous materials, wherein the first gaseous material is a zinc-containing volatile material and the second gaseous material is reactive therewith such that when one of the first or second gaseous materials are on the surface of the substrate the other of the first or second gaseous materials will react to deposit a layer of material on the substrate, wherein the third gaseous material is inert and wherein a volatile indium-containing compound is introduced into the first reactive gaseous material or a supplemental gaseous material.
摘要翻译：本发明涉及一种制造用于晶体管的氧化锌基薄膜半导体的方法，其包括在衬底上的薄膜沉积，包括提供多种包含第一，第二和第三气态材料的气态材料，其中第一气体材料是含锌挥发性材料，第二气态材料与其反应，使得当第一或第二气态材料之一位于基材表面上时，第一或第二气态材料中的另一种将反应沉积衬底上的一层材料，其中所述第三气态材料是惰性的，并且其中将挥发性含铟化合物引入到所述第一反应性气态材料或补充气态材料中。

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