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71. 发明授权

US08643065B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08643065B2
公开(公告)日：2014-02-04
申请号：US12919992
申请日：2009-12-11
申请人： Kazuhiro Fujikawa , Hideto Tamaso , Shin Harada , Yasuo Namikawa
发明人： Kazuhiro Fujikawa , Hideto Tamaso , Shin Harada , Yasuo Namikawa
IPC分类号： H01L29/80
CPC分类号： H01L29/66068 , H01L21/0465 , H01L29/1066 , H01L29/1608 , H01L29/8083
摘要： A JFET is a semiconductor device allowing more reliable implementation of the characteristics essentially achievable by employing SiC as a material and includes a wafer having at least an upper surface made of silicon carbide, and a gate contact electrode formed on the upper surface. The wafer includes a first p-type region serving as an ion implantation region formed so as to include the upper surface. The first p-type region includes a base region disposed so as to include the upper surface, and a protruding region. The base region has a width (w1) in the direction along the upper surface greater than a width (w2) of the protruding region. The gate contact electrode is disposed in contact with the first p-type region such that the gate contact electrode is entirely located on the first p-type region as seen in plan view.
摘要翻译： JFET是半导体器件，允许更可靠地实现通过使用SiC作为材料而基本上可实现的特性，并且包括至少由碳化硅制成的上表面的晶片和形成在上表面上的栅极接触电极。晶片包括用作离子注入区域的第一p型区域，其形成为包括上表面。第一p型区域包括设置成包括上表面的基极区域和突出区域。基部区域沿着上表面的方向具有大于突出区域的宽度（w2）的宽度（w1）。栅极接触电极设置成与第一p型区域接触，使得栅极接触电极完全位于第一p型区域上，如平面图所示。

72. 发明申请

US20110127585A1 LATERAL JUNCTION FIELD-EFFECT TRANSISTOR 审中-公开
标题翻译：横向连接场效应晶体管
公开(公告)号：US20110127585A1
公开(公告)日：2011-06-02
申请号：US13056071
申请日：2010-03-26
申请人： Kazuhiro Fujikawa , Shin Harada , Yasuo Namikawa
发明人： Kazuhiro Fujikawa , Shin Harada , Yasuo Namikawa
IPC分类号： H01L29/80
CPC分类号： H01L29/808 , H01L29/063 , H01L29/1066 , H01L29/1608 , H01L29/66068
摘要： A lateral junction field-effect transistor capable of preventing the occurrence of leakage current and realizing a sufficient withstand voltage can be provided. In a lateral JFET according to the present invention, a buffer layer is located on a main surface of a SiC substrate and includes a p-type impurity. A channel layer is located on the buffer layer and includes an n-type impurity having a higher concentration than the concentration of the p-type impurity in the buffer layer. A source region and a drain region are of n-type and formed to be spaced from each other in a surface layer of the channel layer, and a p-type gate region is located in the surface layer of the channel layer and between the source region and the drain region. A barrier region is located in an interface region between the channel layer and the buffer layer and in a region located under the gate region and includes a p-type impurity having a higher concentration than the concentration of the p-type impurity in the buffer layer.
摘要翻译：可以提供能够防止发生漏电流并实现足够的耐压的横向结型场效应晶体管。在根据本发明的横向JFET中，缓冲层位于SiC衬底的主表面上并且包括p型杂质。沟道层位于缓冲层上，并且包括具有比缓冲层中的p型杂质浓度高的浓度的n型杂质。源极区域和漏极区域是n型并且在沟道层的表面层中形成为彼此间隔开，并且p型栅极区域位于沟道层的表面层和源极区域和漏极区域。阻挡区域位于沟道层和缓冲层之间的界面区域中，并位于栅极区域下方的区域中，并且包括具有比缓冲层中的p型杂质浓度高的浓度的p型杂质。

73. 发明申请

US20110229719A1 MANUFACTURING METHOD FOR CRYSTAL, MANUFACTURING APPARATUS FOR CRYSTAL, AND STACKED FILM 审中-公开
标题翻译：晶体制造方法，晶体和堆叠薄膜的制造方法
公开(公告)号：US20110229719A1
公开(公告)日：2011-09-22
申请号：US13048064
申请日：2011-03-15
申请人： Taro NISHIGUCHI , Shin Harada
发明人： Taro NISHIGUCHI , Shin Harada
IPC分类号： C30B23/02 , B32B9/04 , B32B15/04
CPC分类号： C30B29/36 , C30B23/00 , C30B23/025 , Y10T428/30 , Y10T428/31678
摘要： A manufacturing method for a crystal, a manufacturing apparatus for a crystal, and a stacked film capable of growing a high-quality crystal are provided. The manufacturing method for a crystal includes the steps of: preparing a seed crystal having a frontside surface and a backside surface opposite to the frontside surface; forming at least one film selected from the group consisting of a hard carbon film, a diamond film, a tantalum film, and a tantalum carbide film on the backside surface of the seed crystal; and growing the crystal on the frontside surface of the seed crystal.
摘要翻译：提供了一种用于晶体的制造方法，用于晶体的制造装置和能够生长高品质晶体的叠层膜。晶体的制造方法包括以下步骤：制备具有前侧表面和与前侧表面相对的背面的晶种; 在晶种的背面上形成选自硬碳膜，金刚石膜，钽膜和碳化钽膜中的至少一种膜; 并在晶体的前侧表面生长晶体。

74. 发明申请

US20110001144A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110001144A1
公开(公告)日：2011-01-06
申请号：US12919992
申请日：2009-12-11
申请人： Kuzuhiro Fujikawa , Hideto Tamaso , Shin Harada , Yasuo Namikawa
发明人： Kuzuhiro Fujikawa , Hideto Tamaso , Shin Harada , Yasuo Namikawa
IPC分类号： H01L31/0312 , H01L21/337
CPC分类号： H01L29/66068 , H01L21/0465 , H01L29/1066 , H01L29/1608 , H01L29/8083
摘要： A JFET is a semiconductor device allowing more reliable implementation of the characteristics essentially achievable by employing SiC as a material and includes a wafer having at least an upper surface made of silicon carbide, and a gate contact electrode formed on the upper surface. The wafer includes a first p-type region serving as an ion implantation region formed so as to include the upper surface. The first p-type region includes a base region disposed so as to include the upper surface, and a protruding region. The base region has a width (w1) in the direction along the upper surface greater than a width (w2) of the protruding region. The gate contact electrode is disposed in contact with the first p-type region such that the gate contact electrode is entirely located on the first p-type region as seen in plan view.
摘要翻译： JFET是半导体器件，允许更可靠地实现通过使用SiC作为材料而基本上可实现的特性，并且包括至少由碳化硅制成的上表面的晶片和形成在上表面上的栅极接触电极。晶片包括用作离子注入区域的第一p型区域，其形成为包括上表面。第一p型区域包括设置成包括上表面的基极区域和突出区域。基部区域沿着上表面的方向具有大于突出区域的宽度（w2）的宽度（w1）。栅极接触电极设置成与第一p型区域接触，使得栅极接触电极完全位于第一p型区域上，如平面图所示。

75. 发明申请

US20120119225A1 SILICON CARBIDE SUBSTRATE, EPITAXIAL LAYER PROVIDED SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE 审中-公开
标题翻译：硅碳化硅基板，外延层基板，半导体器件及制造碳化硅基板的方法
公开(公告)号：US20120119225A1
公开(公告)日：2012-05-17
申请号：US13322089
申请日：2011-02-21
申请人： Hiromu Shiomi , Hideto Tamaso , Shin Harada , Takashi Tsuno , Yasuo Namikawa
发明人： Hiromu Shiomi , Hideto Tamaso , Shin Harada , Takashi Tsuno , Yasuo Namikawa
IPC分类号： H01L29/24 , H01L21/20
CPC分类号： H01L29/7802 , H01L21/02378 , H01L21/02447 , H01L21/02529 , H01L21/02631 , H01L21/02658 , H01L21/02664 , H01L21/046 , H01L21/0495 , H01L29/04 , H01L29/1608 , H01L29/6606 , H01L29/66068
摘要： The present invention provides a silicon carbide substrate, an epitaxial layer provided substrate, a semiconductor device, and a method for manufacturing the silicon carbide substrate, each of which achieves reduced on-resistance. The silicon carbide substrate is a silicon carbide substrate having a main surface, and includes: a SiC single-crystal substrate formed in at least a portion of the main surface; and a base member disposed to surround the SiC single-crystal substrate. The base member includes a boundary region and a base region. The boundary region is adjacent to the SiC single-crystal substrate in a direction along the main surface, and has a crystal grain boundary therein. The base region is adjacent to the SiC single-crystal substrate in a direction perpendicular to the main surface, and has an impurity concentration higher than that of the SiC single-crystal substrate.
摘要翻译：本发明提供一种碳化硅衬底，提供衬底的外延层，半导体器件和制造碳化硅衬底的方法，其中每一个都实现了降低的导通电阻。碳化硅衬底是具有主表面的碳化硅衬底，并且包括：形成在主表面的至少一部分中的SiC单晶衬底; 以及设置成围绕SiC单晶衬底的基底构件。基部构件包括边界区域和基底区域。边界区域沿着主表面的方向与SiC单晶基板相邻，并且在其中具有晶界。基极区域在与主表面垂直的方向上与SiC单晶衬底相邻，杂质浓度高于SiC单晶衬底。

76. 发明申请

US20100314626A1 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：硅碳化硅半导体器件及其制造方法
公开(公告)号：US20100314626A1
公开(公告)日：2010-12-16
申请号：US12515386
申请日：2007-11-16
申请人： Shin Harada , Takeyoshi Masuda
发明人： Shin Harada , Takeyoshi Masuda
IPC分类号： H01L29/24 , H01L21/20
CPC分类号： H01L29/7813 , H01L21/02378 , H01L21/0243 , H01L21/02433 , H01L21/02529 , H01L21/02639 , H01L21/02658 , H01L29/045 , H01L29/0878 , H01L29/1608 , H01L29/66068
摘要： A silicon carbide semiconductor device having excellent performance characteristics and a method of manufacturing the same are obtained. An extended terrace surface is formed at a surface of an initial growth layer on a 4H—SiC substrate by annealing with the initial growth layer covered with an Si film, and then a new growth layer is epitaxially grown on the initial growth layer. A 3C—SiC portion having a polytype stable at a low temperature is grown on the extended terrace surface, and a 4H—SiC portion is grown on the other region. A trench is formed by selectively removing the 3C—SiC portion with the 4H—SiC portion remaining, and a gate electrode of a UMOSFET is formed in the trench. A channel region of the UMOSFET can be controlled to have a low-order surface, and a silicon carbide semiconductor device having high channel mobility and excellent performance characteristics is obtained.
摘要翻译：获得具有优异性能的碳化硅半导体器件及其制造方法。通过用覆盖有Si膜的初始生长层退火，在4H-SiC衬底上的初始生长层的表面上形成延伸的台面表面，然后在初始生长层上外延生长新的生长层。在延伸的台面上生长具有低温稳定性的3C-SiC部分，在其他区域生长4H-SiC部分。通过选择性地除去具有4H-SiC部分的3C-SiC部分形成沟槽，并且在沟槽中形成UMOSFET的栅电极。可以将UMOSFET的沟道区域控制为具有低阶表面，并且获得具有高沟道迁移率和优异性能特性的碳化硅半导体器件。

77. 发明授权

US08198675B2 Silicon carbide semiconductor device and method of manufacturing the same 失效
标题翻译：碳化硅半导体器件及其制造方法
公开(公告)号：US08198675B2
公开(公告)日：2012-06-12
申请号：US12515386
申请日：2007-11-16
申请人： Shin Harada , Takeyoshi Masuda
发明人： Shin Harada , Takeyoshi Masuda
IPC分类号： H01L29/161
CPC分类号： H01L29/7813 , H01L21/02378 , H01L21/0243 , H01L21/02433 , H01L21/02529 , H01L21/02639 , H01L21/02658 , H01L29/045 , H01L29/0878 , H01L29/1608 , H01L29/66068
摘要： A silicon carbide semiconductor device having excellent performance characteristics and a method of manufacturing the same are obtained. An extended terrace surface is formed at a surface of an initial growth layer on a 4H—SiC substrate by annealing with the initial growth layer covered with an Si film, and then a new growth layer is epitaxially grown on the initial growth layer. A 3C—SiC portion having a polytype stable at a low temperature is grown on the extended terrace surface, and a 4H—SiC portion is grown on the other region. A trench is formed by selectively removing the 3C—SiC portion with the 4H—SiC portion remaining, and a gate electrode of a UMOSFET is formed in the trench. A channel region of the UMOSFET can be controlled to have a low-order surface, and a silicon carbide semiconductor device having high channel mobility and excellent performance characteristics is obtained.
摘要翻译：获得具有优异性能的碳化硅半导体器件及其制造方法。通过用覆盖有Si膜的初始生长层退火，在4H-SiC衬底上的初始生长层的表面上形成延伸的台面表面，然后在初始生长层上外延生长新的生长层。在延伸的台面上生长具有低温稳定性的3C-SiC部分，在其他区域生长4H-SiC部分。通过选择性地除去具有4H-SiC部分的3C-SiC部分形成沟槽，并且在沟槽中形成UMOSFET的栅电极。可以将UMOSFET的沟道区域控制为具有低阶表面，并且获得具有高沟道迁移率和优异性能特性的碳化硅半导体器件。

78. 发明申请

US20100065857A1 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：硅碳化硅半导体器件及其制造方法
公开(公告)号：US20100065857A1
公开(公告)日：2010-03-18
申请号：US12513554
申请日：2007-11-07
申请人： Shin Harada , Takeyoshi Masuda
发明人： Shin Harada , Takeyoshi Masuda
IPC分类号： H01L29/161 , H01L21/04
CPC分类号： H01L29/7802 , H01L21/02378 , H01L21/0243 , H01L21/02433 , H01L21/02529 , H01L21/02639 , H01L21/0445 , H01L21/049 , H01L29/045 , H01L29/0878 , H01L29/1608 , H01L29/66068
摘要： A silicon carbide semiconductor device having excellent performance characteristics and a method of manufacturing the same are obtained. A coating film made of Si is formed on an initial growth layer on a 4H—SiC substrate, and an extended terrace surface is formed in a region covered with the coating film. Next, the coating film is removed, and a new growth layer is epitaxially grown on the initial growth layer. A 3C—SiC portion made of 3C—SiC crystals having a polytype stable at a low temperature is grown on the extended terrace surface of the initial growth layer. A channel region of a MOSFET or the like is provided in the 3C—SiC portion having a narrow band gap. As a result, the channel mobility is improved because of a reduction in an interface state, and a silicon carbide semiconductor device having excellent performance characteristics is obtained.
摘要翻译：获得具有优异性能的碳化硅半导体器件及其制造方法。在4H-SiC基板上的初始生长层上形成由Si制成的涂膜，在被覆膜覆盖的区域中形成延伸的台阶表面。接着，除去涂膜，在初始生长层上外延生长新的生长层。在初始生长层的延伸平台表面上生长由低温下具有多型稳定性的3C-SiC晶体制成的3C-SiC部分。在具有窄带隙的3C-SiC部分中提供MOSFET等的沟道区域。结果，由于接口状态的降低，沟道迁移率得到改善，并且获得了具有优异性能的碳化硅半导体器件。

79. 发明授权

US08138504B2 Silicon carbide semiconductor device and method of manufacturing the same 失效
标题翻译：碳化硅半导体器件及其制造方法
公开(公告)号：US08138504B2
公开(公告)日：2012-03-20
申请号：US12513554
申请日：2007-11-07
申请人： Shin Harada , Takeyoshi Masuda
发明人： Shin Harada , Takeyoshi Masuda
IPC分类号： H01L29/15 , H01L21/20
CPC分类号： H01L29/7802 , H01L21/02378 , H01L21/0243 , H01L21/02433 , H01L21/02529 , H01L21/02639 , H01L21/0445 , H01L21/049 , H01L29/045 , H01L29/0878 , H01L29/1608 , H01L29/66068
摘要： A silicon carbide semiconductor device having excellent performance characteristics and a method of manufacturing the same are obtained. A coating film made of Si is formed on an initial growth layer on a 4H—SiC substrate, and an extended terrace surface is formed in a region covered with the coating film. Next, the coating film is removed, and a new growth layer is epitaxially grown on the initial growth layer. A 3C—SiC portion made of 3C—SiC crystals having a polytype stable at a low temperature is grown on the extended terrace surface of the initial growth layer. A channel region of a MOSFET or the like is provided in the 3C—SiC portion having a narrow band gap. As a result, the channel mobility is improved because of a reduction in an interface state, and a silicon carbide semiconductor device having excellent performance characteristics is obtained.
摘要翻译：获得具有优异性能的碳化硅半导体器件及其制造方法。在4H-SiC基板上的初始生长层上形成由Si制成的涂膜，并且在涂覆膜覆盖的区域中形成延伸的台阶表面。接着，除去涂膜，在初始生长层上外延生长新的生长层。在初始生长层的延伸平台表面上生长由低温下具有多型稳定性的3C-SiC晶体制成的3C-SiC部分。在具有窄带隙的3C-SiC部分中提供MOSFET等的沟道区域。结果，由于接口状态的降低，沟道迁移率得到改善，并且获得了具有优异性能的碳化硅半导体器件。

80. 发明申请

US20120241741A1 SILICON CARBIDE SUBSTRATE 审中-公开
标题翻译：碳化硅基板
公开(公告)号：US20120241741A1
公开(公告)日：2012-09-27
申请号：US13420117
申请日：2012-03-14
申请人： Hiroki INOUE , Shin Harada , Tsutomu Hori , Shinsuke Fujiwara
发明人： Hiroki INOUE , Shin Harada , Tsutomu Hori , Shinsuke Fujiwara
IPC分类号： H01L29/04 , H01L29/24
CPC分类号： C30B29/36 , C30B33/06 , H01L21/187 , H01L29/045 , H01L29/1608 , H01L29/7827
摘要： A first single crystal substrate has a first side surface and it is composed of silicon carbide. A second single crystal substrate has a second side surface opposed to the first side surface and it is composed of silicon carbide. A bonding portion connects the first and second side surfaces to each other between the first and second side surfaces, and it is composed of silicon carbide. At least a part of the bonding portion has polycrystalline structure. Thus, a large-sized silicon carbide substrate allowing manufacturing of a semiconductor device with high yield can be provided.
摘要翻译：第一单晶基板具有第一侧表面，并且由碳化硅构成。第二单晶基板具有与第一侧面相对的第二侧面，由碳化硅构成。接合部分将第一和第二侧表面彼此连接在第一和第二侧表面之间，并且由碳化硅构成。结合部的至少一部分具有多晶结构。因此，可以提供允许以高产率制造半导体器件的大尺寸碳化硅衬底。

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