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71. 发明授权

US4577391A Method of manufacturing CMOS devices 失效
标题翻译：制造CMOS器件的方法
公开(公告)号：US4577391A
公开(公告)日：1986-03-25
申请号：US635371
申请日：1984-07-27
申请人： Steve Hsia , Paul Chang
发明人： Steve Hsia , Paul Chang
IPC分类号： H01L27/092 , H01L21/265 , H01L21/8238 , H01L29/78 , H01L21/32
CPC分类号： H01L21/823864
摘要： A CMOS semiconductor structure having insulation sidewall spacers whose width is selected independently for NMOS and PMOS devices. The width of the spacer is selected to reduce hot electron injection in the N channel device and to insure that the gate and source regions are aligned with or underlap the gate in the P channel device. A narrower spacer is used for the P channel device than for the N channel device which permits the formation of a P channel device having a threshold voltage less than 1 volt.
摘要翻译：具有绝缘侧壁间隔物的CMOS半导体结构，其宽度针对NMOS和PMOS器件独立选择。选择间隔物的宽度以减少N沟道器件中的热电子注入，并确保栅极和源极区域与P沟道器件中的栅极对准或下划线。对于P沟道器件使用较窄的间隔物，而不是N沟道器件，其允许形成阈值电压小于1伏特的P沟道器件。

72. 发明授权

US08949080B2 Methods of designing integrated circuits and systems thereof 有权
标题翻译：设计集成电路的方法及其系统
公开(公告)号：US08949080B2
公开(公告)日：2015-02-03
申请号：US12862991
申请日：2010-08-25
申请人： Kuo-Tsai Li , Paul Chang , Andy Chang
发明人： Kuo-Tsai Li , Paul Chang , Andy Chang
IPC分类号： G06F17/50
CPC分类号： G06F17/5036 , G06F17/5068 , G06F17/5081
摘要： A method of designing an integrated circuit includes performing a pre-layout simulation of the integrated circuit. The pre-layout simulation is performed using a netlist generated from a process design kit (PDK) file. The PDK file includes a plurality of device model cards that are assigned to plurality of devices. The plurality of devices include a first device having at least one parasitic diode that is associated with at least one isolation well, the PDK file including information of the at least one parasitic diode. A design layout of the integrated circuit corresponding to a result of the pre-layout simulation is generated.
摘要翻译：集成电路的设计方法包括执行集成电路的预布局仿真。使用从过程设计工具包（PDK）文件生成的网表执行预布局模拟。 PDK文件包括分配给多个设备的多个设备模型卡。多个器件包括具有至少一个与至少一个隔离阱相关联的寄生二极管的第一器件，该PDK文件包括至少一个寄生二极管的信息。生成对应于预布局仿真结果的集成电路的设计布局。

73. 发明授权

US08513099B2 Epitaxial source/drain contacts self-aligned to gates for deposited FET channels 有权
标题翻译：外延源极/漏极接触件自对准到用于沉积FET通道的栅极
公开(公告)号：US08513099B2
公开(公告)日：2013-08-20
申请号：US12817733
申请日：2010-06-17
申请人： Josephine B. Chang , Paul Chang , Vijay Narayanan , Jeffrey W. Sleight
发明人： Josephine B. Chang , Paul Chang , Vijay Narayanan , Jeffrey W. Sleight
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L51/0545 , B82Y10/00 , H01L27/283 , H01L51/0012 , H01L51/0048 , H01L51/0525
摘要： A method of forming a self-aligned device is provided and includes depositing carbon nanotubes (CNTs) onto a crystalline dielectric substrate, isolating a portion of the crystalline dielectric substrate encompassing a location of the CNTs, forming gate dielectric and gate electrode gate stacks on the CNTs while maintaining a structural integrity thereof and forming epitaxial source and drain regions in contact with portions of the CNTs on the crystalline dielectric substrate that are exposed from the gate dielectric and gate electrode gate stacks.
摘要翻译：提供了一种形成自对准器件的方法，包括将碳纳米管（CNT）沉积到晶体介质衬底上，隔离包含CNT位置的晶体介质衬底的一部分，在栅极电介质层和栅电极栅叠层 CNT同时保持其结构完整性，并且形成外延源极和漏极区域，其与从栅极介电层和栅电极栅极叠层暴露的晶体介质衬底上的CNT的部分接触。

74. 发明申请

US20120227019A1 METHODS AND SYSTEM FOR ANALYSIS AND MANAGEMENT OF PARAMETRIC YIELD 有权
标题翻译：参数化分析与管理方法与系统
公开(公告)号：US20120227019A1
公开(公告)日：2012-09-06
申请号：US13471789
申请日：2012-05-15
申请人： James A. Culp , Paul Chang , Dureseti Chidambarrao , Praveen Elakkumanan , Jason Hibbeler , Anda C. Mocuta
发明人： James A. Culp , Paul Chang , Dureseti Chidambarrao , Praveen Elakkumanan , Jason Hibbeler , Anda C. Mocuta
IPC分类号： G06F17/50
CPC分类号： G01R31/26 , G06F17/5045
摘要： Impact on parametric performance of physical design choices for transistors is scored for on-current and off-current of the transistors. The impact of the design parameters are incorporated into parameters that measure predicted shift in mean on-current and mean off-current and parameters that measure predicted increase in deviations in the distribution of on-current and the off-current. Statistics may be taken at a cell level, a block level, or a chip level to optimize a chip design in a design phase, or to predict changes in parametric yield during manufacturing or after a depressed parametric yield is observed. Further, parametric yield and current level may be predicted region by region and compared with observed thermal emission to pinpoint any anomaly region in a chip to facilitate detection and correction in any mistakes in chip design.
摘要翻译：对晶体管的导通电流和截止电流对晶体管的物理设计选择的参数性能的影响。设计参数的影响被纳入测量平均电流和平均截止电流的预测偏差的参数以及测量导通电流和截止电流分布的偏差预测增加的参数。可以在单元级别，块级或芯片级别进行统计，以在设计阶段优化芯片设计，或者在制造期间或在观察到抑制参数产量之后预测参数产量的变化。此外，可以逐区域地预测参数产量和电流水平，并与观察到的热发射进行比较，以确定芯片中的任何异常区域，以便在芯片设计中的任何错误中进行检测和校正。

75. 发明申请

US20110279075A1 METHOD AND MODULE FOR CONTROLING ROTATION OF A MOTORIZED SPINDLE 有权
标题翻译：用于控制电动旋转的旋转的方法和模块
公开(公告)号：US20110279075A1
公开(公告)日：2011-11-17
申请号：US13194589
申请日：2011-07-29
申请人： Paul Chang , Tsair-Rong Chen , Jeen-Sheen Row , Chin-Sheng Lu
发明人： Paul Chang , Tsair-Rong Chen , Jeen-Sheen Row , Chin-Sheng Lu
IPC分类号： H02P23/04
CPC分类号： H02P23/04
摘要： In a method and module for controlling rotation of a motorized spindle driven by a driving unit, a sensing unit senses vibration of the spindle and generates a voltage signal corresponding to the vibration of the spindle. A processing unit receives the voltage signal from the sensing unit, generates an adjusting ratio equal to a reference voltage corresponding to a predetermined vibration level of the spindle by the voltage signal upon detecting that the voltage signal is greater than the reference voltage and is less than a predetermined threshold voltage that is greater than the reference voltage, and outputs a control signal corresponding to the adjusting ratio to the driving unit such that the driving unit reduces a rotation speed of the spindle by the adjusting ratio in response to the control signal from the processing unit.
摘要翻译：在用于控制由驱动单元驱动的电动主轴的旋转的方法和模块中，感测单元感测主轴的振动并产生对应于主轴的振动的电压信号。处理单元从感测单元接收电压信号，当检测到电压信号大于参考电压时，产生等于与主轴的预定振动水平相对应的参考电压的调整比例，并且小于参考电压大于参考电压的预定阈值电压，并将与调节比相对应的控制信号输出到驱动单元，使得驱动单元响应于来自控制信号的控制信号而减小主轴的转速通过调节比处理单元。

76. 发明申请

US20110097329A1 COMPOSITIONS AND METHODS FOR TREATING CANCER AND MODULATING STRESS GRANULE FORMATION 审中-公开
标题翻译：用于治疗癌症和调节应力颗粒形成的组合物和方法
公开(公告)号：US20110097329A1
公开(公告)日：2011-04-28
申请号：US12822995
申请日：2010-06-24
申请人： Paul Chang , Sejal Vyas , Anthony Leung , Phillip A. Sharp
发明人： Paul Chang , Sejal Vyas , Anthony Leung , Phillip A. Sharp
IPC分类号： A61K39/395 , C12N5/02 , A61P35/00 , C12Q1/48 , C12Q1/68
CPC分类号： C12N15/1137 , A61K31/713 , A61K38/45 , A61K38/47 , A61K39/395 , A61K39/3955 , C07H21/02 , C07K16/40 , C12N15/113 , C12N2310/14 , C12N2320/12 , C12Q1/6886 , G01N33/6893 , G01N2333/91142 , G01N2500/02
摘要： The invention provides methods for treating or decreasing the likelihood of developing a stress-granule related disorder and/or cancer by administering one or more poly-ADP-ribose polymerase (PARP) inhibitors, one or more PARP activators, one or more poly-ADP-ribose glycosylase (PARG) activators, and/or one or more poly-ADP-ribose glycohydrolase ARH3 activators. The invention also provides corresponding methods of decreasing stress granule formation and/or proliferation in a cell or a population of cells. The invention further provides methods of increasing the number of stress granules and proliferation in a cell or a population of cells by administering one or more PARP activators, one or more PARP inhibitors, one or more PARG inhibitors, and/or one or more ARH3 inhibitors. The invention also provides methods for screening for agents for treating or decreasing the likelihood of developing a stress granule-related disorder or cancer, and methods for determining the propensity for developing a stress granule-related disorder or cancer, as well as compositions and kits containing one or more PARP inhibitors, one or more PARP activators, one or more PARG activators, and one or more ARH3 activators.
摘要翻译：本发明提供了通过施用一种或多种聚ADP-核糖聚合酶（PARP）抑制剂，一种或多种PARP激活剂，一种或多种聚ADP来治疗或降低发展应激颗粒相关病症和/或癌症的可能性的方法核糖糖酵解酶（PARG）激活剂和/或一种或多种聚ADP-核糖糖水解酶ARH3激活剂。本发明还提供减少细胞或细胞群体中应激颗粒形成和/或增殖的相应方法。本发明还提供了通过施用一种或多种PARP激活剂，一种或多种PARP抑制剂，一种或多种PARG抑制剂和/或一种或多种ARH3抑制剂来增加细胞或细胞群体中的应激颗粒数量和增殖的方法。本发明还提供筛选用于治疗或降低发展应激颗粒相关病症或癌症的可能性的药剂的方法，以及用于确定发展应激颗粒相关病症或癌症倾向的方法，以及含有一种或多种PARP抑制剂，一种或多种PARP活化剂，一种或多种PARG活化剂和一种或多种ARH3活化剂。

77. 发明授权

US07610472B2 Performing variable and/or bitwise shift operation for a shift instruction that does not provide a variable or bitwise shift option 有权
标题翻译：对不提供可变或位移选项的换档指令执行可变和/或逐位移位操作
公开(公告)号：US07610472B2
公开(公告)日：2009-10-27
申请号：US11422325
申请日：2006-06-05
申请人： Hyeonkuk Jeong , Paul Chang
发明人： Hyeonkuk Jeong , Paul Chang
IPC分类号： G06F9/315
CPC分类号： G06F5/01 , G06F9/30032 , G06F9/3017
摘要： Some embodiments present a method of performing a variable shift operation. This method can be used by a microprocessor that does not allow variable shift operation for certain operand sizes. The method simulates a shift instruction that shifts an operand by a shift count. The method identifies a first shift command and a second shift command. The method computes a mask value. The mask value depends on whether the shift count is less than half of the operand size or greater than or equal to half of the operand size. The method uses the mask value to cause one of the first shift command and the second shift command to produce no shift. In some embodiments, the method allows for the shift count to be specified in bytes or in bits.
摘要翻译：一些实施例提出了执行可变移位操作的方法。该方法可以由微处理器使用，该微处理器不允许某些操作数大小进行可变移位操作。该方法模拟一个将一个操作数移位一个移位计数的移位指令。该方法识别第一移位指令和第二移位指令。该方法计算一个掩码值。掩码值取决于移位计数是否小于操作数大小的一半，或大于或等于操作数大小的一半。该方法使用掩模值使第一移位指令和第二移位指令之一产生无移位。在一些实施例中，该方法允许以字节或位指定移位计数。

78. 发明申请

US20090245961A1 MACHINING APPARATUS 有权
标题翻译：加工设备
公开(公告)号：US20090245961A1
公开(公告)日：2009-10-01
申请号：US12060460
申请日：2008-04-01
申请人： Paul Chang , Tsair-Rong Chen , Jeen-Sheen Row , Yuan-Fu Tsai
发明人： Paul Chang , Tsair-Rong Chen , Jeen-Sheen Row , Yuan-Fu Tsai
IPC分类号： B23C9/00
CPC分类号： B23C1/002 , B23Q1/66 , Y10T409/305264 , Y10T409/308288 , Y10T409/309576
摘要： A machining apparatus includes a support frame, first and second workbenches, and a tool-mounting unit. The support frame includes a first horizontal frame part, and a second horizontal frame part disposed above the first horizontal frame part. The first and second workbenches are mounted slidably on the first horizontal frame part of the support frame, and is slidable relative to the support frame in a first horizontal direction. The tool-mounting unit is mounted slidably on the second horizontal frame part of the support frame, and is slidable relative to the support frame in a second horizontal direction transverse to the first horizontal direction.
摘要翻译：一种加工装置，包括支撑框架，第一和第二工作台以及工具安装单元。支撑框架包括第一水平框架部分和设置在第一水平框架部分上方的第二水平框架部分。第一和第二工作台可滑动地安装在支撑框架的第一水平框架部分上，并且可在第一水平方向上相对于支撑框架滑动。工具安装单元可滑动地安装在支撑框架的第二水平框架部分上，并且能够在横向于第一水平方向的第二水平方向上相对于支撑框架滑动。

79. 发明授权

US07554523B2 Peripheral device for image display apparatus 有权
标题翻译：图像显示装置用外围设备
公开(公告)号：US07554523B2
公开(公告)日：2009-06-30
申请号：US11188809
申请日：2005-07-25
申请人： Paul Chang , Yu-Chi Lin
发明人： Paul Chang , Yu-Chi Lin
IPC分类号： G09G5/00
CPC分类号： G06F1/1616 , G06F1/1686
摘要： The present invention relates to a peripheral device for image display, which comprises a hollow spot for holding the peripheral device, which then comprises a base and a shaft, wherein the shaft was located on the base, of which the shaft and the slot are a hole and shaft assembly case and the shaft maintains its degree of freedom in the slot, wherein the base can not only rotate but also slide. In addition, the base comprises at least one positioning hole and the image display device comprises at least one positioning pin, when the positioning hole is fitted by the positioning pin, the degree of freedom of the rotation is thus restricted. In comparison with prior art, the ease of use is obvious, and the design flexibility is abundant.
摘要翻译：本发明涉及一种用于图像显示的外围设备，其包括用于保持外围设备的中空点，该中空点包括基座和轴，其中轴位于基座上，其中轴和槽是孔和轴组件壳体，并且轴保持其在槽中的自由度，其中基座不仅可旋转而且滑动。此外，基座包括至少一个定位孔，并且图像显示装置包括至少一个定位销，当定位孔由定位销配合时，因此限制了旋转的自由度。与现有技术相比，易用性明显，设计灵活性丰富。

80. 发明申请

US20080136503A1 METHOD AND SYSTEM FOR A PROCESS SENSOR TO COMPENSATE SOC PARAMETERS IN THE PRESENCE OF IC PROCESS MANUFACTURING VARIATIONS 失效
标题翻译：用于在IC工艺制造变化中存在的方法和系统用于补偿SOC参数的过程传感器
公开(公告)号：US20080136503A1
公开(公告)日：2008-06-12
申请号：US11618900
申请日：2006-12-31
申请人： Stephen Chi-Wang Au , Arya Behzad , Paul Chang
发明人： Stephen Chi-Wang Au , Arya Behzad , Paul Chang
IPC分类号： G05F3/02
CPC分类号： H03F3/45475 , H03F2203/45048
摘要： Certain aspects of a method and system for a process sensor to compensate SoC parameters in the presence of IC process manufacturing variations are disclosed. Aspects of one method may include determining an amount of process variation associated with at least one transistor within a single integrated circuit. The determined amount of process variation may be compensated by utilizing a process dependent current, a bandgap current, and a current associated with a present temperature of the transistor. The process dependent current, the bandgap current and the current associated with the present temperature of the transistor may be combined to generate an output current. A voltage generated across a variable resistor may be determined based on the generated output current.
摘要翻译：公开了用于在存在IC工艺制造变化的情况下补偿SoC参数的工艺传感器的方法和系统的某些方面。一种方法的方面可以包括确定与单个集成电路内的至少一个晶体管相关联的工艺变化量。可以通过利用与工艺相关的电流，带隙电流和与晶体管的当前温度相关联的电流来补偿确定的工艺变化量。过程相关电流，带隙电流和与晶体管的当前温度相关联的电流可以被组合以产生输出电流。可以基于产生的输出电流来确定可变电阻器两端产生的电压。

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