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61. 外观设计

USD580420S1 Antenna 有权
公开(公告)号：USD580420S1
公开(公告)日：2008-11-11
申请号：US29317672
申请日：2008-05-05
申请人： Hisashi Takisawa , Toshiaki Aizawa , Junichi Noro , Takao Kato
设计人： Hisashi Takisawa , Toshiaki Aizawa , Junichi Noro , Takao Kato

62. 发明申请

US20070016924A1 Label creating apparatus and label creating program recorded in computer-readable recording medium 有权
标题翻译：记录在计算机可读记录介质中的标签制作装置和标签制作程序
公开(公告)号：US20070016924A1
公开(公告)日：2007-01-18
申请号：US11483492
申请日：2006-07-10
申请人： Minako Ishida , Hideo Ueno , Takao Kato , Naruhito Muto
发明人： Minako Ishida , Hideo Ueno , Takao Kato , Naruhito Muto
IPC分类号： H04N5/445 , H04N5/91
CPC分类号： G11B27/24 , B41J3/4075 , G11B2220/2562 , G11B2220/41 , H04N5/85 , H04N21/4117 , H04N21/42646 , H04N21/4821 , H04N21/84
摘要： For programs selected as those whose label is to be created, a list of available templates is displayed on a arrangement processing screen 200 together with contents of EPG information acquired from an EPG information DB. The EPG information is displayed on a left screen 210 and the templates list is displayed on a right screen 220, so that one template desired to be applied is selected on the right screen 220, according to which template, one or a plurality of the EPG information pieces whose label is desired to be created is selected on the left screen 210. Templates 230, 240, 250, and 260 constitute a label set comprised of a plurality of labels, thus enabling creating labels by incorporating information pieces of specified items.
摘要翻译：对于被选择为要创建标签的节目，可以在排列处理屏幕200上显示可用模板的列表以及从EPG信息DB获取的EPG信息的内容。 EPG信息显示在左屏幕210上，并且模板列表显示在右屏幕220上，使得在右屏幕220上选择希望应用的一个模板，根据哪个模板，一个或多个EPG 在左画面210上选择希望创建标签的信息。模板230,240,250和260构成由多个标签组成的标签集，从而能够通过并入指定项目的信息块来创建标签。

63. 发明申请

US20060202903A1 Antenna unit 失效
标题翻译：天线单元
公开(公告)号：US20060202903A1
公开(公告)日：2006-09-14
申请号：US11318409
申请日：2005-12-22
申请人： Junichi Noro , Takao Kato
发明人： Junichi Noro , Takao Kato
IPC分类号： H01Q1/42
CPC分类号： H01Q1/42 , H01Q1/362 , H01Q11/08
摘要： An antenna unit comprises a hollow cylindrical member obtained by forming a flexible insulating film member into a hollow cylinder. An antenna pattern composed of at least one conductor is formed at the hollow cylindrical member. The antenna unit further comprises a board mounted with a low-noise amplifier and a hollow cylindrical cover case covering the hollow cylindrical member and the board. In order to reduce the size in longitudinal direction, a part of the board is inserted into the inside of the hollow cylindrical member.
摘要翻译：天线单元包括通过将柔性绝缘膜构件形成为中空圆筒而获得的中空圆柱形构件。在中空圆柱形构件上形成由至少一个导体构成的天线图案。天线单元还包括安装有低噪声放大器的板和覆盖中空圆柱形构件和板的中空圆柱形盖壳。为了减小长度方向的尺寸，将板的一部分插入中空筒状部件的内部。

64. 发明授权

US07058062B2 Packet switching system having self-routing switches 失效
公开(公告)号：US07058062B2
公开(公告)日：2006-06-06
申请号：US10040466
申请日：2002-01-09
申请人： Shirou Tanabe , Taihei Suzuki , Shinobu Gohara , Yoshito Sakurai , Kenichi Ohtsuki , Takao Kato , Hiroshi Kuwahara , Eiichi Amada
发明人： Shirou Tanabe , Taihei Suzuki , Shinobu Gohara , Yoshito Sakurai , Kenichi Ohtsuki , Takao Kato , Hiroshi Kuwahara , Eiichi Amada
IPC分类号： H04L12/56
CPC分类号： H04Q11/0421 , H04L12/5601 , H04L12/6402 , H04L49/1553 , H04L49/25 , H04L49/254 , H04L49/255 , H04L49/256 , H04L49/3009 , H04L49/3081 , H04L49/309 , H04L2012/5652 , H04L2012/5672 , H04L2012/6481 , H04Q11/0407 , H04Q2213/13104 , H04Q2213/13106 , H04Q2213/13141 , H04Q2213/13176 , H04Q2213/13204 , H04Q2213/13209 , H04Q2213/13216 , H04Q2213/1329 , H04Q2213/13292 , H04Q2213/13332 , H04Q2213/13352 , H04Q2213/13399
摘要： A packet switching system including at least one switching node or local unit each including a label conversion unit for accommodating a plurality of packet circuits and performing conversion into output port information of a switch based on a logic channel on a packet circuit, a self-routing switch for performing switching based on the output port information, and a control unit for terminating a control packet and performing the call processing function. A switching node or tandem unit is provided including at least one self-routing switch for interconnecting the local units. A device is provided for setting, between the tandem unit and a destination-side local unit, the same logic channel as that between an originating-side local unit operative for information transfer and the tandem unit in respect of a call destined for a local unit other than this local unit and a device.

65. 发明授权

US06445703B2 ATM cell switching system 失效
公开(公告)号：US06445703B2
公开(公告)日：2002-09-03
申请号：US09725241
申请日：2000-11-29
申请人： Yoshito Sakurai , Kenichi Ohtsuki , Shinobu Gohara , Makoto Mori , Akira Horiki , Takao Kato , Hiroshi Kuwahara
发明人： Yoshito Sakurai , Kenichi Ohtsuki , Shinobu Gohara , Makoto Mori , Akira Horiki , Takao Kato , Hiroshi Kuwahara
IPC分类号： H04L1256
CPC分类号： H04L12/5601 , H04J3/247 , H04L12/5602 , H04L45/04 , H04L49/108 , H04L49/203 , H04L49/255 , H04L49/256 , H04L49/3081 , H04L2012/5627 , H04L2012/5631 , H04L2012/5638 , H04L2012/5649 , H04L2012/565 , H04L2012/5651 , H04L2012/5652 , H04L2012/5672 , H04L2012/5679 , H04L2012/568 , H04L2012/5681 , H04L2012/5682 , H04Q11/0478
摘要： An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory. The buffer memory control circuit has a control table device for outputting an identifier of an output line to which the cells read from the shared buffer memory are to be outputted, and cells are read from the chain designated by the output line identifier outputted from the control table device.

66. 发明授权

US06215788B1 ATM cell switching system 失效
公开(公告)号：US06215788B1
公开(公告)日：2001-04-10
申请号：US09292985
申请日：1999-04-16
申请人： Yoshito Sakurai , Kenichi Ohtsuki , Shinobu Gohara , Makoto Mori , Akira Horiki , Takao Kato , Hiroshi Kuwahara
发明人： Yoshito Sakurai , Kenichi Ohtsuki , Shinobu Gohara , Makoto Mori , Akira Horiki , Takao Kato , Hiroshi Kuwahara
IPC分类号： H04L1256
CPC分类号： H04L12/5601 , H04J3/247 , H04L12/5602 , H04L45/04 , H04L49/108 , H04L49/203 , H04L49/255 , H04L49/256 , H04L49/3081 , H04L2012/5627 , H04L2012/5631 , H04L2012/5638 , H04L2012/5649 , H04L2012/565 , H04L2012/5651 , H04L2012/5652 , H04L2012/5672 , H04L2012/5679 , H04L2012/568 , H04L2012/5681 , H04L2012/5682 , H04Q11/0478
摘要： An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory. The buffer memory control circuit has a control table device for outputting an identifier of an output line to which the cells read from the shared buffer memory are to be outputted, and cells are read from the chain designated by the output line identifier outputted from the control table device.

67. 发明授权

US5672782A Process for producing tertiary alcohol and for preparing catalyst therefor 失效
标题翻译：制备叔醇和制备催化剂的方法
公开(公告)号：US5672782A
公开(公告)日：1997-09-30
申请号：US291022
申请日：1994-08-16
申请人： Akitaka Hattori , Kazuhiro Nakamura , Tomohiro Washiyama , Takao Kato , Toshihiro Saito , Shoji Arai
发明人： Akitaka Hattori , Kazuhiro Nakamura , Tomohiro Washiyama , Takao Kato , Toshihiro Saito , Shoji Arai
IPC分类号： C07C29/04 , C08F8/00
CPC分类号： C08F8/00 , C07C29/04
摘要： A process for producing a polymer having sulfonic acid groups is provided which comprises treating a polymer having sulfonate salt groups with a ion-exchange resin to change the sulfonate salt groups into sulfonate acid groups with porous-type strongly acidic cation exchange resin. A process for producing a tertiary alcohol is also provided which comprises hydration of olefin by use of the aforementioned polymer as the catalyst. By the process, a tertiary alcohol is produced by hydration of olefin with high selectivity at low cost.
摘要翻译：提供一种制备具有磺酸基团的聚合物的方法，其包括用离子交换树脂处理具有磺酸盐基团的聚合物，以将多孔型强酸性阳离子交换树脂将磺酸盐基团改变成磺酸盐基团。还提供了一种制备叔醇的方法，其包括使用上述聚合物作为催化剂使烯烃水合。通过该方法，以低成本高选择性的烯烃水合生产叔醇。

68. 发明授权

US5289293A Pixel density conversion and processing 失效
标题翻译：像素密度转换和处理
公开(公告)号：US5289293A
公开(公告)日：1994-02-22
申请号：US492490
申请日：1990-03-12
申请人： Masami Kato , Takao Kato , Yasunori Hashimoto
发明人： Masami Kato , Takao Kato , Yasunori Hashimoto
IPC分类号： H04N1/40 , H04N1/405 , G06K9/00
CPC分类号： H04N1/40075 , H04N1/40062 , H04N1/40068 , H04N1/4052
摘要： In a pixel density converting apparatus according to the present invention, a pixel density conversion element for converting a pixel density by a factor of an arbitrary value, such as an element of the projection method or the linear interpolation method, a pixel density conversion element for increasing or decreasing a pixel density by a factor of an integer, such as an element of the majority or logical OR method, and a binarization element for conducting binarization while correcting quantizing errors, such as an element of the error diffusion method or the average error minimizing method, are combined with each other with the advantages and disadvantages of the respective elements taken into consideration, so as to achieve excellent conversion whether or not the image on which pixel density conversion is conducted or an image area is a pseudo half-tone processed image. In consequence, excellent pixel density conversion is achieved on a binary image in which a pseudo half-tone processed image and characters or line drawings are present in a mixed state.
摘要翻译：在根据本发明的像素密度转换装置中，像素密度转换元件用于将诸如投影方法的元素或线性内插法的任意值的像素密度的像素密度转换成像素密度转换元件，增加或减少像素密度乘以整数因子，例如大多数或逻辑OR方法的元素，以及用于在校正量化误差的同时进行二值化的二值化元素，例如误差扩散方法的元素或平均误差最小化方法相互结合，考虑到各个元件的优点和缺点，以便无论进行像素密度转换的图像还是图像区域都是伪半色调处理，实现优异的转换图片。因此，在混合状态下存在伪半色调处理的图像和字符或线图的二进制图像上实现了优异的像素密度转换。

69. 发明授权

US5128280A Fabrication process for wafer alignment marks by using peripheral etching to form grooves 失效
标题翻译：通过使用周边蚀刻来形成槽的晶片对准标记的制造工艺
公开(公告)号：US5128280A
公开(公告)日：1992-07-07
申请号：US732602
申请日：1991-07-19
申请人： Ryoichi Matsumoto , Toshikazu Kuroda , Takao Kato
发明人： Ryoichi Matsumoto , Toshikazu Kuroda , Takao Kato
IPC分类号： G03F9/00 , H01L23/544
CPC分类号： G03F9/70 , H01L23/544 , H01L2223/54426 , H01L2223/54453 , H01L2223/54493 , H01L2924/0002 , Y10S148/05 , Y10S148/102 , Y10S438/975
摘要： A wafer fabrication process uses peripheral etching to form grooves in a wafer substrate around the periphery of windows opened for dopant diffusion and alignment mark formation, and forms Si.sub.3 N.sub.4 tapers in the grooves. Although ultimately removed, the grooves create a pattern with nearly vertical sidewalls in the substrate which, when transferred to an epitaxial layer, forms wafer alignment marks with sharp edges. The process can be used to form wafer alignment marks having arbitrary patterns and can be adopted to improve the reliability of automatic alignment without the need to make new masks.
摘要翻译：晶片制造工艺使用外围蚀刻在晶片衬底周围形成用于掺杂剂扩散和对准标记形成的窗口周边的凹槽，并且在沟槽中形成Si 3 N 4锥形。虽然最终被去除，但是凹槽产生了在衬底中具有几乎垂直侧壁的图案，当转移到外延层时，其形成具有尖锐边缘的晶片对准标记。该方法可以用于形成具有任意图案的晶片对准标记，并且可以用于提高自动对准的可靠性，而不需要制作新的掩模。

70. 发明授权

US5106432A Wafer alignment mark utilizing parallel grooves and process 失效
标题翻译：晶圆对准标记采用平行凹槽和工艺
公开(公告)号：US5106432A
公开(公告)日：1992-04-21
申请号：US523489
申请日：1990-05-15
申请人： Ryoichi Matsumoto , Toshikazu Kuroda , Takao Kato
发明人： Ryoichi Matsumoto , Toshikazu Kuroda , Takao Kato
IPC分类号： G03F9/00 , H01L23/544
CPC分类号： G03F9/70 , H01L23/544 , H01L2223/54426 , H01L2223/54453 , H01L2223/54493 , H01L2924/0002 , Y10S148/05 , Y10S148/102 , Y10S438/975
摘要： A wafer alignment mark consists of patterns, such as a chevron and two stripes, formed in the surface of a semiconductor wafer. Each pattern is defined by a pair of parallel grooves, separation between all pairs of grooves being the same. Each groove provides one sharp edge which can be reliably detected by an automatic alignment system.A wafer fabrication process uses peripheral etching to form grooves in a wafer substrate around the periphery of windows opened for dopant diffusion and alignment mark formation, and forms Si.sub.3 N.sub.4 tapers in the grooves. Although ultimately removed, the grooves create a pattern with nearly vertical sidewalls in the substrate which, when transferred to an epitaxial layer, forms wafer alignment marks with sharp edges.
摘要翻译：晶片对准标记由形成在半导体晶片的表面中的图案（例如人字纹和两条）组成。每个图案由一对平行的凹槽限定，所有成对的凹槽之间的间隔相同。每个槽提供一个锋利的边缘，可以通过自动对准系统可靠地检测。晶片制造工艺使用外围蚀刻在晶片衬底周围形成用于掺杂剂扩散和对准标记形成的窗口周边的凹槽，并且在沟槽中形成Si 3 N 4锥形。虽然最终被去除，但是凹槽产生了在衬底中具有几乎垂直侧壁的图案，当转移到外延层时，其形成具有尖锐边缘的晶片对准标记。

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