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61. 发明申请

US20050156283A1 Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20050156283A1
公开(公告)日：2005-07-21
申请号：US10505179
申请日：2003-07-11
申请人： Norifumi Tokuda , Shigeru Kusunoki
发明人： Norifumi Tokuda , Shigeru Kusunoki
IPC分类号： H01L21/08 , H01L21/331 , H01L29/06 , H01L29/08 , H01L29/32 , H01L29/739
CPC分类号： H01L29/0657 , H01L29/0834 , H01L29/32 , H01L29/47 , H01L29/66348 , H01L29/7397 , H01L29/872 , H01L2924/10155 , H01L2924/10158
摘要： A semiconductor device in which a main current flows in a direction of thickness of a semiconductor substrate and which offers satisfactory performance and breakdown voltage and also satisfactory mechanical strength of the semiconductor substrate, and which needs no inconvenient control of the exposure system etc. during a photolithography process. The semiconductor device has a semiconductor substrate having a first main surface, a second main surface opposite to the first main surface, and a recess defined in the second main surface by side surfaces and a bottom surface. A semiconductor region is provided in the bottom surface of the recess of the semiconductor substrate, semiconductor regions are provided in the surface of a peripheral region on the second main surface side, and insulating films are provided on the side surfaces of the recess to electrically insulate the semiconductor regions.
摘要翻译：主电流在半导体基板的厚度方向上流动并且提供令人满意的性能和击穿电压以及半导体基板的令人满意的机械强度的半导体器件，并且不需要对曝光系统等的不方便控制光刻工艺。半导体器件具有半导体衬底，其具有第一主表面，与第一主表面相对的第二主表面，以及在第二主表面中由侧表面和底表面限定的凹部。半导体区域设置在半导体衬底的凹部的底表面中，半导体区域设置在第二主表面侧的周边区域的表面中，并且绝缘膜设置在凹部的侧表面上以电绝缘半导体区域。

62. 发明授权

US06815767B2 Insulated gate transistor 有权
标题翻译：绝缘栅晶体管
公开(公告)号：US06815767B2
公开(公告)日：2004-11-09
申请号：US10239782
申请日：2002-09-25
申请人： Katsumi Nakamura , Shigeru Kusunoki , Hideki Nakamura
发明人： Katsumi Nakamura , Shigeru Kusunoki , Hideki Nakamura
IPC分类号： H01L2976
CPC分类号： H01L29/7802 , H01L29/0619 , H01L29/0696 , H01L29/0847 , H01L29/402 , H01L29/407 , H01L29/4232 , H01L29/4238 , H01L29/456 , H01L29/495 , H01L29/4958 , H01L29/66348 , H01L29/66734 , H01L29/7395 , H01L29/7397 , H01L29/7813
摘要： A semiconductor device of the present invention is provided with a power device which has a semiconductor substrate having a first main surface and a second main surface that are opposed to each other and an insulating gate structure on the first main surface side, wherein a main current flows between the first main surface and the second main surface, that is to say, is provided with an insulating gate type MOS transistor structure wherein the thickness (t1) of the semiconductor substrate is no less than 50 &mgr;m and no greater than 250 &mgr;m and a low ON voltage and a high withstanding capacity against breakdown are implemented in the first main surface. Thereby, a low ON voltage, the maintaining of the withstanding capacity against breakdown and the reduction of a switching loss on the high voltage side can be implemented.
摘要翻译：本发明的半导体器件具有电源装置，该功率器件具有：具有彼此相对的第一主表面和第二主表面的半导体衬底，以及在第一主表面侧的绝缘栅极结构，其中主电流在第一主表面和第二主表面之间流动，即具有绝缘栅型MOS晶体管结构，其中半导体衬底的厚度（t1）不小于50μm且不大于250μm，并且在第一主表面中实施低导通电压和高耐受击穿能力。因此，可以实现低导通电压，耐击穿能力的保持和高压侧的开关损耗的降低。

63. 发明授权

US06300656B1 Nonvolatile semiconductor memory device having a drain region of different impurity density and conductivity types 失效
标题翻译：具有不同杂质密度和导电类型的漏区的非易失性半导体存储器件
公开(公告)号：US06300656B1
公开(公告)日：2001-10-09
申请号：US08647532
申请日：1996-05-15
申请人： Shuichi Ueno , Shigeru Kusunoki , Yoshinori Okumura
发明人： Shuichi Ueno , Shigeru Kusunoki , Yoshinori Okumura
IPC分类号： G11C1134
CPC分类号： H01L29/66492 , H01L21/26586 , H01L27/115 , H01L29/66659 , H01L29/7835
摘要： A nonvolatile semiconductor memory device includes an n-type region which is in contact with n+ drain diffusion region at a surface of p-type silicon substrate and covers the periphery thereof. The device also includes a p-type impurity region which is in contact with n-type region and covers the periphery thereof. The n+ drain diffusion region, n-type region and p+ impurity region extend to region located immediately under the floating gate electrode. Thereby, the nonvolatile semiconductor memory device has a structure which can promote injection of high energy electrons along a gate electrode direction.
摘要翻译：非易失性半导体存储器件包括在p型硅衬底的表面上与n +漏极扩散区域接触并覆盖其周围的n型区域。该器件还包括与n型区域接触并覆盖其周边的p型杂质区域。 n +漏极扩散区域，n型区域和p +杂质区域延伸到位于浮置栅电极正下方的区域。由此，非易失性半导体存储器件具有能够沿着栅电极方向注入高能电子的结构。

64. 发明授权

US5554876A Field effect transistor including silicon oxide film and nitrided oxide film as gate insulator film and manufacturing method thereof 失效
标题翻译：包含氧化硅膜和氮化氧化膜作为栅极绝缘膜的场效应晶体管及其制造方法
公开(公告)号：US5554876A
公开(公告)日：1996-09-10
申请号：US292591
申请日：1994-08-16
申请人： Shigeru Kusunoki , Masahide Inuishi
发明人： Shigeru Kusunoki , Masahide Inuishi
IPC分类号： H01L21/266 , H01L21/28 , H01L21/314 , H01L21/336 , H01L29/51 , H01L29/78 , H01L29/786
CPC分类号： H01L21/28185 , H01L21/266 , H01L21/28202 , H01L21/28211 , H01L21/3144 , H01L29/512 , H01L29/518 , H01L29/6656 , H01L29/6659 , H01L29/78 , H01L29/7836 , H01L29/78621 , Y10S257/90
摘要： An N type field effect transistor having a higher resistivity to hot carriers and exhibiting a higher current handling capability even when used at a low gate voltage, and a method of manufacturing such a transistor are provided. A nitrided oxide film is formed on a drain avalanche hot carrier injection region. The nitrided oxide film is highly resistive to drain avalanche hot carriers as compared to a silicon oxide film. The silicon oxide film is formed on a channel hot electron injection region. The silicon oxide film is highly resistive to channel hot electrons as compared to the nitrided oxide film. A major portion of a gate insulator film is a silicon oxide film. The silicon oxide film exhibits a higher current handling capability at a low gate voltage as compared to the nitrided oxide film.
摘要翻译：一种N型场效应晶体管，其具有对热载流子的较高的电阻率，并且即使在低栅极电压下使用时也具有更高的电流处理能力，并且提供了制造这种晶体管的方法。在排水雪崩热载体注入区域上形成氮化氧化物膜。与氧化硅膜相比，氮化氧化物膜对排水雪崩热载流子具有高度阻力。氧化硅膜形成在通道热电子注入区域上。与氮化氧化物膜相比，氧化硅膜对沟道热电子具有高度的阻力。栅绝缘膜的主要部分是氧化硅膜。与氮化氧化物膜相比，氧化硅膜在低栅极电压下表现出更高的电流处理能力。

65. 发明授权

US5189500A Multi-layer type semiconductor device with semiconductor element layers stacked in opposite directions and manufacturing method thereof 失效
标题翻译：具有沿相反方向堆叠的半导体元件层的多层型半导体器件及其制造方法
公开(公告)号：US5189500A
公开(公告)日：1993-02-23
申请号：US585462
申请日：1990-09-20
申请人： Shigeru Kusunoki
发明人： Shigeru Kusunoki
IPC分类号： G02F1/136 , G02F1/1368 , H01L27/00 , H01L27/06 , H01L27/14 , H01L27/146 , H01L29/786 , H01L31/14 , H04N5/335 , H04N5/357 , H04N5/369 , H04N5/378
CPC分类号： H01L27/14609 , H01L27/0688 , H01L27/14643 , H01L2221/6835 , H01L2221/68363 , Y10S438/928
摘要： A multi-layer type semiconductor device is disclosed, in which a plurality of semiconductor layers are formed in vertically opposite directions. The multi-layer type semiconductor device is obtained by forming a first semiconductor layer, an insulating layer and a second semiconductor layer in the mentioned order on a main surface of a first substrate, forming a semiconductor device by using the second semiconductor layer as a base, with an exposed surface thereof directed upward, forming an insulating film on the semiconductor device, attaching a second substrate to the insulating film, thinning the first substrate to expose the first semiconductor layer, and forming a further semiconductor device by using the first semiconductor layer as a base, with an exposed surface of the first semiconductor layer directed upward. A single- chip type image forming system or sensing system may be provided by employing, as the semiconductor devices, a sensing device such as a photosensor, a pressure sensor or the like, a processing circuit for processing a signal received from the sensor, and a display device for displaying results of the processing. A large number of pads may be provided by arranging the pads on opposite surfaces of a chip.
摘要翻译：公开了一种多层型半导体器件，其中在垂直相反的方向上形成多个半导体层。多层型半导体器件通过在第一衬底的主表面上按顺序形成第一半导体层，绝缘层和第二半导体层而获得，通过使用第二半导体层作为基底形成半导体器件，其暴露表面指向上，在半导体器件上形成绝缘膜，将第二衬底附着到绝缘膜上，使第一衬底变薄以暴露第一半导体层，以及通过使用第一半导体层形成另外的半导体器件作为基底，第一半导体层的暴露表面朝向上方。可以通过采用诸如光电传感器，压力传感器等的感测装置作为半导体装置，用于处理从传感器接收的信号的处理电路来提供单片式图像形成系统或感测系统，以及用于显示处理结果的显示装置。可以通过将芯片布置在芯片的相对表面上来提供大量的焊盘。

66. 发明授权

US5019520A Method for preparing a high mobility, lightly-doped channel mis-type FET with reduced latch up and punchthrough 失效
标题翻译：用于制备具有减少的闭锁和穿透的高迁移率，轻掺杂通道误动型FET的方法
公开(公告)号：US5019520A
公开(公告)日：1991-05-28
申请号：US516643
申请日：1990-04-30
申请人： Shigeki Komori , Shigeru Kusunoki , Katsuhiro Tsukamoto
发明人： Shigeki Komori , Shigeru Kusunoki , Katsuhiro Tsukamoto
IPC分类号： H01L29/78 , H01L21/336 , H01L21/8238 , H01L27/092 , H01L29/10
CPC分类号： H01L29/6659 , H01L29/105 , H01L29/1083 , Y10S438/965
摘要： A method for preparing a MISFET of a minute size with the channel length of not more than 2 .mu.m between a source and a drain, comprises the steps of forming a mask for exposing a region for forming a well on a planar surface of a semiconductor substrate, and introducing ions at a predetermined energy into the well region by using the mask. The predetermined energy is such as to form a peak of the impurity concentration distribution at a position deeper than the bottom surface of the source and the drain and to maintain the layer of at least a partial layer of the channel at an impurity concentration lower than 10.sup.16 cm.sup.-3 so that a high speed carrier movement in the channel is provided without causing a punch-through phenomenon.
摘要翻译：在源极和漏极之间制备沟道长度不大于2μm的微小尺寸的MISFET的方法包括以下步骤：形成掩模，用于在半导体的平面表面上暴露用于形成阱的区域通过使用掩模将预定能量的离子引入阱区。预定的能量是在比源极和漏极的底面更深的位置处形成杂质浓度分布的峰值，并且保持沟道的至少部分层的层的杂质浓度低于1016 cm-3，从而提供通道中的高速载体运动而不会产生穿孔现象。

67. 发明授权

US4851629A High-frequency heating device 失效
标题翻译：高频加热装置
公开(公告)号：US4851629A
公开(公告)日：1989-07-25
申请号：US208490
申请日：1988-06-20
申请人： Daisuke Bessyo , Naoyoshi Maehara , Kazuho Sakamoto , Shigeru Kusunoki , Takahiro Matsumoto
发明人： Daisuke Bessyo , Naoyoshi Maehara , Kazuho Sakamoto , Shigeru Kusunoki , Takahiro Matsumoto
IPC分类号： H01J23/15
CPC分类号： H01J23/15
摘要： In a high-frequency heating device for driving a magnetron at a high frequency between 20 and 50 KHz, the magnetron is provided with a plurality of choke coils, each of which consists of a magnetic core having a sectional area between 40 to 70 mm.sup.2 and an electric wire around the magnetic core and having a diameter between 1.2 and 1.6 mm. In such a construction, the magnetron can be driven, using the high frequency with reduced thermal loss of the choke coil and restrained heat generation.
摘要翻译：在用于驱动20〜50KHz之间的高频磁控管的高频加热装置中，磁控管设置有多个扼流线圈，每个扼流线圈由截面积在40至70mm 2之间的磁芯和围绕磁芯的电线，其直径在1.2和1.6mm之间。在这种结构中，可以使用高频率驱动磁控管，减少扼流圈的热损失并抑制发热。

68. 发明授权

US4621179A Microwave heating apparatus 失效
标题翻译：微波加热装置
公开(公告)号：US4621179A
公开(公告)日：1986-11-04
申请号：US486283
申请日：1983-03-29
申请人： Shigeru Kusunoki , Tomotaka Nobue
发明人： Shigeru Kusunoki , Tomotaka Nobue
IPC分类号： H05B6/64 , H05B6/66 , H05B6/70 , H05B6/72 , H05B6/80
CPC分类号： H05B6/72 , H05B6/686 , H05B6/70
摘要： A microwave heating apparatus is arranged such that the output from a single semiconductor oscillator is divided into two parts by a power divider and the parts are amplified by a pair of respective amplifiers and the amplified parts are fed into a heating chamber by two antennas, the phase of the two microwave parts being adjusted so as to combine their power in the heating chamber.
摘要翻译： PCT No.PCT / JP82 / 00297 Sec。 371日期1983年3月29日 102（e）1983年3月29日PCT提交1982年7月30日PCT公布。第WO83 / 00595号公报日期：1983年2月17日。微波加热装置被布置成使得单个半导体振荡器的输出由功率分配器分成两部分，并且部件被一对相应的放大器放大，并且将放大的部分馈送到加热室由两个天线组成，两个微波部分的相位被调节以便将它们的功率组合在加热室中。

69. 发明授权

US4401884A Method of controlling heating in food heating apparatus including infrared detecting system 失效
标题翻译：包括红外线检测系统在内的食品加热装置的加热控制方法
公开(公告)号：US4401884A
公开(公告)日：1983-08-30
申请号：US345377
申请日：1982-02-03
申请人： Shigeru Kusunoki , Keijiro Mori , Takato Kanazawa
发明人： Shigeru Kusunoki , Keijiro Mori , Takato Kanazawa
IPC分类号： F24C7/08 , H05B6/68 , H05B1/02
CPC分类号： H05B6/6411 , F24C7/08 , H05B6/6455
摘要： A method of controlling the application of heat in a food heating apparatus comprising a first heating-control mode such that the heat is applied to an object to be heated until an infrared detecting device detects that a surface temperature of the object has reached at least one predetermined temperature. A second heating-control mode effects at least one of the first heating mode wherein the heat is turned on and off repeatedly and a second heating mode wherein the output of the heat source is decreased gradually. A third heating-control mode is also provided for terminating the application of heat to the object.
摘要翻译：一种控制在食品加热设备中施加热量的方法，包括第一加热控制模式，使得加热到被加热物体，直到红外检测装置检测到物体的表面温度达到至少一个预定温度。第二加热控制模式影响重复打开和关闭热量的第一加热模式中的至少一种以及热源的输出逐渐减小的第二加热模式。还提供了第三加热控制模式来终止对物体施加热量。

70. 发明授权

US4379964A Method of food heating control by detecting liberated gas or vapor and temperature of food 失效
标题翻译：通过检测释放的气体或蒸汽和食物的温度来控制食品加热的方法
公开(公告)号：US4379964A
公开(公告)日：1983-04-12
申请号：US167844
申请日：1980-07-14
申请人： Takato Kanazawa , Keijiro Mori , Shigeru Kusunoki , Kazunari Nishii , Tomotaka Nobue
发明人： Takato Kanazawa , Keijiro Mori , Shigeru Kusunoki , Kazunari Nishii , Tomotaka Nobue
IPC分类号： A23L5/10 , G05D22/02 , H05B6/68 , H05B6/80 , H05B1/02
CPC分类号： H05B6/6458 , A23L5/15 , G05D22/02 , H05B6/6411
摘要： A method of food heating control in which the heating time length (.tau..sub.o) from a time point (t.sub.1) when the food temperature changing with the heating thereof reaches a predetermined set value (T.sub.1) to a time point (t.sub.2) when the vapor or gas liberated by heating of the food begins to increase the humidity or gas concentration is used as a basis for automatically determining a subsequent heating time length (.tau..sub.R). Since the time period (.tau..sub.R) for the subsequent heating process is determined by the heating time from the time point when the food temperature reaches a predetermined set value to the time point when the humidity or gas concentration begins to increase (unlike in the prior art method in which the heating time from the start of heating to the time point when humidity begins to increase is used to determine the subsequent heating time), the error in the heating time which otherwise might be caused by the variation in the initial food temperature is obviated. Consequently, it is possible to determine the total heating time without it being substantially affected by the initial temperature of the food.
摘要翻译：一种食品加热控制方法，其中当所述食物温度随其加热而变化的时间点（t1）达到预定设定值（T1）至所述蒸气的时间点（t2）时的加热时间长度（τo）或通过加热食物释放的气体开始增加，湿度或气体浓度被用作自动确定随后的加热时间长度（τR）的基础。由于随后的加热处理的时间段（τR）由从食物温度达到预定设定值的时间点到湿度或气体浓度开始增加的时间点的加热时间确定（与先前不同使用从加热开始到湿度开始增加的时间点的加热时间的方法来确定随后的加热时间），否则可能由初始食物温度的变化引起的加热时间的误差被免除。因此，可以确定总加热时间，而不受食品的初始温度的显着影响。

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