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61. 发明授权

US06611458B2 Semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件
公开(公告)号：US06611458B2
公开(公告)日：2003-08-26
申请号：US09780393
申请日：2001-02-12
申请人： Koichiro Ishibashi , Shoji Shukuri , Kazumasa Yanagisawa , Junichi Nishimoto , Masanao Yamaoka , Masakazu Aoki
发明人： Koichiro Ishibashi , Shoji Shukuri , Kazumasa Yanagisawa , Junichi Nishimoto , Masanao Yamaoka , Masakazu Aoki
IPC分类号： G11C1606
CPC分类号： G11C16/0441 , B82Y10/00 , C04B28/02 , C04B2103/0097 , C04B2111/00017 , C04B2111/00456 , C04B2111/00517 , C04B2111/2092 , G11C16/04 , G11C29/12 , G11C29/789 , G11C29/848 , G11C2216/10 , H01L22/22 , H01L23/53228 , H01L23/544 , H01L24/48 , H01L24/49 , H01L27/0211 , H01L27/105 , H01L27/10897 , H01L2223/5444 , H01L2223/54473 , H01L2224/05554 , H01L2224/05599 , H01L2224/48091 , H01L2224/48472 , H01L2224/49175 , H01L2224/85399 , H01L2924/00014 , H01L2924/10162 , H01L2924/12042 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , C04B14/04 , C04B14/06 , C04B14/14 , C04B14/16 , C04B20/008 , C04B24/00 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： To reduce cost of defect redundancy and trimming in a semiconductor integrated circuit having multiple layer wirings and copper wirings, address for salvaging defect of a memory cell array in a semiconductor is stored by using a nonvolatile memory element constituting a floating electrode by a first layer of polysilicon, or the nonvolatile memory element is programmed in testing the semiconductor integrated circuit, thereby, a special process is not needed in forming the nonvolatile memory element, that is, the nonvolatile memory element can be formed in a process of forming CMOS device and apparatus of laser beam for programming is not needed since the programming is carried out in testing, time necessary for programming can be shortened and therefore, testing cost can be reduced.
摘要翻译：为了降低具有多层布线和铜布线的半导体集成电路中的缺陷冗余和修整的成本，通过使用构成浮置电极的非易失性存储元件，通过第一层多晶硅或非易失性存储元件在对半导体集成电路进行测试时被编程，从而在形成非易失性存储元件时不需要特殊工艺，也就是说，可以在形成CMOS器件和器件的过程中形成非易失性存储元件用于编程的激光束不需要，因为在测试中进行编程，可以缩短编程所需的时间，因此可以降低测试成本。

62. 发明授权

US5818792A Semiconductor memory device and memory module using the same 失效
标题翻译：半导体存储器件和使用其的存储器模块
公开(公告)号：US5818792A
公开(公告)日：1998-10-06
申请号：US804683
申请日：1997-02-25
申请人： Toshio Sasaki , Kazumasa Yanagisawa , Toshio Sugano , Kiyoshi Inoue , Seiichiro Tsukui , Masakazu Aoki , Shigeru Suzuki , Masashi Horiguchi
发明人： Toshio Sasaki , Kazumasa Yanagisawa , Toshio Sugano , Kiyoshi Inoue , Seiichiro Tsukui , Masakazu Aoki , Shigeru Suzuki , Masashi Horiguchi
IPC分类号： G11C11/413 , G11C11/401 , G11C29/00 , G11C29/04 , H01L21/82 , H01L21/8242 , H01L27/108 , G01C13/00
CPC分类号： G11C29/80 , G11C29/74 , G11C29/808 , G11C29/832
摘要： Input/output terminals of a first semiconductor memory device in which failures or defects exist in units of memory mats and input/output terminals of a second semiconductor memory device having redundant memory mats are connected to one another on a mounted substrate to thereby relieve the failures in the memory mat units. A power source is substantially cut off from supplying to a faulty memory mat.
摘要翻译：第一半导体存储器件的输入/输出端子，其中存在以存储器单元为单位的故障或缺陷，并且具有冗余存储器垫的第二半导体存储器件的输入/输出端子在安装的基板上彼此连接，从而减轻故障在记忆垫单位。电源基本上被切断供给故障存储器垫。

63. 发明授权

US5386394A Semiconductor memory device for performing parallel operations on hierarchical data lines 失效
标题翻译：用于在分层数据线上执行并行操作的半导体存储器件
公开(公告)号：US5386394A
公开(公告)日：1995-01-31
申请号：US114633
申请日：1993-09-02
申请人： Takayuki Kawahara , Masakazu Aoki , Yoshinobu Nakagome , Makoto Hanawa , Kunio Uchiyama , Masayuki Nakamura , Goro Kitsukawa , Kanji Oishi
发明人： Takayuki Kawahara , Masakazu Aoki , Yoshinobu Nakagome , Makoto Hanawa , Kunio Uchiyama , Masayuki Nakamura , Goro Kitsukawa , Kanji Oishi
IPC分类号： G06F12/08 , G11C7/10 , G11C11/401 , G11C11/409 , G11C7/00 , G11C11/40
CPC分类号： G11C7/1048 , G11C7/1006
摘要： The semiconductor device has more-significant global data lines and less-significant data lines hierarchically formed, and switches for controlling the more-significant global data lines and the less-significant data lines to be connected each other. In addition, the semiconductor device has the unit for precharging the global data lines independently of the data lines.
摘要翻译：半导体器件具有分层形成的更重要的全局数据线和较不重要的数据线，以及用于控制更有意义的全局数据线和不太重要的数据线彼此连接的开关。此外，半导体器件具有用于独立于数据线预充电全局数据线的单元。

64. 发明授权

US5337271A Semiconductor storage device capable of reduced current consumption using a charge reuse circuit 失效
标题翻译：能够使用电荷再利用电路来降低电流消耗的半导体存储装置
公开(公告)号：US5337271A
公开(公告)日：1994-08-09
申请号：US974925
申请日：1992-11-12
申请人： Takayuki Kawahara , Yoshiki Kawajiri , Takesada Akiba , Mssashi Horiguchi , Goro Kitsukawa , Masakazu Aoki
发明人： Takayuki Kawahara , Yoshiki Kawajiri , Takesada Akiba , Mssashi Horiguchi , Goro Kitsukawa , Masakazu Aoki
IPC分类号： G11C11/409 , G11C7/10 , G11C11/401 , G11C11/406 , G11C11/407 , G11C11/4096 , G11C11/24
CPC分类号： G11C7/1048 , G11C11/4096 , Y02E60/36
摘要： A semiconductor storage device is provided which minimizes current consumption by using a circuit which is fed by charges stored in a parasitic capacitance of another circuit. To this end, short-circuiting switches SP and SN are provided respectively between first common source lines PP1 and PN1 and second common source lines PP2 and PN2 of the semiconductor device. Electric charges on the first common source lines which have been amplified to its normal amplitude change the voltage level of the second common source lines. A data line connected to the second common source line is amplified to half of the normal amplitude. Thereafter, the signal on the data line is amplified by a sense amplifier. As a result, the charge and discharge currents on the data line are substantially halved compared to the conventional device.
摘要翻译：提供一种半导体存储装置，其通过使用由存储在另一电路的寄生电容中的电荷馈送的电路来最小化电流消耗。为此，短路开关SP和SN分别设置在半导体器件的第一公共源极线PP1和PN1以及第二公共源极线PP2和PN2之间。已经被放大到其正常幅度的第一公共源极线上的电荷改变第二公共源极线的电压电平。连接到第二公共源极线的数据线被放大到正常振幅的一半。此后，数据线上的信号被读出放大器放大。结果，与常规器件相比，数据线上的充电和放电电流基本上减半。

65. 发明授权

US4929161A Air-cooled oil-free rotary-type compressor 失效
标题翻译：风冷无油旋转式压缩机
公开(公告)号：US4929161A
公开(公告)日：1990-05-29
申请号：US260774
申请日：1988-10-21
申请人： Masakazu Aoki , Akira Suzuki
发明人： Masakazu Aoki , Akira Suzuki
IPC分类号： F04C29/04
CPC分类号： F04C29/04
摘要： An air-cooled oil-free rotary-type compressor comprises a first air cooling-type air cooler, a backflow preventing valve and a second air cooling-type air cooler respectively disposed in a channel of a discharge gas compressed in a compressor body. The first air cooling-type air cooler and the second air cooling-type air cooler are disposed in a passage of cooling air flow.
摘要翻译：一种风冷无油旋转式压缩机包括分别设置在压缩机体中压缩的排出气体的通道中的第一空气冷却型空气冷却器，防回流阀和第二空气冷却型空气冷却器。第一空气冷却型空气冷却器和第二空气冷却型空气冷却器设置在冷却空气流的通道中。

66. 发明授权

US4551742A Solid-state imaging device 失效
标题翻译：固态成像装置
公开(公告)号：US4551742A
公开(公告)日：1985-11-05
申请号：US640570
申请日：1984-08-14
申请人： Iwao Takemoto , Shiya Ohba , Masakazu Aoki , Haruhisa Ando , Masaaki Nakai , Toshifumi Ozaki , Masao Tamura , Masanobu Miyao
发明人： Iwao Takemoto , Shiya Ohba , Masakazu Aoki , Haruhisa Ando , Masaaki Nakai , Toshifumi Ozaki , Masao Tamura , Masanobu Miyao
IPC分类号： H01L27/14 , H01L27/146 , H01L31/14 , H04N5/335 , H04N5/359 , H04N5/374 , H04N9/07
CPC分类号： H01L27/14654
摘要： A solid-state imaging device is provided with picture elements which are each composed of a photoelectric conversion element and a MOS transistor as a switching element and which are arranged in the form of a matrix. A scanning mechanism sequentially scans the picture elements to sequentially read out photoelectric conversion signals. To eliminate smear and reduce parasitic capacitance, a high-impurity-concentration diffusion layer serving as an output terminal of the MOS transistor constituting the picture element is formed on an insulator layer for isolating the elements.
摘要翻译：固态成像装置具有由光电转换元件和MOS晶体管作为开关元件构成并以矩阵形式配置的像素。扫描机构顺序地扫描像素以顺序地读出光电转换信号。为了消除污迹并降低寄生电容，在用于隔离元件的绝缘体层上形成用作构成像素的MOS晶体管的输出端的高杂质浓度扩散层。

67. 发明授权

US4456929A Solid state image pick-up apparatus 失效
标题翻译：固态摄像装置
公开(公告)号：US4456929A
公开(公告)日：1984-06-26
申请号：US385005
申请日：1982-06-04
申请人： Masakazu Aoki , Haruhisa Ando , Shinya Ohba , Iwao Takemoto
发明人： Masakazu Aoki , Haruhisa Ando , Shinya Ohba , Iwao Takemoto
IPC分类号： H01L27/146 , H04N5/335 , H04N5/359 , H04N5/365 , H04N5/374 , H04N3/15
CPC分类号： H04N3/1568
摘要： In a solid state image pick-up device of the type comprising a first semiconductor layer including a photoelectric conversion element array, and vertical and horizontal switching elements adapted to select the photoelectric conversion elements, a second semiconductor layer including a horizontal shift register for selecting the horizontal switching elements, a third semiconductor layer including a vertical shift register for selecting the vertical switching elements, the first, second and third semiconductor layers are insulated from each other, and gate voltage V.sub.SMOS.L impressed upon a gate electrode of a not selected horizontal switching element is made to satisfy a relation V.sub.SMOS.L .gtoreq.V.sub.WPD +F.sub.FB where V.sub.WPD represents a potential of the first semiconductor layer, and V.sub.FB a flat band voltage beneath gate electrodes of the horizontal switching elements.
摘要翻译：在包括包括光电转换元件阵列的第一半导体层和适于选择光电转换元件的垂直和水平开关元件的类型的固态图像拾取装置中，包括水平移位寄存器的第二半导体层，水平开关元件，包括用于选择垂直开关元件的垂直移位寄存器的第三半导体层，第一，第二和第三半导体层彼此绝缘，并且栅极电压VSMOS.L施加在未选择的水平的栅电极使开关元件满足VSMOS.L> / = VWPD + FFB的关系，其中VWPD表示第一半导体层的电位，VFB是水平开关元件的栅电极下方的平带电压。

68. 发明授权

US4349743A Solid-state imaging device 失效
标题翻译：固态成像装置
公开(公告)号：US4349743A
公开(公告)日：1982-09-14
申请号：US206865
申请日：1980-11-14
申请人： Shinya Ohba , Shoji Hanamura , Toshifumi Ozaki , Masaharu Kubo , Masaaki Nakai , Kenji Takahashi , Masakazu Aoki , Iwao Takemoto , Haruhisa Ando , Ryuichi Izawa
发明人： Shinya Ohba , Shoji Hanamura , Toshifumi Ozaki , Masaharu Kubo , Masaaki Nakai , Kenji Takahashi , Masakazu Aoki , Iwao Takemoto , Haruhisa Ando , Ryuichi Izawa
IPC分类号： H01L27/14 , H01L27/146 , H04N3/14 , H04N5/335 , H04N5/341 , H04N5/359 , H04N5/365 , H04N5/372 , H04N5/374 , H04N5/378
CPC分类号： H01L27/14643 , H04N3/1512 , H04N3/1568
摘要： A solid-state imaging device wherein a MOS sensor is employed for a photosensor part, a CTD shift register is employed for a read-out circuit, first and second transfer gates are connected between vertical signal output lines and the CTD, and a reset gate is connected between a juncture of the first and second transfer gates and a reset voltage line. A method is adopted in which signal outputs of a plurality of rows are transferred to the CTD in a horizontal blanking period, and signals of a plurality of rows are simultaneously read out in a horizontal scanning period. At the signal transfer, bias charges are dumped into the vertical signal output lines from the CTD, and mixed charges consisting of the bias charges and signal charges are transferred to the CTD. Thereafter, the signals are read out.
摘要翻译：一种固态成像装置，其中MOS传感器用于光电传感器部分，CTD移位寄存器用于读出电路，第一和第二传输门连接在垂直信号输出线和CTD之间，复位门连接在第一和第二传输门的接合点与复位电压线之间。采用在水平消隐期间将多行的信号输出传送到CTD的方法，并且在水平扫描期间同时读出多行的信号。在信号传输中，偏置电荷从CTD倾倒到垂直信号输出线路中，由偏置电荷和信号电荷组成的混合电荷转移到CTD。此后，读出信号。

69. 发明授权

US4295055A Circuit for generating scanning pulses 失效
标题翻译：用于产生扫描脉冲的电路
公开(公告)号：US4295055A
公开(公告)日：1981-10-13
申请号：US46028
申请日：1979-06-06
申请人： Iwao Takemoto , Norio Koike , Shinya Ohba , Haruhisa Ando , Masaaki Nakai , Syoji Hanamura , Ryuichi Izawa , Masaharu Kubo , Masakazu Aoki , Shuhei Tanaka
发明人： Iwao Takemoto , Norio Koike , Shinya Ohba , Haruhisa Ando , Masaaki Nakai , Syoji Hanamura , Ryuichi Izawa , Masaharu Kubo , Masakazu Aoki , Shuhei Tanaka
IPC分类号： G11C19/00 , G11C19/18 , G11C19/28 , H01L27/146 , H01L31/10 , H03K5/15 , H04N3/14
CPC分类号： H03K5/15093 , G11C19/184 , G11C19/28
摘要： A circuit for generating scanning pulses comprising a plurality of stages of basic circuits connected in series, said each basic circuit comprising first, second and third insulated gate field-effect transistors (MISTs) each of which has first and second terminals each being either of source and drain terminals and a gate terminal, said first terminal of said first MIST being used as a clock pulse-applying terminal, said gate terminal of said first MIST being used as an input terminal, said second terminal of said first MIST and said first terminal and said gate terminal of said second MIST being connected and used as a scanning pulse output terminal, said second terminal of said second MIST and said first terminal of said third MIST being connected and used as an output terminal, said second terminal of said third MIST being used as a ground terminal, said gate terminal of said third MIST being used as a feedback input terminal.
摘要翻译：一种用于产生扫描脉冲的电路，包括串联连接的多级基本电路，所述每个基本电路包括第一，第二和第三绝缘栅极场效应晶体管（MIST），每个绝缘栅场效应晶体管的第一和第二端子均为源极所述第一MIST的所述第一端子用作时钟脉冲施加端子，所述第一MIST的所述栅极端子用作输入端子，所述第一MIST的所述第二端子和所述第一端子的所述第一端子并且所述第二MIST的所述栅极端子被连接并用作扫描脉冲输出端子，所述第二MIST的所述第二端子和所述第三MIST的所述第一端子被连接并用作输出端子，所述第三MIST的所述第二端子被用作接地端子，所述第三MIST的所述栅极端子用作反馈输入端子。

70. 发明授权

US08672647B2 Water injected scroll air compressor 有权
标题翻译：注水涡旋空压机
公开(公告)号：US08672647B2
公开(公告)日：2014-03-18
申请号：US13024123
申请日：2011-02-09
申请人： Natsuki Kawabata , Kazuaki Shiinoki , Hirotaka Kameya , Masakazu Aoki
发明人： Natsuki Kawabata , Kazuaki Shiinoki , Hirotaka Kameya , Masakazu Aoki
IPC分类号： F01C1/02
CPC分类号： F04C18/0215 , F04C18/0223 , F04C18/0253 , F04C28/06 , F04C28/08 , F04C28/24 , F04C29/042 , F04C2270/19 , F04C2270/80
摘要： A high reliability water injected scroll air compressor is provided with an orbiting scroll, a fixed scroll corresponding to the orbiting scroll, a motor that generates driving force for making the orbiting scroll orbit the fixed scroll, a compressing path from a suction port to a discharge port, and a portion for injecting water into the compressing path. The operation is controlled by a switching operation in which water is injected into the compressing path and then no water is injected. Corrosion, failure of activation, and concerns about wrap contact when water is injected into an air end are avoided by switching the operation with water injection and the operation without water injection so as to prevent water from remaining in the air end.
摘要翻译：高可靠性注水涡旋式空气压缩机设有绕动涡旋盘，对应于绕动涡盘的固定涡旋盘，产生驱动力的马达，用于使绕动涡盘盘绕固定涡旋盘，从吸入口到排气口的压缩路径端口和用于将水注入压缩路径的部分。通过将水注入到压缩路径中并且没有水被注入的切换操作来控制操作。当水注入空气端时，腐蚀，活化失败以及对水分接触的担忧，避免了注水操作和无需注水的操作，以防止水留在空气端。

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