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61. 外观设计

USD630392S1 Dust collector 有权
公开(公告)号：USD630392S1
公开(公告)日：2011-01-04
申请号：US29352579
申请日：2009-12-22
申请人： Tony Lin
设计人： Tony Lin

62. 外观设计

USD590284S1 Portion of a tape measure 有权
标题翻译：卷尺的一部分
公开(公告)号：USD590284S1
公开(公告)日：2009-04-14
申请号：US29319426
申请日：2008-06-09
申请人： James M. Critelli , Peter Lin , Tony Lin
设计人： James M. Critelli , Peter Lin , Tony Lin

63. 发明申请

US20060240666A1 METHOD OF FORMING SILICIDE 审中-公开
标题翻译：形成硅酮的方法
公开(公告)号：US20060240666A1
公开(公告)日：2006-10-26
申请号：US10907891
申请日：2005-04-20
申请人： Chao-Ching Hsieh , Yi-Yiing Chiang , Chien-Chung Huang , Po-Chao Tsou , Kirk Hsu , Tony Lin , Le-Tien Jung
发明人： Chao-Ching Hsieh , Yi-Yiing Chiang , Chien-Chung Huang , Po-Chao Tsou , Kirk Hsu , Tony Lin , Le-Tien Jung
IPC分类号： H01L21/44
CPC分类号： H01L21/28518 , H01L21/76889
摘要： A method of forming silicide is described. A layer of refractory metal is deposited on a substrate, and then a first annealing process is performed to form silicide, followed by removal of unreacted metal. Next, a species implanting process is carried out to implant species of neutral atoms into the silicide to break up lattice structure of the silicide, so that the problem of junction leakage induced by spiking and piping diffusion under high temperature during a subsequent second annealing process is avoided.
摘要翻译：描述了形成硅化物的方法。将难熔金属层沉积在基材上，然后进行第一退火工艺以形成硅化物，随后除去未反应的金属。接下来，进行物种植入工艺以将中性原子的种类植入到硅化物中以破坏硅化物的晶格结构，从而在随后的第二退火过程中由高温引起的尖峰和管道扩散引起的结漏电的问题是避免。

64. 发明申请

US20050269195A1 Circuit breaker 审中-公开
标题翻译：断路器
公开(公告)号：US20050269195A1
公开(公告)日：2005-12-08
申请号：US11103918
申请日：2005-04-12
申请人： Joseph Brandon , Tony Lin
发明人： Joseph Brandon , Tony Lin
IPC分类号： H01H71/04 , H01H71/12 , H01H71/24 , H01H71/52 , H01H71/74 , H01H83/22 , H01H5/00
CPC分类号： H01H71/524 , H01H71/04 , H01H71/123 , H01H71/2472 , H01H71/7409 , H01H83/226 , H01H2009/305 , H01H2071/042 , H01H2071/124
摘要： A microprocessor-based circuit breaker includes a chip that defines the current rating or ground fault current for the breaker. Thus, the maximum current rating and/or ground fault current can be set after manufacture using the chip that is electrically connected to the microprocessor. The breaker includes mechanical components that trip to disconnect the load terminal from the line input. The mechanical components include a floating breaker arm, trigger and tripper lever that cooperate to control the tripping of the breaker. A spring between the breaker arm and trigger, together with cam surfaces defined in the breaker switch cooperate to form a floating linkage to control the position of the breaker arm during on/off activation and current fault conditions. The circuit breaker also includes multiple indicia to provide a visual indication of the type of fault condition sensed by the breaker.
摘要翻译：基于微处理器的断路器包括限定断路器的额定电流或接地故障电流的芯片。因此，可以在使用与微处理器电连接的芯片制造后，设定最大额定电流和/或接地故障电流。断路器包括机械部件，其跳闸以将负载端子与线路输入断开。机械部件包括一个浮动断路器臂，触发器和跳闸杆，用于控制断路器的跳闸。断路器臂和触发器之间的弹簧以及限定在断路器开关中的凸轮表面协作以形成浮动联动装置，以在开/关激活和当前故障条件期间控制断路器臂的位置。断路器还包括多个标记以提供由断路器感测到的故障状况的类型的可视指示。

65. 发明授权

US06316303B1 Method of fabricating a MOS transistor having SEG silicon 有权
标题翻译：制造具有SEG硅的MOS晶体管的方法
公开(公告)号：US06316303B1
公开(公告)日：2001-11-13
申请号：US09504563
申请日：2000-02-15
申请人： Tony Lin , Chien-Chao Huang , Ming-Yin Hao
发明人： Tony Lin , Chien-Chao Huang , Ming-Yin Hao
IPC分类号： H01L218238
CPC分类号： H01L29/66492 , H01L21/28052 , H01L29/41783 , H01L29/665 , H01L29/6653 , H01L29/66553 , H01L29/6659 , H01L29/66628
摘要： A method of fabricating a MOS transistor having SEG Si. After the formation of a gate and a spacer and before a source/drain region is formed, a selective epitaxial growth (SEG) Si is deposited over the substrate. The spacer is then removed to form an ultra shallow junction in the exposed substrate covered by the spacer after the formation of the SEG Si.
摘要翻译：一种制造具有SEG Si的MOS晶体管的方法。在形成栅极和间隔物之后，在形成源极/漏极区之前，在衬底上沉积选择性外延生长（SEG）Si。然后在形成SEG Si之后，将间隔物移除以在被间隔物覆盖的暴露的基底中形成超浅结。

66. 外观设计

USD449860S1 Electric scooter 失效
公开(公告)号：USD449860S1
公开(公告)日：2001-10-30
申请号：US29137546
申请日：2001-02-26
申请人： Tony Lin
设计人： Tony Lin

67. 发明授权

US06297112B1 Method of forming a MOS transistor 失效
标题翻译：形成MOS晶体管的方法
公开(公告)号：US06297112B1
公开(公告)日：2001-10-02
申请号：US09497668
申请日：2000-02-04
申请人： Tony Lin , Tung-Po Chen , Ming-Yin Hao
发明人： Tony Lin , Tung-Po Chen , Ming-Yin Hao
IPC分类号： H01L21336
CPC分类号： H01L29/6659 , H01L21/266 , H01L29/6656 , Y10S438/976
摘要： The present invention provides a method of forming a PMOS transistor or an NMOS transistor on a semiconductor wafer. The semiconductor wafer comprises a silicon substrate and a gate positioned on a predetermined area of the silicon substrate. First, a protection layer of uniform thickness made of silicon nitride is formed on the semiconductor wafer to cover the surface of the gate. Then, a first ion implantation process is performed to form a first ion implantation layer with a first predetermined thickness on the silicon substrate around the gate. Then, an RCA cleaning process is performed to remove impurities on the semiconductor wafer. Next, a spacer is formed around the gate. Finally, a second ion implantation process is performed to form a second ion implantation layer with a second predetermined thickness on the silicon substrate around the gate. The second ion implantation layer is used as a source or drain (S/D) of the MOS transistor. The portion of the first ion implantation layer that is not covered by the second ion implantation layer is used as a lightly doped drain (LDD). The protection layer is used to protect the surface of the silicon substrate from being etched during the RCA cleaning process so as to prevent an increase of the electrical resistance of the LDD.
摘要翻译：本发明提供一种在半导体晶片上形成PMOS晶体管或NMOS晶体管的方法。半导体晶片包括硅衬底和位于硅衬底的预定区域上的栅极。首先，在半导体晶片上形成由氮化硅制成的均匀厚度的保护层，以覆盖栅极的表面。然后，进行第一离子注入工艺以在栅极周围的硅衬底上形成具有第一预定厚度的第一离子注入层。然后，执行RCA清洁处理以去除半导体晶片上的杂质。接下来，在栅极周围形成间隔物。最后，执行第二离子注入工艺以在栅极周围的硅衬底上形成具有第二预定厚度的第二离子注入层。第二离子注入层用作MOS晶体管的源极或漏极（S / D）。未被第二离子注入层覆盖的第一离子注入层的部分用作轻掺杂漏极（LDD）。保护层用于在RCA清洁过程中保护硅衬底的表面不被蚀刻，以防止LDD的电阻增加。

68. 发明授权

US06211027B1 Method for manufacturing PMOS transistor 失效
标题翻译：制造PMOS晶体管的方法
公开(公告)号：US06211027B1
公开(公告)日：2001-04-03
申请号：US09444278
申请日：1999-11-19
申请人： Tony Lin , C. C. Hsue
发明人： Tony Lin , C. C. Hsue
IPC分类号： H01L21336
CPC分类号： H01L29/66492 , H01L21/266 , H01L29/1083 , H01L29/665 , H01L29/6653 , H01L29/6659
摘要： A method for manufacturing a PMOS transistor. A gate terminal is formed over a substrate. Spacers are formed on the sidewalls of the gate terminal. A source/drain terminal is formed in the substrate on each side of the gate terminal, and then a metal silicide layer is formed over the top surface of the gate terminal and the substrate. The spacers are next removed. Using the metal silicide layer as a mask, a source/drain extension region is formed in the substrate between the gate terminal and the source/drain terminal. Similarly, using the metal silicide layer as a mask, an anti-punchthrough region is form in the substrate interior under the source/drain extension region.
摘要翻译：一种用于制造PMOS晶体管的方法。栅极端子形成在基板上。隔板形成在栅极端子的侧壁上。源极/漏极端子形成在栅极端子的每一侧上的衬底中，然后在栅极端子和衬底的顶表面上形成金属硅化物层。接下来移除间隔物。使用金属硅化物层作为掩模，在栅极端子和源极/漏极端子之间的衬底中形成源极/漏极延伸区域。类似地，使用金属硅化物层作为掩模，在源极/漏极延伸区域下方的衬底内部形成抗穿透区域。

69. 发明授权

US06187644B1 Method of removing oxynitride by forming an offset spacer 有权
标题翻译：通过形成偏移间隔物去除氮氧化物的方法
公开(公告)号：US06187644B1
公开(公告)日：2001-02-13
申请号：US09391934
申请日：1999-09-08
申请人： Tony Lin , Tung-Po Chen
发明人： Tony Lin , Tung-Po Chen
IPC分类号： H01L21336
CPC分类号： H01L29/6659 , H01L21/28123 , H01L29/66545 , Y10S438/952
摘要： A method for forming a semiconductor device is disclosed. The method includes providing a semiconductor substrate, followed by forming a gate oxide layer and a conductive layer over the substrate. An anti-reflective coating is then formed on the conductive layer. After patterning to etch the anti-reflective coating and the conductive layer, a gate region is thus formed. A dielectric layer is formed over the gate region, and is then subjected to etching back, therefore forming an offset spacer on sidewall of the gate region while simultaneously removing surface oxide of the anti-reflective coating. Finally, anti-reflective coating is removed.
摘要翻译：公开了一种用于形成半导体器件的方法。该方法包括提供半导体衬底，随后在衬底上形成栅极氧化物层和导电层。然后在导电层上形成抗反射涂层。在图案化以蚀刻抗反射涂层和导电层之后，因此形成栅极区域。在栅极区域上形成电介质层，然后对其进行蚀刻，从而在栅极区域的侧壁上形成偏移间隔物，同时去除抗反射涂层的表面氧化物。最后，去除抗反射涂层。

70. 外观设计

USD434464S Hub 失效
公开(公告)号：USD434464S
公开(公告)日：2000-11-28
申请号：US108592
申请日：1999-08-02
申请人： Tony Lin
设计人： Tony Lin

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