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61. 发明申请

US20130092984A1 FINFET DEVICE AND METHOD OF MANUFACTURING SAME 有权
标题翻译： FINFET器件及其制造方法
公开(公告)号：US20130092984A1
公开(公告)日：2013-04-18
申请号：US13272305
申请日：2011-10-13
申请人： Chi-Wen Liu , Chao-Hsiung Wang
发明人： Chi-Wen Liu , Chao-Hsiung Wang
IPC分类号： H01L29/772 , H01L21/336
CPC分类号： H01L29/66795 , H01L21/76224 , H01L29/7843 , H01L29/7845 , H01L29/785
摘要： A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a fin structure including one or more fins disposed on the substrate. The semiconductor device further includes a dielectric layer disposed on a central portion of the fin structure and traversing each of the one or more fins. The semiconductor device further includes a work function metal disposed on the dielectric layer and traversing each of the one or more fins. The semiconductor device further includes a strained material disposed on the work function metal and interposed between each of the one or more fins. The semiconductor device further includes a signal metal disposed on the work function metal and on the strained material and traversing each of the one or more fins.
摘要翻译：公开了一种用于制造半导体器件的半导体器件和方法。示例性的半导体器件包括：衬底，其包括鳍状结构，其包括设置在衬底上的一个或多个鳍。半导体器件还包括设置在散热片结构的中心部分并且穿过所述一个或多个散热片中的每一个的电介质层。半导体器件还包括设置在电介质层上并穿过一个或多个鳍片中的每一个的功函数金属。半导体器件还包括布置在功函金属上的应变材料，并插入在一个或多个鳍之间。半导体器件还包括设置在功函数金属上的信号金属和在应变材料上并穿过一个或多个鳍片中的每一个的信号金属。

62. 发明申请

US20130056826A1 Multi-Fin Device and Method of Making Same 有权
标题翻译：多翅片装置及其制作方法
公开(公告)号：US20130056826A1
公开(公告)日：2013-03-07
申请号：US13223682
申请日：2011-09-01
申请人： Chi-Wen Liu , Chao-Hsiung Wang
发明人： Chi-Wen Liu , Chao-Hsiung Wang
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L27/0886 , H01L21/823431 , H01L29/0649 , H01L29/0657 , H01L29/20 , H01L29/22 , H01L29/66795
摘要： A multiple-fin device includes a substrate and a plurality of fins formed on the substrate. Source and drain regions are formed in the respective fins. A dielectric layer is formed on the substrate. The dielectric layer has a first thickness adjacent one side of a first fin and having a second thickness, different from the first thickness, adjacent an opposite side of the fin. A continuous gate structure is formed overlying the plurality of fins, the continuous gate structure being adjacent a top surface of each fin and at least one sidewall surface of at least one fin. By adjusting the dielectric layer thickness, channel width of the resulting device can be fine-tuned.
摘要翻译：多翅片装置包括基板和形成在基板上的多个翅片。源极和漏极区域形成在相应的鳍片中。在基板上形成电介质层。电介质层具有与第一鳍片的一侧相邻的第一厚度，并且具有与第一厚度不同的第二厚度，邻近鳍片的相对侧。连续的栅极结构被形成为覆盖多个翅片，连续栅极结构邻近每个翅片的顶表面和至少一个翅片的至少一个侧壁表面。通过调整电介质层的厚度，所得到的器件的通道宽度可以被微调。

63. 发明授权

US07545662B2 Method and system for magnetic shielding in semiconductor integrated circuit 有权
标题翻译：半导体集成电路中磁屏蔽的方法和系统
公开(公告)号：US07545662B2
公开(公告)日：2009-06-09
申请号：US11089969
申请日：2005-03-25
申请人： Chao-Hsiung Wang , Horng-Huei Tseng , Denny Tang , Wen-Chin Lin , Mark Hsieh
发明人： Chao-Hsiung Wang , Horng-Huei Tseng , Denny Tang , Wen-Chin Lin , Mark Hsieh
IPC分类号： G11C7/02
CPC分类号： G11C11/16 , G11C5/025 , H01L23/5225 , H01L27/222 , H01L43/12 , H01L2924/0002 , H01L2924/00
摘要： A circuit with an inter-module radiation interference shielding mechanism is disclosed. The circuit includes a circuit module producing a radiation field. At least one radiation shielding module is situated between the circuit module and another module that is vulnerable to the interference of the radiation field. The shielding module is substantially tangential to the radiation field.
摘要翻译：公开了一种具有模块间辐射干扰屏蔽机构的电路。电路包括产生辐射场的电路模块。至少一个辐射屏蔽模块位于电路模块和易受辐射场干扰的另一个模块之间。屏蔽模块基本上与辐射场相切。

64. 发明授权

US07443638B2 Magnetoresistive structures and fabrication methods 有权
标题翻译：磁阻结构和制造方法
公开(公告)号：US07443638B2
公开(公告)日：2008-10-28
申请号：US10907974
申请日：2005-04-22
申请人： Yu-Jen Wang , Chih-Huang Lai , Wen-Chin Lin , Denny Tang , Chao-Hsiung Wang
发明人： Yu-Jen Wang , Chih-Huang Lai , Wen-Chin Lin , Denny Tang , Chao-Hsiung Wang
IPC分类号： G11B5/39 , G11B5/33
CPC分类号： G11B5/3929 , B82Y10/00 , G11B2005/3996
摘要： Disclosed herein is a magnetoresistive structure, for example useful as a spin-valve or GMR stack in a magnetic sensor, and a fabrication method thereof. The magnetoresistive structure uses twisted coupling to induce a perpendicular magnetization alignment between the free layer and the pinned layer. Ferromagnetic layers of the free and pinned layers are exchange-coupled using antiferromagnetic layers having substantially parallel exchange-biasing directions. Thus, embodiments can be realized that have antiferromagnetic layers formed of a same material and/or having a same blocking temperature. At least one of the free and pinned layers further includes a second ferromagnetic layer and an insulating layer, such as a NOL, between the two ferromagnetic layers. The insulating layer causes twisted coupling between the two ferromagnetic layers, rotating the magnetization direction of one 90 degrees relative to the magnetization direction of the other.
摘要翻译：这里公开了一种例如在磁传感器中用作自旋阀或GMR堆叠的磁阻结构及其制造方法。磁阻结构使用扭转耦合来引起自由层和被钉扎层之间的垂直磁化对准。使用具有基本平行的交换偏压方向的反铁磁层来交换耦合自由和被钉扎层的铁磁层。因此，可以实现具有由相同材料形成的反铁磁层和/或具有相同阻挡温度的实施例。自由和被钉扎层中的至少一个还包括在两个铁磁层之间的第二铁磁层和绝缘层，例如NOL。绝缘层引起两个铁磁层之间的扭转耦合，使相对于另一个的磁化方向旋转90度的磁化方向。

65. 发明申请

US20070099402A1 METHOD FOR FABRICATING RELIABLE SEMICONDUCTOR STRUCTURE 审中-公开
标题翻译：制造可靠的半导体结构的方法
公开(公告)号：US20070099402A1
公开(公告)日：2007-05-03
申请号：US11613462
申请日：2006-12-20
申请人： Horng-Huei Tseng , Chung-Hu Ge , Chao-Hsiung Wang
发明人： Horng-Huei Tseng , Chung-Hu Ge , Chao-Hsiung Wang
IPC分类号： H01L21/20 , H01L21/36 , H01L21/66 , G01R31/26
CPC分类号： H01L23/544 , H01L21/67115 , H01L29/045 , H01L2223/54466 , H01L2223/54493 , H01L2924/0002 , H01L2924/00
摘要： A reliable semiconductor structure and its fabrication method. Active regions and/or scribe lines on a semiconductor substrate are configured along a crack resistant crystalline direction. Thermal cracking due to the abrupt temperature ramp of rapid thermal processing can be avoided.
摘要翻译：可靠的半导体结构及其制造方法。半导体衬底上的有源区和/或划线沿着耐裂纹结晶方向配置。可以避免由于快速热处理的突然温度斜坡导致的热裂纹。

66. 发明授权

US07205632B2 Anti-scattering attenuator structure for high energy particle radiation into integrated circuits 有权
标题翻译：抗散射衰减器结构，用于高能粒子辐射成集成电路
公开(公告)号：US07205632B2
公开(公告)日：2007-04-17
申请号：US10818009
申请日：2004-04-05
申请人： Wen-Chin Lin , Denny D. Tang , Chao-Hsiung Wang
发明人： Wen-Chin Lin , Denny D. Tang , Chao-Hsiung Wang
IPC分类号： H01L29/00
CPC分类号： H01L21/263 , H01L27/0688 , H01L27/08
摘要： A microelectronics device including a semiconductor device located at least partially over a substrate, a bombarded area located at least partially over the substrate and adjacent the semiconductor device, and a bombarded attenuator interposing the semiconductor device and the bombarded area.
摘要翻译：一种微电子器件，包括至少部分地位于衬底上的半导体器件，至少部分地位于衬底上并且邻近半导体器件的轰击区域，以及插入半导体器件和被轰击区域的轰击衰减器。

67. 发明授权

US07151271B2 System and method for passing high energy particles through a mask 有权
标题翻译：将高能粒子通过掩模的系统和方法
公开(公告)号：US07151271B2
公开(公告)日：2006-12-19
申请号：US10681541
申请日：2003-10-08
申请人： Chao-Hsiung Wang , Denny Tang , Wen-Chin Lin , Li-Shyue Lai
发明人： Chao-Hsiung Wang , Denny Tang , Wen-Chin Lin , Li-Shyue Lai
IPC分类号： A61N5/00 , G21G5/00
CPC分类号： H01J37/3174 , B82Y10/00 , B82Y40/00
摘要： A method and system is disclosed for concentrating high energy particles on a predetermined area on a target semiconductor substrate. A high energy source for generating a predetermined amount of high energy particles, and an electro-magnetic radiation source for generating low energy beams are used together. The system also uses a mask set having at least one mask with at least one alignment area and at least one mask target area thereon, the mask target area passing more high energy particles then any other area of the mask. At least one protection shield is incorporated in the system for protecting the alignment area from being exposed to the high energy particles, wherein the mask is aligned with the predetermined target semiconductor substrate by passing the low energy beams through the alignment area, wherein the high energy particles generated by the high energy source pass through the mask target area to land on the predetermined area on the target semiconductor substrate.
摘要翻译：公开了一种用于将高能粒子集中在目标半导体衬底上的预定区域上的方法和系统。用于产生预定量的高能粒子的高能量源和用于产生低能量束的电磁辐射源一起使用。该系统还使用具有至少一个具有至少一个对准区域和至少一个掩模目标区域的掩模的掩模组，掩模目标区域通过更多的高能粒子，然后通过掩模的任何其它区域。至少一个保护屏蔽被并入系统中，用于保护对准区域不暴露于高能粒子，其中通过使低能量束通过对准区域，掩模与预定目标半导体衬底对齐，其中高能量由高能量源产生的粒子通过掩模对象区域落在目标半导体衬底上的预定区域上。

68. 发明授权

US07071007B2 Method of forming a low voltage drive ferroelectric capacitor 有权
标题翻译：形成低压驱动铁电电容器的方法
公开(公告)号：US07071007B2
公开(公告)日：2006-07-04
申请号：US10313776
申请日：2002-12-06
申请人： Yuan-Chieh Tseng , Chao-Hsiung Wang , Tai-Bor Wu
发明人： Yuan-Chieh Tseng , Chao-Hsiung Wang , Tai-Bor Wu
IPC分类号： H01L21/00
CPC分类号： H01L28/55
摘要： A method of forming a low-voltage drive thin film ferroelectric capacitor includes the steps of depositing a ferroelectric and platinum thin film dielectric layer over a bottom electrode, annealing the dielectric layer, wherein a nanocomposite layer is formed including nanoparticles of platinum and forming a top electrode over the dielectric layer. An integrated circuit is also provided including a ferroelectric capacitor. The capacitor includes a bottom electrode formed over a substrate and a ferroelectric and platinum thin film nanocomposite dielectric layer formed over the bottom electrode, wherein the nanocomposite layer includes nanoparticles of platinum. A top electrode is formed over the dielectric layer.
摘要翻译：形成低电压驱动薄膜铁电电容器的方法包括以下步骤：在底部电极上沉积铁电和铂薄膜电介质层，对电介质层进行退火，其中形成纳米复合材料层，包括铂纳米颗粒并形成顶部电极在电介质层上。还提供了包括铁电电容器的集成电路。电容器包括形成在衬底上的底部电极和形成在底部电极上的铁电和铂薄膜纳米复合电介质层，其中纳米复合层包括铂纳米颗粒。在电介质层上形成顶部电极。

69. 发明申请

US20060038214A1 Low voltage drive ferroelectric capacitor 审中-公开
标题翻译：低压驱动铁电电容器
公开(公告)号：US20060038214A1
公开(公告)日：2006-02-23
申请号：US11253178
申请日：2005-10-18
申请人： Yuan-Chieh Tseng , Chao-Hsiung Wang , Tai-Bor Wu
发明人： Yuan-Chieh Tseng , Chao-Hsiung Wang , Tai-Bor Wu
IPC分类号： H01L29/00
CPC分类号： H01L28/55
摘要： A method of forming a low-voltage drive thin film ferroelectric capacitor includes the steps of depositing a ferroelectric and platinum thin film dielectric layer over a bottom electrode, annealing the dielectric layer, wherein a nanocomposite layer is formed including nanoparticles of platinum and forming a top electrode over the dielectric layer. An integrated circuit is also provided including a ferroelectric capacitor. The capacitor includes a bottom electrode formed over a substrate and a ferroelectric and platinum thin film nanocomposite dielectric layer formed over the bottom electrode, wherein the nanocomposite layer includes nanoparticles of platinum. A top electrode is formed over the dielectric layer.
摘要翻译：形成低电压驱动薄膜铁电电容器的方法包括以下步骤：在底部电极上沉积铁电和铂薄膜电介质层，对电介质层进行退火，其中形成纳米复合材料层，包括铂纳米颗粒并形成顶部电极在电介质层上。还提供了包括铁电电容器的集成电路。电容器包括形成在衬底上的底部电极和形成在底部电极上的铁电和铂薄膜纳米复合电介质层，其中纳米复合层包括铂纳米颗粒。在电介质层上形成顶部电极。

70. 发明申请

US20050236616A1 Reliable semiconductor structure and method for fabricating 审中-公开
标题翻译：可靠的半导体结构和制造方法
公开(公告)号：US20050236616A1
公开(公告)日：2005-10-27
申请号：US10831981
申请日：2004-04-26
申请人： Horng-Huei Tseng , Chung-Hu Ge , Chao-Hsiung Wang
发明人： Horng-Huei Tseng , Chung-Hu Ge , Chao-Hsiung Wang
IPC分类号： H01L21/00 , H01L21/66 , H01L23/544 , H01L29/02 , H01L29/04
CPC分类号： H01L23/544 , H01L21/67115 , H01L29/045 , H01L2223/54466 , H01L2223/54493 , H01L2924/0002 , H01L2924/00
摘要： A reliable semiconductor structure and its fabrication method. Active regions and/or scribe lines on a semiconductor substrate are configured along a crack resistant crystalline direction. Thermal cracking due to the abrupt temperature ramp of rapid thermal processing can be avoided.
摘要翻译：可靠的半导体结构及其制造方法。半导体衬底上的有源区和/或划线沿着耐裂纹结晶方向配置。可以避免由于快速热处理的突然温度斜坡导致的热裂纹。

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