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1. 发明授权

US09287385B2 Multi-fin device and method of making same 有权
标题翻译：多翅片装置及其制造方法
公开(公告)号：US09287385B2
公开(公告)日：2016-03-15
申请号：US13223682
申请日：2011-09-01
申请人： Chi-Wen Liu , Chao-Hsiung Wang
发明人： Chi-Wen Liu , Chao-Hsiung Wang
IPC分类号： H01L29/788 , H01L29/66 , H01L21/8234 , H01L27/088
CPC分类号： H01L27/0886 , H01L21/823431 , H01L29/0649 , H01L29/0657 , H01L29/20 , H01L29/22 , H01L29/66795
摘要： A multiple-fin device includes a substrate and a plurality of fins formed on the substrate. Source and drain regions are formed in the respective fins. A dielectric layer is formed on the substrate. The dielectric layer has a first thickness adjacent one side of a first fin and having a second thickness, different from the first thickness, adjacent an opposite side of the fin. A continuous gate structure is formed overlying the plurality of fins, the continuous gate structure being adjacent a top surface of each fin and at least one sidewall surface of at least one fin. By adjusting the dielectric layer thickness, channel width of the resulting device can be fine-tuned.
摘要翻译：多翅片装置包括基板和形成在基板上的多个翅片。源极和漏极区域形成在相应的鳍片中。在基板上形成电介质层。电介质层具有与第一鳍片的一侧相邻的第一厚度，并且具有与第一厚度不同的第二厚度，邻近鳍片的相对侧。连续的栅极结构被形成为覆盖多个翅片，连续栅极结构邻近每个翅片的顶表面和至少一个翅片的至少一个侧壁表面。通过调整电介质层的厚度，所得到的器件的通道宽度可以被微调。

2. 发明授权

US08723236B2 FinFET device and method of manufacturing same 有权
公开(公告)号：US08723236B2
公开(公告)日：2014-05-13
申请号：US13272305
申请日：2011-10-13
申请人： Chi-Wen Liu , Chao-Hsiung Wang
发明人： Chi-Wen Liu , Chao-Hsiung Wang
IPC分类号： H01L29/772 , H01L21/336
CPC分类号： H01L29/66795 , H01L21/76224 , H01L29/7843 , H01L29/7845 , H01L29/785
摘要： A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a fin structure including one or more fins disposed on the substrate. The semiconductor device further includes a dielectric layer disposed on a central portion of the fin structure and traversing each of the one or more fins. The semiconductor device further includes a work function metal disposed on the dielectric layer and traversing each of the one or more fins. The semiconductor device further includes a strained material disposed on the work function metal and interposed between each of the one or more fins. The semiconductor device further includes a signal metal disposed on the work function metal and on the strained material and traversing each of the one or more fins.

3. 发明授权

US08723272B2 FinFET device and method of manufacturing same 有权
标题翻译： FinFET器件及其制造方法
公开(公告)号：US08723272B2
公开(公告)日：2014-05-13
申请号：US13252892
申请日：2011-10-04
申请人： Chi-Wen Liu , Chao-Hsiung Wang
发明人： Chi-Wen Liu , Chao-Hsiung Wang
IPC分类号： H01L27/088
CPC分类号： H01L27/0886 , H01L21/823821 , H01L29/0847 , H01L29/517 , H01L29/518 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a fin structure disposed over the substrate. The fin structure includes one or more fins. The semiconductor device further includes an insulation material disposed on the substrate. The semiconductor device further includes a gate structure disposed on a portion of the fin structure and on a portion of the insulation material. The gate structure traverses each fin of the fin structure. The semiconductor device further includes a source and drain feature formed from a material having a continuous and uninterrupted surface area. The source and drain feature includes a surface in a plane that is in direct contact with a surface in a parallel plane of the insulation material, each of the one or more fins of the fin structure, and the gate structure.
摘要翻译：公开了一种用于制造半导体器件的半导体器件和方法。示例性半导体器件包括：衬底，其包括设置在衬底上的鳍结构。翅片结构包括一个或多个翅片。半导体器件还包括设置在基板上的绝缘材料。半导体器件还包括设置在鳍结构的一部分上和绝缘材料的一部分上的栅极结构。栅极结构横穿翅片结构的每个翅片。半导体器件还包括由具有连续且不间断表面积的材料形成的源极和漏极特征。源极和漏极特征包括在与绝缘材料的平行平面中的表面直接接触的平面中的表面，翅片结构的一个或多个翅片中的每一个以及栅极结构。

4. 发明授权

US09318431B2 Integrated circuit having a MOM capacitor and method of making same 有权
标题翻译：具有MOM电容器的集成电路及其制造方法
公开(公告)号：US09318431B2
公开(公告)日：2016-04-19
申请号：US13289666
申请日：2011-11-04
申请人： Chi-Wen Liu , Chao-Hsiung Wang
发明人： Chi-Wen Liu , Chao-Hsiung Wang
IPC分类号： H01L23/522 , H01L29/94 , H01L29/40 , H01L49/02 , H01L27/12
CPC分类号： H01L27/0629 , H01L23/5223 , H01L27/1203 , H01L27/1211 , H01L28/40 , H01L28/60 , H01L28/90 , H01L29/94 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit can include a MOM capacitor formed simultaneously with other devices, such as finFETs. A dielectric layer formed on a substrate has a first semiconductor fin therein and a second semiconductor fin therein. Respective top portions of the fins are removed to form respective recesses in the dielectric layer. First and second electrodes are formed in the recesses. The first and second electrodes and the interjacent dielectric layer form a MOM capacitor.
摘要翻译：集成电路可以包括与其它器件（例如finFET）同时形成的MOM电容器。形成在基板上的电介质层具有第一半导体鳍片和第二半导体鳍片。除去翅片的各顶部以形成电介质层中的相应凹部。第一和第二电极形成在凹槽中。第一和第二电极和中间介电层形成MOM电容器。

5. 发明申请

US20130092984A1 FINFET DEVICE AND METHOD OF MANUFACTURING SAME 有权
标题翻译： FINFET器件及其制造方法
公开(公告)号：US20130092984A1
公开(公告)日：2013-04-18
申请号：US13272305
申请日：2011-10-13
申请人： Chi-Wen Liu , Chao-Hsiung Wang
发明人： Chi-Wen Liu , Chao-Hsiung Wang
IPC分类号： H01L29/772 , H01L21/336
CPC分类号： H01L29/66795 , H01L21/76224 , H01L29/7843 , H01L29/7845 , H01L29/785
摘要： A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a fin structure including one or more fins disposed on the substrate. The semiconductor device further includes a dielectric layer disposed on a central portion of the fin structure and traversing each of the one or more fins. The semiconductor device further includes a work function metal disposed on the dielectric layer and traversing each of the one or more fins. The semiconductor device further includes a strained material disposed on the work function metal and interposed between each of the one or more fins. The semiconductor device further includes a signal metal disposed on the work function metal and on the strained material and traversing each of the one or more fins.
摘要翻译：公开了一种用于制造半导体器件的半导体器件和方法。示例性的半导体器件包括：衬底，其包括鳍状结构，其包括设置在衬底上的一个或多个鳍。半导体器件还包括设置在散热片结构的中心部分并且穿过所述一个或多个散热片中的每一个的电介质层。半导体器件还包括设置在电介质层上并穿过一个或多个鳍片中的每一个的功函数金属。半导体器件还包括布置在功函金属上的应变材料，并插入在一个或多个鳍之间。半导体器件还包括设置在功函数金属上的信号金属和在应变材料上并穿过一个或多个鳍片中的每一个的信号金属。

6. 发明申请

US20130056826A1 Multi-Fin Device and Method of Making Same 有权
标题翻译：多翅片装置及其制作方法
公开(公告)号：US20130056826A1
公开(公告)日：2013-03-07
申请号：US13223682
申请日：2011-09-01
申请人： Chi-Wen Liu , Chao-Hsiung Wang
发明人： Chi-Wen Liu , Chao-Hsiung Wang
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L27/0886 , H01L21/823431 , H01L29/0649 , H01L29/0657 , H01L29/20 , H01L29/22 , H01L29/66795
摘要： A multiple-fin device includes a substrate and a plurality of fins formed on the substrate. Source and drain regions are formed in the respective fins. A dielectric layer is formed on the substrate. The dielectric layer has a first thickness adjacent one side of a first fin and having a second thickness, different from the first thickness, adjacent an opposite side of the fin. A continuous gate structure is formed overlying the plurality of fins, the continuous gate structure being adjacent a top surface of each fin and at least one sidewall surface of at least one fin. By adjusting the dielectric layer thickness, channel width of the resulting device can be fine-tuned.
摘要翻译：多翅片装置包括基板和形成在基板上的多个翅片。源极和漏极区域形成在相应的鳍片中。在基板上形成电介质层。电介质层具有与第一鳍片的一侧相邻的第一厚度，并且具有与第一厚度不同的第二厚度，邻近鳍片的相对侧。连续的栅极结构被形成为覆盖多个翅片，连续栅极结构邻近每个翅片的顶表面和至少一个翅片的至少一个侧壁表面。通过调整电介质层的厚度，所得到的器件的通道宽度可以被微调。

7. 发明授权

US09893163B2 3D capacitor and method of manufacturing same 有权
公开(公告)号：US09893163B2
公开(公告)日：2018-02-13
申请号：US13289038
申请日：2011-11-04
申请人： Chi-Wen Liu , Chao-Hsiung Wang
发明人： Chi-Wen Liu , Chao-Hsiung Wang
IPC分类号： H01L29/94 , H01L29/66 , H01L49/02
CPC分类号： H01L29/66181 , H01L28/92 , H01L29/94 , H01L29/945
摘要： A 3D capacitor and method for fabricating a 3D capacitor is disclosed. An exemplary 3D capacitor includes a substrate including a fin structure, the fin structure including a plurality of fins. The 3D capacitor further includes an insulation material disposed on the substrate and between each of the plurality of fins. The 3D capacitor further includes a dielectric layer disposed on each of the plurality of fins. The 3D capacitor further includes a first electrode disposed on a first portion of the fin structure. The first electrode being in direct contact with a surface of the fin structure. The 3D capacitor further includes a second electrode disposed on a second portion of the fin structure. The second electrode being disposed directly on the dielectric layer and the first and second portions of the fin structure being different.

8. 发明申请

US20130113072A1 3D Capacitor and Method of Manufacturing Same 有权
标题翻译： 3D电容器及其制造方法相同
公开(公告)号：US20130113072A1
公开(公告)日：2013-05-09
申请号：US13289038
申请日：2011-11-04
申请人： Chi-Wen Liu , Chao-Hsiung Wang
发明人： Chi-Wen Liu , Chao-Hsiung Wang
IPC分类号： H01L29/92 , H01L21/02
CPC分类号： H01L29/66181 , H01L28/92 , H01L29/94 , H01L29/945
摘要： A 3D capacitor and method for fabricating a 3D capacitor is disclosed. An exemplary 3D capacitor includes a substrate including a fin structure, the fin structure including a plurality of fins. The 3D capacitor further includes an insulation material disposed on the substrate and between each of the plurality of fins. The 3D capacitor further includes a dielectric layer disposed on each of the plurality of fins. The 3D capacitor further includes a first electrode disposed on a first portion of the fin structure. The first electrode being in direct contact with a surface of the fin structure. The 3D capacitor further includes a second electrode disposed on a second portion of the fin structure. The second electrode being disposed directly on the dielectric layer and the first and second portions of the fin structure being different.
摘要翻译：公开了用于制造3D电容器的3D电容器和方法。示例性3D电容器包括包括鳍结构的衬底，鳍结构包括多个翅片。 3D电容器还包括设置在基板上并且在多个翅片中的每一个之间的绝缘材料。 3D电容器还包括设置在多个鳍片中的每一个上的电介质层。 3D电容器还包括设置在翅片结构的第一部分上的第一电极。第一电极与翅片结构的表面直接接触。 3D电容器还包括设置在鳍结构的第二部分上的第二电极。第二电极直接设置在电介质层上，翅片结构的第一和第二部分是不同的。

9. 发明申请

US20130082304A1 FinFET Device and Method Of Manufacturing Same 有权
标题翻译： FinFET器件及其制造方法相同
公开(公告)号：US20130082304A1
公开(公告)日：2013-04-04
申请号：US13252892
申请日：2011-10-04
申请人： Chi-Wen Liu , Chao-Hsiung Wang
发明人： Chi-Wen Liu , Chao-Hsiung Wang
IPC分类号： H01L29/772 , H01L21/336
CPC分类号： H01L27/0886 , H01L21/823821 , H01L29/0847 , H01L29/517 , H01L29/518 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a fin structure disposed over the substrate. The fin structure includes one or more fins. The semiconductor device further includes an insulation material disposed on the substrate. The semiconductor device further includes a gate structure disposed on a portion of the fin structure and on a portion of the insulation material. The gate structure traverses each fin of the fin structure. The semiconductor device further includes a source and drain feature formed from a material having a continuous and uninterrupted surface area. The source and drain feature includes a surface in a plane that is in direct contact with a surface in a parallel plane of the insulation material, each of the one or more fins of the fin structure, and the gate structure.
摘要翻译：公开了一种用于制造半导体器件的半导体器件和方法。示例性半导体器件包括：衬底，其包括设置在衬底上的鳍结构。翅片结构包括一个或多个翅片。半导体器件还包括设置在基板上的绝缘材料。半导体器件还包括设置在鳍结构的一部分上和绝缘材料的一部分上的栅极结构。栅极结构横穿翅片结构的每个翅片。半导体器件还包括由具有连续且不间断表面积的材料形成的源极和漏极特征。源极和漏极特征包括在与绝缘材料的平行平面中的表面直接接触的平面中的表面，翅片结构的一个或多个翅片中的每一个以及栅极结构。

10. 发明申请

US20130113073A1 Integrated Circuit having a MOM Capacitor and Method of Making Same 有权
标题翻译：具有MOM电容器的集成电路及其制造方法
公开(公告)号：US20130113073A1
公开(公告)日：2013-05-09
申请号：US13289666
申请日：2011-11-04
申请人： Chi-Wen Liu , Chao-Hsiung Wang
发明人： Chi-Wen Liu , Chao-Hsiung Wang
IPC分类号： H01L29/92 , H01L21/02
CPC分类号： H01L27/0629 , H01L23/5223 , H01L27/1203 , H01L27/1211 , H01L28/40 , H01L28/60 , H01L28/90 , H01L29/94 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit can include a MOM capacitor formed simultaneously with other devices, such as finFETs. A dielectric layer formed on a substrate has a first semiconductor fin therein and a second semiconductor fin therein. Respective top portions of the fins are removed to form respective recesses in the dielectric layer. First and second electrodes are formed in the recesses. The first and second electrodes and the interjacent dielectric layer form a MOM capacitor.
摘要翻译：集成电路可以包括与其它器件（例如finFET）同时形成的MOM电容器。形成在基板上的电介质层具有第一半导体鳍片和第二半导体鳍片。除去翅片的各顶部以形成电介质层中的相应凹部。第一和第二电极形成在凹槽中。第一和第二电极和中间介电层形成MOM电容器。

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